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c3f2fc231a
The NETC timer does not support function level reset, so TMR_OFF_L/H
registers are not cleared by pcie_flr(). If TMR_OFF was set to a
non-zero value in a previous binding, it will persist across driver
rebind and cause inaccurate PTP time.
There is also a hardware issue: after a warm reset or soft reset,
TMR_OFF_L/H registers appear to be cleared to zero, but the timer clock
domain internally retains the stale value. When the timer is re-enabled,
TMR_CUR_TIME continues to track the old offset until TMR_OFF is written
explicitly. This can cause incorrect PTP timestamps and even PTP clock
synchronization failures.
Per the recommendation from the IP team, explicitly write 0 to TMR_OFF
in netc_timer_init() to flush the internally cached value and ensure
TMR_CUR_TIME follows the freshly initialized counter.
Fixes:
|
||
|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| ptp_chardev.c | ||
| ptp_clock.c | ||
| ptp_clockmatrix.c | ||
| ptp_clockmatrix.h | ||
| ptp_dfl_tod.c | ||
| ptp_dte.c | ||
| ptp_fc3.c | ||
| ptp_fc3.h | ||
| ptp_idt82p33.c | ||
| ptp_idt82p33.h | ||
| ptp_ines.c | ||
| ptp_kvm_arm.c | ||
| ptp_kvm_common.c | ||
| ptp_kvm_x86.c | ||
| ptp_mock.c | ||
| ptp_netc.c | ||
| ptp_ocp.c | ||
| ptp_pch.c | ||
| ptp_private.h | ||
| ptp_qoriq.c | ||
| ptp_s390.c | ||
| ptp_sysfs.c | ||
| ptp_vclock.c | ||
| ptp_vmclock.c | ||
| ptp_vmw.c | ||