mirror of
https://github.com/torvalds/linux.git
synced 2026-09-26 01:52:03 +02:00
16e6a1a3cb
As usual bunch of new device and driver support and updates to existing
drivers and addition of Manivannan to help with reviews.
- New Support
- Mediatek MT8196 DSI PHY support
- Renesas RZ/G3L usb2 support
- Qualcomm SM8475 QMP USB PHY and PCIe phy, IPQ9650 QMP PCIe PHY, QUSB2
Phy for Shikra SoC, Hawi support for QMP PCIe phy and UFS PHY. Glymur
QMP PCIe Multi-PHY driver and multiple link-mode support, ipq5210 PCIe
phy support
- Spacemit USB3/PCIe comb PHY driver
- Updates
- Samsung hdptx driver improvements for modernizing the register
access and code cleanup
- Qualcomm drop duplicate v8 DP headers, improved runtime handling for qmp
drivers
- Rockchip clock lane phase tuning and 2500 Mbps support and TMDS rate
handling
- Freescale imx8mq improvements for runtime pm, pd handling.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmqMf1YACgkQfBQHDyUj
g0cx8g/+M2Thg88JXJ1HIbcCD/Dh6gtsZHmnfW71EUxIE//QKV950PE1Oqu/Va7i
Z9YRonkGjzyuYFJZixW/C8OzL5lqy1vp62t/qbUa1Q4UKawhI+ALEUBrWXkozxyR
LKM9OSoNTxUa40vJrb54MkiouTrwGOhOPhf0LB6QaIDkQqae5/10uux5TsGdvU57
pVDC2SIAZaYg4a3xcv0sFVORDuMhPMSGZyjDR2CDSaAdR3H4kau5mfY7+98w8T6u
dt7wEWThUSFXTSPbHER3zj2JEHlaG/EcOzAmwy44ttqTdqP7X12O4nnJeDE08ymb
/sib42WwQvL3OwXgzBOKOIF7P6g6691I15lMLIMtGj9j2wyimDchO7YGRcNxtJTt
3x96YbWABmDbrQblWXZcKro/PG13i0tMxmm4W0HYcCtK5sCvhWpHjwV3n46y6Kuv
cxgQpsrRwYNGWgMOai9X0ft5tXn5uqFyaGiolPBo7IlOLtbsTuG6Q2H8QbxJKokf
KjiYofA0EXrp/DtBnSlA1x7S5ODTRi25soHTIvrlJlljls4vRrqV4ZU33peicDY5
XbXlIX4XOu7pxNtDSpQYoWXnIIDo9/QfpJy4YUlVdGZTtLDcLW98Aqwxre/FWWUj
c8FeNDGSj0vPaL7Pm8XF4PXmKTW6xjf2MToFcUlAcJsEFsfm1XM=
=Hg5e
-----END PGP SIGNATURE-----
Merge tag 'phy-for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul:
"As usual bunch of new device and driver support and updates to
existing drivers and addition of Manivannan to help with reviews.
New Support:
- Mediatek MT8196 DSI PHY support
- Renesas RZ/G3L usb2 support
- Qualcomm SM8475 QMP USB PHY and PCIe phy, IPQ9650 QMP PCIe PHY,
QUSB2 Phy for Shikra SoC, Hawi support for QMP PCIe phy and UFS
PHY. Glymur QMP PCIe Multi-PHY driver and multiple link-mode
support, ipq5210 PCIe phy support
- Spacemit USB3/PCIe comb PHY driver
Updates:
- Samsung hdptx driver improvements for modernizing the register
access and code cleanup
- Qualcomm drop duplicate v8 DP headers, improved runtime handling
for qmp drivers
- Rockchip clock lane phase tuning and 2500 Mbps support and TMDS
rate handling
- Freescale imx8mq improvements for runtime pm, pd handling"
* tag 'phy-for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (76 commits)
MAINTAINERS: Add Manivannan Sadhasivam as the Reviewer for Generic PHY Framework
phy: rockchip-samsung-dcphy: fix out-of-range max_register
phy: qcom: qmp-pcie: Add QMP PCIe Multi-PHY driver
dt-bindings: phy: qcom: Add Glymur QMP PCIe multiple link-mode PHY
phy: rockchip: samsung-hdptx: Consistently use bitfield macros
phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16()
phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling
phy: rockchip: samsung-hdptx: Consolidate consumer_put on error path
phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround
phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes
phy: rockchip: samsung-hdptx: Fix rate recalculation for 3.2GHz FRL
phy: rockchip: samsung-hdptx: Guard against clk rate integer underflow
phy: rockchip: samsung-hdptx: Prevent divide-by-zero when computing clk rate
phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc
phy: qcom: qmp-combo: Drop qmp_v4_calibrate_dp_phy
phy: qcom: qmp-combo: Correct pre-emphasis table for QMP v4 DP PHYs
phy: renesas: rcar-gen3-usb2: Ignore missing VBUS regulator
phy: qcom: qmp-pcie: Add support for SM8475 Gen3x1 PCIe0 port
phy: qcom: qmp-pcie: Add pcs_lane1 offset to V5 offsets
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add SM8475 QMP PHY
...
80 lines
2.1 KiB
Plaintext
80 lines
2.1 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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if (ARCH_MXC && ARM64) || COMPILE_TEST
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config PHY_FSL_IMX8MQ_USB
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tristate "Freescale i.MX8M USB3 PHY"
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depends on OF && HAS_IOMEM
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depends on TYPEC || TYPEC=n
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select GENERIC_PHY
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select REGMAP_MMIO
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default ARCH_MXC && ARM64
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config PHY_MIXEL_LVDS_PHY
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tristate "Mixel LVDS PHY support"
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depends on OF
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select GENERIC_PHY
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select REGMAP_MMIO
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help
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Enable this to add support for the Mixel LVDS PHY as found
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on NXP's i.MX8qm SoC.
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config PHY_MIXEL_MIPI_DPHY
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tristate "Mixel MIPI DSI PHY support"
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depends on OF && HAS_IOMEM
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select GENERIC_PHY
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select GENERIC_PHY_MIPI_DPHY
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select REGMAP_MMIO
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help
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Enable this to add support for the Mixel DSI PHY as found
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on NXP's i.MX8 family of SOCs.
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config PHY_FSL_IMX8M_PCIE
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tristate "Freescale i.MX8M PCIE PHY"
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depends on OF && HAS_IOMEM
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select GENERIC_PHY
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help
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Enable this to add support for the PCIE PHY as found on
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i.MX8M family of SOCs.
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config PHY_FSL_IMX8QM_HSIO
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tristate "Freescale i.MX8QM HSIO PHY"
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depends on OF && HAS_IOMEM
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select GENERIC_PHY
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help
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Enable this to add support for the HSIO PHY as found on
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i.MX8QM family of SOCs.
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config PHY_FSL_SAMSUNG_HDMI_PHY
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tristate "Samsung HDMI PHY support"
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depends on OF && HAS_IOMEM && COMMON_CLK
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help
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Enable this to add support for the Samsung HDMI PHY in i.MX8MP.
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endif
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config PHY_FSL_LYNX_CORE
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tristate
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config PHY_FSL_LYNX_10G
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tristate "Freescale Layerscape Lynx 10G SerDes PHY support"
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depends on OF
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depends on ARCH_LAYERSCAPE || COMPILE_TEST
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select FSL_GUTS
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select GENERIC_PHY
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select PHY_FSL_LYNX_CORE
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help
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Enable this to add support for the Lynx 10G SerDes PHY as found on
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NXP's Layerscape platform such as LS1088A or LS1028A.
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config PHY_FSL_LYNX_28G
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tristate "Freescale Layerscape Lynx 28G SerDes PHY support"
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depends on OF
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depends on ARCH_LAYERSCAPE || COMPILE_TEST
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select GENERIC_PHY
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select PHY_FSL_LYNX_CORE
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help
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Enable this to add support for the Lynx SerDes 28G PHY as
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found on NXP's Layerscape platforms such as LX2160A.
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Used to change the protocol running on SerDes lanes at runtime.
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Only useful for a restricted set of Ethernet protocols.
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