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Some PCI controllers may provide debug functionalities to track PCI bus activities like LTSSM state transitions and data rate changes. These will be very useful for debugging PCI link specific issues such as endpoint not getting detected or performance issues. Hence, implement the PCI controller tracepoint feature for recording LTSSM state transitions and data rate changes. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> [mani: commit log and maintainers entry] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://patch.msgid.link/1774403912-210670-2-git-send-email-shawn.lin@rock-chips.com
13 lines
247 B
C
13 lines
247 B
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Tracepoints for PCI system
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*
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* Copyright (C) 2025 Alibaba Corporation
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*/
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#include <linux/pci.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/pci.h>
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#include <trace/events/pci_controller.h>
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