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mm81x is the first Wi-Fi HaLow driver to support the Morse Micro mm81x chip family via USB and SDIO. S1G support in the kernel is only new, and as a result this driver has been scoped to be simple and only support station and AP interface. The Wi-Fi specific features only cover the minimum required for basic use such as powersave, aggregation, rate control and so on. The driver will be extended into the future as S1G support for operations such as ACS, channel switching and so on are added into the wireless stack. The driver has been build tested on a long list of architectures and compilers via Intels LKP. The driver currently supports IEEE80211-2024 US channels only, with AU 2020 also available. In order for this to be expanded additional non-trivial kernel work is required which will begin once the driver is upstream. The driver has had many authors who are listed below in alphabetical order: Co-developed-by: Andrew Pope <andrew.pope@morsemicro.com> Signed-off-by: Andrew Pope <andrew.pope@morsemicro.com> Co-developed-by: Arien Judge <arien.judge@morsemicro.com> Signed-off-by: Arien Judge <arien.judge@morsemicro.com> Co-developed-by: Ayman Grais <ayman.grais@morsemicro.com> Signed-off-by: Ayman Grais <ayman.grais@morsemicro.com> Co-developed-by: Bassem Dawood <bassem@morsemicro.com> Signed-off-by: Bassem Dawood <bassem@morsemicro.com> Co-developed-by: Chetan Mistry <chetan.mistry@morsemicro.com> Signed-off-by: Chetan Mistry <chetan.mistry@morsemicro.com> Co-developed-by: Dan Callaghan <dan.callaghan@morsemicro.com> Signed-off-by: Dan Callaghan <dan.callaghan@morsemicro.com> Co-developed-by: James Herbert <james.herbert@morsemicro.com> Signed-off-by: James Herbert <james.herbert@morsemicro.com> Co-developed-by: Sahand Maleki <sahand.maleki@morsemicro.com> Signed-off-by: Sahand Maleki <sahand.maleki@morsemicro.com> Co-developed-by: Simon Wadsworth <simon@morsemicro.com> Signed-off-by: Simon Wadsworth <simon@morsemicro.com> Signed-off-by: Lachlan Hodges <lachlan.hodges@morsemicro.com>
118 lines
3.2 KiB
C
118 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017-2026 Morse Micro
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*/
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#ifndef _MM81X_HIF_H_
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#define _MM81X_HIF_H_
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#include "core.h"
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struct mm81x_skbq;
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#define MM81X_HIF_BYPASS_TX_STATUS_IRQ_NUM (15)
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#define MM81X_HIF_BYPASS_CMD_RESP_IRQ_NUM (29)
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#define MM81X_HIF_IRQ_BYPASS_TX_STATUS_AVAILABLE \
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BIT(MM81X_HIF_BYPASS_TX_STATUS_IRQ_NUM)
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#define MM81X_HIF_IRQ_BYPASS_CMD_RESP_AVAILABLE \
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BIT(MM81X_HIF_BYPASS_CMD_RESP_IRQ_NUM)
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/* Hardware IF interrupt mask. We may use any interrupts in this range */
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#define MM81X_HIF_IRQ_MASK_ALL \
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(GENMASK(13, 0) | MM81X_HIF_IRQ_BYPASS_TX_STATUS_AVAILABLE | \
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MM81X_HIF_IRQ_BYPASS_CMD_RESP_AVAILABLE)
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enum mm81x_hif_flags {
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MM81X_HIF_FLAGS_DIR_TO_HOST = BIT(0),
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MM81X_HIF_FLAGS_DIR_TO_CHIP = BIT(1),
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MM81X_HIF_FLAGS_COMMAND = BIT(2),
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MM81X_HIF_FLAGS_BEACON = BIT(3),
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MM81X_HIF_FLAGS_DATA = BIT(4)
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};
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struct mm81x_hif_ops {
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int (*init)(struct mm81x *mors);
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void (*flush_tx_data)(struct mm81x *mors);
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void (*flush_cmds)(struct mm81x *mors);
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void (*finish)(struct mm81x *mors);
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void (*skbq_get_tx_qs)(struct mm81x *mors, struct mm81x_skbq **qs,
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int *num_qs);
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struct mm81x_skbq *(*get_tx_cmd_queue)(struct mm81x *mors);
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struct mm81x_skbq *(*get_tx_beacon_queue)(struct mm81x *mors);
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struct mm81x_skbq *(*get_tx_mgmt_queue)(struct mm81x *mors);
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struct mm81x_skbq *(*get_tx_data_queue)(struct mm81x *mors, int aci);
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int (*handle_irq)(struct mm81x *mors, u32 status);
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int (*get_tx_buffered_count)(struct mm81x *mors);
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int (*get_tx_status_pending_count)(struct mm81x *mors);
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};
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static inline void mm81x_hif_clear_events(struct mm81x *mors)
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{
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mors->hif.event_flags = 0;
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}
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static inline int mm81x_hif_init(struct mm81x *mors)
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{
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return mors->hif.ops->init(mors);
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}
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static inline void mm81x_hif_flush_tx_data(struct mm81x *mors)
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{
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mors->hif.ops->flush_tx_data(mors);
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}
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static inline void mm81x_hif_flush_cmds(struct mm81x *mors)
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{
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mors->hif.ops->flush_cmds(mors);
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}
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static inline void mm81x_hif_finish(struct mm81x *mors)
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{
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mors->hif.ops->finish(mors);
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}
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static inline void mm81x_hif_skbq_get_tx_qs(struct mm81x *mors,
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struct mm81x_skbq **qs, int *num_qs)
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{
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mors->hif.ops->skbq_get_tx_qs(mors, qs, num_qs);
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}
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static inline struct mm81x_skbq *mm81x_hif_get_tx_cmd_queue(struct mm81x *mors)
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{
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return mors->hif.ops->get_tx_cmd_queue(mors);
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}
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static inline struct mm81x_skbq *
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mm81x_hif_get_tx_beacon_queue(struct mm81x *mors)
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{
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return mors->hif.ops->get_tx_beacon_queue(mors);
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}
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static inline struct mm81x_skbq *mm81x_hif_get_tx_mgmt_queue(struct mm81x *mors)
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{
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return mors->hif.ops->get_tx_mgmt_queue(mors);
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}
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static inline struct mm81x_skbq *mm81x_hif_get_tx_data_queue(struct mm81x *mors,
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int aci)
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{
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return mors->hif.ops->get_tx_data_queue(mors, aci);
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}
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static inline int mm81x_hif_handle_irq(struct mm81x *mors, u32 status)
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{
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return mors->hif.ops->handle_irq(mors, status);
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}
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static inline int mm81x_hif_get_tx_buffered_count(struct mm81x *mors)
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{
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return mors->hif.ops->get_tx_buffered_count(mors);
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}
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static inline int mm81x_hif_get_tx_status_pending_count(struct mm81x *mors)
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{
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return mors->hif.ops->get_tx_status_pending_count(mors);
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}
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#endif /* _MM81X_HIF_H_ */
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