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7462d18889
Enable user space applications to access the PHC state page when firmware RDMA completion timestamp is supported. This mapping allows user space to convert RDMA completion timestamps to system wall time without kernel transitions, minimizing latency overhead. Applications can directly read the PHC state through mmap, enabling efficient timestamp correlation for precision timing applications. Co-developed-by: Allen Hubbe <allen.hubbe@amd.com> Signed-off-by: Allen Hubbe <allen.hubbe@amd.com> Signed-off-by: Abhijit Gangurde <abhijit.gangurde@amd.com> Link: https://patch.msgid.link/20260610154216.712374-4-abhijit.gangurde@amd.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
68 lines
1.3 KiB
C
68 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */
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#ifndef _IONIC_LIF_CFG_H_
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#define IONIC_VERSION(a, b) (((a) << 16) + ((b) << 8))
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#define IONIC_PAGE_SIZE_SUPPORTED 0x40201000 /* 4kb, 2Mb, 1Gb */
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#define IONIC_EXPDB_64B_WQE BIT(0)
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#define IONIC_EXPDB_128B_WQE BIT(1)
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#define IONIC_EXPDB_256B_WQE BIT(2)
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#define IONIC_EXPDB_512B_WQE BIT(3)
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struct ionic_lif_cfg {
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struct device *hwdev;
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struct ionic_lif *lif;
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int lif_index;
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int lif_hw_index;
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u32 dbid;
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int dbid_count;
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u64 __iomem *dbpage;
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struct ionic_intr __iomem *intr_ctrl;
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phys_addr_t db_phys;
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void *phc_state;
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u64 page_size_supported;
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u32 npts_per_lif;
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u32 nmrs_per_lif;
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u32 nahs_per_lif;
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u32 aq_base;
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u32 cq_base;
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u32 eq_base;
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int aq_count;
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int eq_count;
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int cq_count;
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int qp_count;
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u16 stats_type;
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u8 aq_qtype;
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u8 sq_qtype;
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u8 rq_qtype;
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u8 cq_qtype;
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u8 eq_qtype;
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u8 udma_count;
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u8 udma_qgrp_shift;
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u8 rdma_version;
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u8 qp_opcodes;
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u8 admin_opcodes;
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u8 max_stride;
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bool sq_expdb;
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bool rq_expdb;
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u8 expdb_mask;
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};
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void ionic_fill_lif_cfg(struct ionic_lif *lif, struct ionic_lif_cfg *cfg);
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struct net_device *ionic_lif_netdev(struct ionic_lif *lif);
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void ionic_lif_fw_version(struct ionic_lif *lif, char *str, size_t len);
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u8 ionic_lif_asic_rev(struct ionic_lif *lif);
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#endif /* _IONIC_LIF_CFG_H_ */
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