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GSP-RM needs a larger WPR2 heap when booting in vGPU mode. The heap size is firmware-dependent, so it should come from the generated firmware bindings instead of being open-coded in nova-core. Pass the detected vGPU state into the framebuffer layout calculation. Keep baremetal boots on the existing heap sizing path, and use the 570.144 vGPU default heap binding only when vGPU is enabled. The same state match also sets the VF partition count, so disabled and invalid 0/1-VF states do not enter the vGPU heap path. Cc: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Zhi Wang <zhiw@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Link: https://patch.msgid.link/20260722073913.1807677-7-zhiw@nvidia.com [ Use checked arithmetic to calculate wpr2_heap_addr. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
92 lines
2.3 KiB
Rust
92 lines
2.3 KiB
Rust
// SPDX-License-Identifier: GPL-2.0
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use core::num::NonZero;
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use kernel::{
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device,
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pci,
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prelude::*, //
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};
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use crate::{
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fsp::{
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Fsp,
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VgpuMode, //
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},
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gpu::Chipset, //
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};
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mod hal;
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/// vGPU state detected during GPU construction.
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#[derive(Debug, Clone, Copy)]
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pub(crate) enum VgpuState {
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/// vGPU mode is not enabled for this boot.
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Disabled,
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/// vGPU mode is enabled for this boot.
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Enabled {
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/// Total number of SR-IOV VFs supported by this device.
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total_vfs: NonZero<u16>,
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},
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}
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/// vGPU state manager.
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pub(crate) struct VgpuManager {
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state: VgpuState,
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}
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impl VgpuManager {
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/// Creates a vGPU manager by querying SR-IOV and the FSP PRC vGPU knob.
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pub(crate) fn new(
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pdev: &pci::Device<device::Core<'_>>,
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chipset: Chipset,
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fsp: Option<&mut Fsp<'_>>,
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) -> Self {
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let state = Self::detect_state(pdev, chipset, fsp).unwrap_or_else(|e| {
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dev_warn!(
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pdev,
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"vGPU state detection failed: {:?}; disabling vGPU\n",
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e
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);
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VgpuState::Disabled
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});
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dev_dbg!(pdev, "vGPU state: {:?}\n", state);
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Self { state }
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}
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/// Detects the vGPU state from the chipset, SR-IOV capability and FSP PRC knob.
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fn detect_state(
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pdev: &pci::Device<device::Core<'_>>,
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chipset: Chipset,
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fsp: Option<&mut Fsp<'_>>,
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) -> Result<VgpuState> {
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if !hal::vgpu_hal(chipset).supports_vgpu() {
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return Ok(VgpuState::Disabled);
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}
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let Some(total_vfs) = pdev.sriov_get_totalvfs() else {
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return Ok(VgpuState::Disabled);
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};
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if total_vfs.get() < 2 {
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// The current vGPU path does not support single-VF SR-IOV devices yet.
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// Treat one total VF as vGPU-disabled for now; single-VF support can relax
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// this gate once the manager handles that topology.
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return Ok(VgpuState::Disabled);
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}
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let fsp = fsp.ok_or(ENODEV)?;
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match fsp.read_vgpu_mode(pdev.as_ref())? {
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VgpuMode::Enabled => Ok(VgpuState::Enabled { total_vfs }),
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VgpuMode::Disabled => Ok(VgpuState::Disabled),
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}
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}
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/// Returns the detected vGPU state for this boot.
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pub(crate) fn state(&self) -> VgpuState {
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self.state
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}
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}
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