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Query system controller when any non fatal error occurs to check the type of the error, contain and recover. The system controller is queried in the mmio_enabled callback. Reviewed-by: Raag Jadav <raag.jadav@intel.com> Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com> Link: https://patch.msgid.link/20260713074755.1278607-10-riana.tauro@intel.com Signed-off-by: Riana Tauro <riana.tauro@intel.com>
140 lines
3.6 KiB
C
140 lines
3.6 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2026 Intel Corporation
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*/
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#include <linux/pci.h>
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#include "xe_device.h"
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#include "xe_gt.h"
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#include "xe_pci.h"
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#include "xe_pm.h"
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#include "xe_printk.h"
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#include "xe_ras.h"
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#include "xe_survivability_mode.h"
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static void prepare_device_for_reset(struct pci_dev *pdev)
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{
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struct xe_device *xe = pdev_to_xe_device(pdev);
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struct xe_gt *gt;
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u8 id;
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/*
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* Wedge the device to prevent userspace access but do not send the uevent.
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* xe_device_wedged_fini() releases runtime pm if wedged flag is set, so acquire a runtime
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* pm reference to avoid underflow.
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*/
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if (!atomic_xchg(&xe->wedged.flag, 1))
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xe_pm_runtime_get_noresume(xe);
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xe_device_set_in_reset(xe);
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for_each_gt(gt, xe, id)
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xe_gt_declare_wedged(gt);
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pci_disable_device(pdev);
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}
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static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action)
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{
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switch (action) {
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case XE_RAS_RECOVERY_ACTION_RECOVERED:
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return PCI_ERS_RESULT_RECOVERED;
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case XE_RAS_RECOVERY_ACTION_RESET:
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prepare_device_for_reset(pdev);
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return PCI_ERS_RESULT_NEED_RESET;
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case XE_RAS_RECOVERY_ACTION_DISCONNECT:
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return PCI_ERS_RESULT_DISCONNECT;
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default:
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return PCI_ERS_RESULT_DISCONNECT;
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}
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}
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static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
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{
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struct xe_device *xe = pdev_to_xe_device(pdev);
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xe_info(xe, "PCI error: detected state = %d\n", state);
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if (state == pci_channel_io_perm_failure)
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return PCI_ERS_RESULT_DISCONNECT;
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/* If the device is already wedged or in survivability mode, do not attempt recovery */
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if (xe_survivability_mode_is_boot_enabled(xe) || xe_device_wedged(xe))
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return PCI_ERS_RESULT_DISCONNECT;
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switch (state) {
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case pci_channel_io_normal:
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return PCI_ERS_RESULT_CAN_RECOVER;
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case pci_channel_io_frozen:
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prepare_device_for_reset(pdev);
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return PCI_ERS_RESULT_NEED_RESET;
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default:
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xe_info(xe, "PCI error: unknown state %d\n", state);
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return PCI_ERS_RESULT_DISCONNECT;
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}
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}
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static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
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{
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struct xe_device *xe = pdev_to_xe_device(pdev);
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enum xe_ras_recovery_action action;
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xe_info(xe, "PCI error: MMIO enabled\n");
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action = xe_ras_process_errors(xe);
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return ras_action_to_pci_result(pdev, action);
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}
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static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
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{
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const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
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struct xe_device *xe = pdev_to_xe_device(pdev);
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xe_info(xe, "PCI error: slot reset\n");
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pci_restore_state(pdev);
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if (pci_enable_device(pdev)) {
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xe_err(xe, "Cannot re-enable PCI device after reset\n");
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return PCI_ERS_RESULT_DISCONNECT;
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}
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/*
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* Secondary Bus Reset causes all VRAM state to be lost along with
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* hardware state. As an initial step, re-probe the device to
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* re-initialize the driver and hardware.
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* TODO: optimize by re-initializing only the hardware state and re-creating
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* kernel BOs.
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*/
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xe_device_clear_in_reset(xe);
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pdev->driver->remove(pdev);
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devres_release_group(&pdev->dev, xe->devres_group);
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if (pdev->driver->probe(pdev, ent))
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return PCI_ERS_RESULT_DISCONNECT;
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xe = pdev_to_xe_device(pdev);
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/* Wedge the device to prevent I/O operations till the resume callback */
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atomic_set(&xe->wedged.flag, 1);
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return PCI_ERS_RESULT_RECOVERED;
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}
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static void xe_pci_error_resume(struct pci_dev *pdev)
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{
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struct xe_device *xe = pdev_to_xe_device(pdev);
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xe_info(xe, "PCI error: resume\n");
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atomic_set(&xe->wedged.flag, 0);
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}
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const struct pci_error_handlers xe_pci_error_handlers = {
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.error_detected = xe_pci_error_detected,
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.mmio_enabled = xe_pci_error_mmio_enabled,
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.slot_reset = xe_pci_error_slot_reset,
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.resume = xe_pci_error_resume,
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};
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