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36c6bac158
Add a memory pool to allocate sub-ranges from a BO-backed pool using drm_mm. Signed-off-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260408110145.1639937-5-satyanarayana.k.v.p@intel.com (cherry picked from commit 1ce3229f8f269a245ff3b8c65ffae36b4d6afb93) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
36 lines
1.2 KiB
C
36 lines
1.2 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2026 Intel Corporation
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*/
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#ifndef _XE_MEM_POOL_H_
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#define _XE_MEM_POOL_H_
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#include <linux/sizes.h>
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#include <linux/types.h>
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#include <drm/drm_mm.h>
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#include "xe_mem_pool_types.h"
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struct drm_printer;
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struct xe_mem_pool;
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struct xe_tile;
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struct xe_mem_pool *xe_mem_pool_init(struct xe_tile *tile, u32 size,
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u32 guard, int flags);
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void xe_mem_pool_sync(struct xe_mem_pool *pool);
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void xe_mem_pool_swap_shadow_locked(struct xe_mem_pool *pool);
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void xe_mem_pool_sync_shadow_locked(struct xe_mem_pool_node *node);
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u64 xe_mem_pool_gpu_addr(struct xe_mem_pool *pool);
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void *xe_mem_pool_cpu_addr(struct xe_mem_pool *pool);
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struct mutex *xe_mem_pool_bo_swap_guard(struct xe_mem_pool *pool);
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void xe_mem_pool_bo_flush_write(struct xe_mem_pool_node *node);
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void xe_mem_pool_bo_sync_read(struct xe_mem_pool_node *node);
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struct xe_mem_pool_node *xe_mem_pool_alloc_node(void);
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int xe_mem_pool_insert_node(struct xe_mem_pool *pool,
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struct xe_mem_pool_node *node, u32 size);
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void xe_mem_pool_free_node(struct xe_mem_pool_node *node);
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void *xe_mem_pool_node_cpu_addr(struct xe_mem_pool_node *node);
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void xe_mem_pool_dump(struct xe_mem_pool *pool, struct drm_printer *p);
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#endif
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