mirror of
https://github.com/torvalds/linux.git
synced 2026-10-17 06:20:02 +02:00
The GPU's ROM may begin with an Init-from-ROM (IFR) header that precedes the PCI Expansion ROM images (VBIOS). When present, the PROM shadow method must parse this header to determine the offset where the PCI ROM images actually begin, and adjust all subsequent reads accordingly. On most GPUs this is not needed because either the PRAMIN shadow method (which reads from VRAM via the display engine) succeeds first, or the IFR microcode has already applied the ROM offset so that PROM reads transparently skip the header. However, on GA100 neither of these applies: GA100 has no display engine (so PRAMIN is unavailable), and the IFR offset is not applied to PROM reads on this GPU. Signed-off-by: Timur Tabi <ttabi@nvidia.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Link: https://patch.msgid.link/20260430223838.2530778-9-ttabi@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org> |
||
|---|---|---|
| .. | ||
| base.c | ||
| bit.c | ||
| boost.c | ||
| conn.c | ||
| cstep.c | ||
| dcb.c | ||
| disp.c | ||
| dp.c | ||
| extdev.c | ||
| fan.c | ||
| gpio.c | ||
| i2c.c | ||
| iccsense.c | ||
| image.c | ||
| init.c | ||
| Kbuild | ||
| M0203.c | ||
| M0205.c | ||
| M0209.c | ||
| mxm.c | ||
| npde.c | ||
| P0260.c | ||
| pcir.c | ||
| perf.c | ||
| pll.c | ||
| pmu.c | ||
| power_budget.c | ||
| priv.h | ||
| ramcfg.c | ||
| rammap.c | ||
| shadow.c | ||
| shadowacpi.c | ||
| shadowof.c | ||
| shadowpci.c | ||
| shadowramin.c | ||
| shadowrom.c | ||
| therm.c | ||
| timing.c | ||
| vmap.c | ||
| volt.c | ||
| vpstate.c | ||
| xpio.c | ||