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35349695ad
Remove LT PHY specific state verification as DPLL framework
has state verification check.
v2: Reuse intel_lt_phy_pll_compare_hw_state() as only config[0]
and config[0] parameters are reliable with LT PHY (Suraj)
v3: Rephrase handling of LT PHY case when verifying the state (CI)
v4: Fix checkpatch warning of line length exceeding 100 columns
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-23-mika.kahola@intel.com
54 lines
1.9 KiB
C
54 lines
1.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2025 Intel Corporation
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*/
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#ifndef __INTEL_LT_PHY_H__
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#define __INTEL_LT_PHY_H__
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#include <linux/types.h>
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struct drm_printer;
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struct intel_atomic_state;
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struct intel_display;
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struct intel_dpll;
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struct intel_dpll_hw_state;
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struct intel_encoder;
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struct intel_crtc_state;
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struct intel_crtc;
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struct intel_lt_phy_pll_state;
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void intel_lt_phy_pll_enable(struct intel_encoder *encoder,
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struct intel_dpll *pll,
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const struct intel_dpll_hw_state *dpll_hw_state);
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void intel_lt_phy_pll_disable(struct intel_encoder *encoder);
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int
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intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder,
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struct intel_dpll_hw_state *hw_state);
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void intel_lt_phy_tbt_pll_calc_state(struct intel_dpll_hw_state *hw_state);
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int intel_lt_phy_calc_port_clock(struct intel_display *display,
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const struct intel_lt_phy_pll_state *lt_state);
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void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_lt_phy_dump_hw_state(struct drm_printer *p,
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const struct intel_lt_phy_pll_state *hw_state);
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bool
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intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a,
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const struct intel_lt_phy_pll_state *b);
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bool intel_lt_phy_tbt_pll_readout_hw_state(struct intel_display *display,
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struct intel_dpll *pll,
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struct intel_dpll_hw_state *hw_state);
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bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
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struct intel_lt_phy_pll_state *pll_state);
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int
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intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state,
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u32 frequency_khz);
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void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
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struct intel_dpll *pll,
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const struct intel_dpll_hw_state *dpll_hw_state);
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void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);
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void intel_lt_phy_verify_plls(struct intel_display *display);
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#endif /* __INTEL_LT_PHY_H__ */
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