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CXL core type2 support: cxl: Support dpa without a mailbox cxl: Support Type2 cxl regs mapping CXL test type2 support: cxl/test: Rework cxl_type2_mem_init() to use cxl_mock_platform_device_add() cxl/test: Add cxl_test accelerator driver cxl/test: Fixup hdm init for auto region to support type2 cxl/test: Propagate -ENOMEM on platform_device_alloc() failures cxl/test: Add hierarchy enumeration support for type2 device cxl/test: Refactor platform device enumerations cxl/test: Add type2 support for mock CFMWS0 cxl/test: Add test for module parameters CXL port error handling support prep patches: cxl: Rename find_cxl_port() to find_cxl_port_by_dport() cxl: Tighten CPER kfifo registration API and symbol visibility acpi/apei/ghes: Use raw_spinlock_t for CXL CPER work locks cxl/ras: Fix cxl_rch_get_aer_severity() wrong severity register cxl/ras: Fix cxl_rch_get_aer_info() out-of-bounds AER register read CXL misc patches: cxl/Documentation: Spell out globbed sysfs attribute names cxl/test: Assign one mock memdev a full-width serial number cxl/core: Format the memdev serial number as unsigned in TP_printk cxl/pmem: Format the nvdimm serial number as unsigned decimal cxl: Use %pe to print error pointers cxl: Deny Features commands on the RAW mailbox path CXL fixes: cxl/region: Use __free(put_device) in find_pos_and_ways() cxl/region: Fix use-after-free in find_pos_and_ways() error path cxl/features: Clamp Get Feature output size to the remaining buffer cxl/features: Reject Set Features output buffer smaller than the header cxl/features: Reject Get Feature count larger than the output buffer cxl/port: Restart port enumeration when a sibling adds the dport first cxl/features: Serialize multi-part Get/Set Feature transfers cxl/pci: Honor -EPROBE_DEFER from component register setup cxl/mbox: Break poison list loop on an empty payload cxl/memdev: Fix firmware upload exact-fit handling cxl/features: bound fwctl command payload to the input buffer cxl/mce: Make the MCE notifier per-region cxl/pci: Remove incorrect mbox.valid check in cxl_pci_type3_init_mailbox() cxl: docs/linux/dax-driver - fix typos cxl: fix mailbox return code description typo cxl/mbox: Clamp mailbox output allocation to the payload size -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5DAy15EJMCV1R6v9YGjFFmlTOEoFAmqDPQEACgkQYGjFFmlT OEqNBw/+LP25RACa3Jtwb53KtycNi/MzyVBXV311rDaBGzSKUixkO9LYCIV76lI/ 86x+U7+fmXBTmynD8lNwgVUw2P18xguYPe3bfn9qlmC2AZ6zmyeEzRU4p4BRzxTv iE9utK7DLetNRLGMnYIz3ziHLaSaZf0RslvecXF61y+nNhfd5N/pg52Bw1dUdpRi 91m8v0JJ+v+OtEKwCsinV4lck07WRmk+roCFFqcwIdR4GkhKBKiipf+Vv9EoR/k5 zBkhPazWFNKmnvf3VAY+vvo/Nh+wmHOrLqJUi5QYOQDXUGiJgt6/2JDVDBrY+QZL 1I7BN66d4PE7lQnYpZHnu/aSlhcV/QI/4tKRnt1eZ7kIFO0s7QbPo7Fg8+Ql+43m V/qYWPxC6BgQXHBYAcnvJZO6COL1EIG1+sGy+x6kInTn33KPBeit6Ru7c3wxmYFa jXfdrudfN+0fUtjEhrMb2IIxfhNV5O/wLQqlj2c8vXgRmZo9dElyyiIxOC87EnOG sWD2Z+4z9Id4egU6bU5iTdVdT+CW0WkUHAd9gtmYwlr9Ttrqh01CTu7vc0XEKyKS j5YU/3sV2H8KbU5PqVo9GeYRukylESe+w42+7UemBUSzX6OIDaiNNokmDt9L+Cg7 pdBr1qzjasR7XIDXNP9IRdkPKTgqDbSrg/gVIZJe+j7OsUHu0Nw= =6Bd/ -----END PGP SIGNATURE----- Merge tag 'cxl-for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl Pull CXL updates from Dave Jiang: "This includes the remaining patches to complete the basic support for CXL type2 (accelerators) drivers by the CXL core. A set of unit testing support to catch regressions for the CXL core type2 exported functions has also been added. The actual CXL type 2 driver support for the AMD Solarflare NIC driver has been picked up by net-dev. A set of preparatory patches has been picked up from the CXL port error handling series in order to reduce the number of patches in that series for review. The rest of that series is getting close to be merged but was not ready for the 7.3 merge window. There are also a number of misc patches and a large number of bug fixes against pre-existing issues flagged by sashiko reviews as contributors post new patches on the mailing list. We will continue to work through the sashiko raised issues as they show up." * tag 'cxl-for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (35 commits) cxl/Documentation: Spell out globbed sysfs attribute names cxl: Rename find_cxl_port() to find_cxl_port_by_dport() cxl: Tighten CPER kfifo registration API and symbol visibility acpi/apei/ghes: Use raw_spinlock_t for CXL CPER work locks cxl/ras: Fix cxl_rch_get_aer_severity() wrong severity register cxl/ras: Fix cxl_rch_get_aer_info() out-of-bounds AER register read cxl/test: Assign one mock memdev a full-width serial number cxl/core: Format the memdev serial number as unsigned in TP_printk cxl/pmem: Format the nvdimm serial number as unsigned decimal cxl: Use %pe to print error pointers cxl/region: Use __free(put_device) in find_pos_and_ways() cxl/region: Fix use-after-free in find_pos_and_ways() error path cxl: Deny Features commands on the RAW mailbox path cxl/features: Clamp Get Feature output size to the remaining buffer cxl/features: Reject Set Features output buffer smaller than the header cxl/features: Reject Get Feature count larger than the output buffer cxl/port: Restart port enumeration when a sibling adds the dport first cxl/features: Serialize multi-part Get/Set Feature transfers cxl/pci: Honor -EPROBE_DEFER from component register setup cxl/mbox: Break poison list loop on an empty payload ... |
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| .. | ||
| apei-base.c | ||
| apei-internal.h | ||
| bert.c | ||
| einj-core.c | ||
| einj-cxl.c | ||
| erst-dbg.c | ||
| erst.c | ||
| ghes_helpers.c | ||
| ghes-nvidia.c | ||
| ghes.c | ||
| hest.c | ||
| Kconfig | ||
| Makefile | ||