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AIE2 and AIE4 use similar interfaces to the SMU (System Management Unit). Move the SMU implementation into aie_smu.c and provide common interfaces for both platforms. This allows AIE2 and AIE4 to share the same implementation and reduces code duplication. Co-developed-by: Hayden Laccabue <Hayden.Laccabue@amd.com> Signed-off-by: Hayden Laccabue <Hayden.Laccabue@amd.com> Signed-off-by: David Zhang <yidong.zhang@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://patch.msgid.link/20260330163705.3153647-6-lizhi.hou@amd.com
154 lines
3.3 KiB
C
154 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2026, Advanced Micro Devices, Inc.
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*/
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#include "drm/amdxdna_accel.h"
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#include <drm/drm_device.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_print.h>
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#include <drm/gpu_scheduler.h>
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#include <linux/iopoll.h>
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#include "aie.h"
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#define SMU_RESULT_OK 1
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/* SMU commands */
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#define AIE_SMU_POWER_ON 0x3
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#define AIE_SMU_POWER_OFF 0x4
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#define AIE_SMU_SET_MPNPUCLK_FREQ 0x5
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#define AIE_SMU_SET_HCLK_FREQ 0x6
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#define AIE_SMU_SET_SOFT_DPMLEVEL 0x7
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#define AIE_SMU_SET_HARD_DPMLEVEL 0x8
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#define SMU_REG(s, reg) ((s)->smu_regs[reg])
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struct smu_device {
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struct drm_device *ddev;
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struct smu_config conf;
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void __iomem *smu_regs[SMU_MAX_REGS];
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};
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static int aie_smu_exec(struct smu_device *smu, u32 reg_cmd, u32 reg_arg, u32 *out)
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{
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u32 resp;
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int ret;
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writel(0, SMU_REG(smu, SMU_RESP_REG));
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writel(reg_arg, SMU_REG(smu, SMU_ARG_REG));
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writel(reg_cmd, SMU_REG(smu, SMU_CMD_REG));
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/* Clear and set SMU_INTR_REG to kick off */
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writel(0, SMU_REG(smu, SMU_INTR_REG));
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writel(1, SMU_REG(smu, SMU_INTR_REG));
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ret = readx_poll_timeout(readl, SMU_REG(smu, SMU_RESP_REG), resp,
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resp, AIE_INTERVAL, AIE_TIMEOUT);
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if (ret) {
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drm_err(smu->ddev, "smu cmd %d timed out", reg_cmd);
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return ret;
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}
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if (out)
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*out = readl(SMU_REG(smu, SMU_OUT_REG));
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if (resp != SMU_RESULT_OK) {
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drm_err(smu->ddev, "smu cmd %d failed, 0x%x", reg_cmd, resp);
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return -EINVAL;
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}
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return 0;
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}
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int aie_smu_init(struct smu_device *smu)
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{
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int ret;
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/*
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* Failing to set power off indicates an unrecoverable hardware or
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* firmware error.
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*/
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ret = aie_smu_exec(smu, AIE_SMU_POWER_OFF, 0, NULL);
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if (ret) {
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drm_err(smu->ddev, "Access power failed, ret %d", ret);
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return ret;
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}
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ret = aie_smu_exec(smu, AIE_SMU_POWER_ON, 0, NULL);
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if (ret) {
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drm_err(smu->ddev, "Power on failed, ret %d", ret);
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return ret;
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}
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return 0;
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}
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void aie_smu_fini(struct smu_device *smu)
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{
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int ret;
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ret = aie_smu_exec(smu, AIE_SMU_POWER_OFF, 0, NULL);
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if (ret)
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drm_err(smu->ddev, "Power off failed, ret %d", ret);
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}
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int aie_smu_set_clocks(struct smu_device *smu, u32 *npuclk, u32 *hclk)
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{
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int ret;
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if (npuclk) {
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ret = aie_smu_exec(smu, AIE_SMU_SET_MPNPUCLK_FREQ, *npuclk, npuclk);
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if (ret) {
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drm_err(smu->ddev, "Set mpnpu clock to %d failed, ret %d", *npuclk, ret);
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return ret;
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}
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}
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if (hclk) {
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ret = aie_smu_exec(smu, AIE_SMU_SET_HCLK_FREQ, *hclk, hclk);
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if (ret) {
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drm_err(smu->ddev, "Set hclock to %d failed, ret %d",
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*hclk, ret);
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return ret;
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}
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}
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return 0;
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}
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int aie_smu_set_dpm(struct smu_device *smu, u32 dpm_level)
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{
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int ret;
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ret = aie_smu_exec(smu, AIE_SMU_SET_HARD_DPMLEVEL, dpm_level, NULL);
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if (ret) {
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drm_err(smu->ddev, "Set hard dpm level %d failed, ret %d",
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dpm_level, ret);
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return ret;
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}
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ret = aie_smu_exec(smu, AIE_SMU_SET_SOFT_DPMLEVEL, dpm_level, NULL);
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if (ret) {
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drm_err(smu->ddev, "Set soft dpm level %d failed, ret %d",
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dpm_level, ret);
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return ret;
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}
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return 0;
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}
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struct smu_device *aiem_smu_create(struct drm_device *ddev, struct smu_config *conf)
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{
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struct smu_device *smu;
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smu = drmm_kzalloc(ddev, sizeof(*smu), GFP_KERNEL);
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if (!smu)
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return NULL;
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smu->ddev = ddev;
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memcpy(smu->smu_regs, conf->smu_regs, sizeof(smu->smu_regs));
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return smu;
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}
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