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- musl libc compatibility - vDSO installation fix - TLB sync race fix for recent SMP support - build fix for 32-bit with Clang 20/21 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEpeA8sTs3M8SN2hR410qiO8sPaAAFAmnmKS4ACgkQ10qiO8sP aAD2+w//dOOblgUYgQJUXIxHpS7Gcb3Tm+a7ujC23q/kWf/pc8milCSf+zoxzUXL 23Vwh4Gt4KrHKp8lG1gU3xZqV0qwhXNi5HO2hMpB0ioIVpX3TcrUhFbp/Oirvhgi 3PvnvsFtUlW82DFgewB98tefXZSAlG/pg+RjQ3weHfEo+xQbjYc+kR8o59tN8LNR Ea4rrxyjsr3KN2yBNaFpDkMchudP6XWgKByAZBxZ2FofC3zuVRCyF8ThDfQl/3/W muSqX+2iuKjGpmxV0XWt72hYOhNYjBtDY7f4EPe6sbUy+PU6SjD9h/s7VTyVHgZR 3Sii9AQLLJNYPoglExMfmWfeUnJCUJNNTLUze+ZtnhURZQYTvyJRzVmKj6fDPjK2 jGEKXanfZCK9Cfgy2f2xbQxCxhAVwz6QT0XaQO2dZBXa0anzG+2HM0Zn8MNa9jbU +Lm11k1jd1QBifr+5zeni98KHt2mf77blCny8TraODgLNgWUVi5kMkPF4bZgD4Qj udMU9lOkTD08R89hG/Le9TsB+NIpPauyNxDHUpC/VDterFdZqFvmOFT6afTo/4RZ nXNVdL1tn+7O7v0bLdbyhXwj2her1GDbe6HZ5eTNqmjcOthcgI3gF2stDfFhEbNb /wMHnpGPncMeEI8YWtWOFA4FA5T32+LafLCKhuRJdaw0+f/NMOo= =oovZ -----END PGP SIGNATURE----- Merge tag 'uml-for-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux Pull uml updates from Johannes Berg: "Mostly cleanups and small things, notably: - musl libc compatibility - vDSO installation fix - TLB sync race fix for recent SMP support - build fix for 32-bit with Clang 20/21" * tag 'uml-for-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux: um: Disable GCOV_PROFILE_ALL on 32-bit UML with Clang 20/21 um: drivers: call kernel_strrchr() explicitly in cow_user.c um: Replace strncpy() with strnlen()+memcpy_and_pad() in strncpy_chunk_from_user() x86/um: fix vDSO installation um: Remove CONFIG_FRAME_WARN from x86_64_defconfig um: Fix pte_read() and pte_exec() for kernel mappings um: Fix potential race condition in TLB sync um: time-travel: clean up kernel-doc warnings um: avoid struct sigcontext redefinition with musl um: fix address-of CMSG_DATA() rvalue in stub
329 lines
8.5 KiB
C
329 lines
8.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
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* Copyright 2003 PathScale, Inc.
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* Derived from include/asm-i386/pgtable.h
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*/
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#ifndef __UM_PGTABLE_H
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#define __UM_PGTABLE_H
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#include <asm/page.h>
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#include <linux/mm_types.h>
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#define _PAGE_PRESENT 0x001
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#define _PAGE_NEEDSYNC 0x002
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#define _PAGE_RW 0x020
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#define _PAGE_USER 0x040
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#define _PAGE_ACCESSED 0x080
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#define _PAGE_DIRTY 0x100
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/* If _PAGE_PRESENT is clear, we use these: */
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#define _PAGE_PROTNONE 0x010 /* if the user mapped it with PROT_NONE;
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pte_present gives true */
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/* We borrow bit 10 to store the exclusive marker in swap PTEs. */
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#define _PAGE_SWP_EXCLUSIVE 0x400
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#if CONFIG_PGTABLE_LEVELS == 4
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#include <asm/pgtable-4level.h>
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#elif CONFIG_PGTABLE_LEVELS == 2
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#include <asm/pgtable-2level.h>
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#else
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#error "Unsupported number of page table levels"
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#endif
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extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
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/* Just any arbitrary offset to the start of the vmalloc VM area: the
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* current 8MB value just means that there will be a 8MB "hole" after the
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* physical memory until the kernel virtual memory starts. That means that
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* any out-of-bounds memory accesses will hopefully be caught.
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* The vmalloc() routines leaves a hole of 4kB between each vmalloced
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* area for the same reason. ;)
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*/
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#ifndef COMPILE_OFFSETS
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#include <as-layout.h> /* for high_physmem */
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#endif
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#define VMALLOC_OFFSET (__va_space)
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#define VMALLOC_START ((high_physmem + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
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#define VMALLOC_END (TASK_SIZE-2*PAGE_SIZE)
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#define MODULES_VADDR VMALLOC_START
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#define MODULES_END VMALLOC_END
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#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
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#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
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#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
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#define __PAGE_KERNEL_EXEC \
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(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
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#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
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#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
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#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
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#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
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#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
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#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
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/*
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* The i386 can't do page protection for execute, and considers that the same
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* are read.
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* Also, write permissions imply read permissions. This is the closest we can
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* get..
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*/
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#define pte_clear(mm, addr, xp) pte_set_val(*(xp), (phys_t) 0, __pgprot(_PAGE_NEEDSYNC))
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#define pmd_none(x) (!((unsigned long)pmd_val(x) & ~_PAGE_NEEDSYNC))
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#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
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#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
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#define pmd_clear(xp) do { pmd_val(*(xp)) = _PAGE_NEEDSYNC; } while (0)
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#define pmd_needsync(x) (pmd_val(x) & _PAGE_NEEDSYNC)
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#define pmd_mkuptodate(x) (pmd_val(x) &= ~_PAGE_NEEDSYNC)
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#define pud_needsync(x) (pud_val(x) & _PAGE_NEEDSYNC)
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#define pud_mkuptodate(x) (pud_val(x) &= ~_PAGE_NEEDSYNC)
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#define p4d_needsync(x) (p4d_val(x) & _PAGE_NEEDSYNC)
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#define p4d_mkuptodate(x) (p4d_val(x) &= ~_PAGE_NEEDSYNC)
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#define pmd_pfn(pmd) (pmd_val(pmd) >> PAGE_SHIFT)
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#define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK)
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
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/*
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* =================================
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* Flags checking section.
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* =================================
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*/
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static inline int pte_none(pte_t pte)
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{
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return pte_is_zero(pte);
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}
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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static inline int pte_read(pte_t pte)
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{
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return !pte_get_bits(pte, _PAGE_PROTNONE);
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}
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static inline int pte_exec(pte_t pte)
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{
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return !pte_get_bits(pte, _PAGE_PROTNONE);
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}
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static inline int pte_write(pte_t pte)
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{
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return((pte_get_bits(pte, _PAGE_RW)) &&
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!(pte_get_bits(pte, _PAGE_PROTNONE)));
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}
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static inline int pte_dirty(pte_t pte)
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{
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return pte_get_bits(pte, _PAGE_DIRTY);
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}
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static inline int pte_young(pte_t pte)
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{
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return pte_get_bits(pte, _PAGE_ACCESSED);
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}
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static inline int pte_needsync(pte_t pte)
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{
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return pte_get_bits(pte, _PAGE_NEEDSYNC);
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}
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/*
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* =================================
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* Flags setting section.
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* =================================
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*/
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static inline pte_t pte_mkclean(pte_t pte)
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{
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pte_clear_bits(pte, _PAGE_DIRTY);
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return(pte);
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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pte_clear_bits(pte, _PAGE_ACCESSED);
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return(pte);
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}
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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pte_clear_bits(pte, _PAGE_RW);
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return pte;
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}
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static inline pte_t pte_mkread(pte_t pte)
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{
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pte_set_bits(pte, _PAGE_USER);
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return pte;
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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pte_set_bits(pte, _PAGE_DIRTY);
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return(pte);
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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pte_set_bits(pte, _PAGE_ACCESSED);
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return(pte);
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}
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static inline pte_t pte_mkwrite_novma(pte_t pte)
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{
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pte_set_bits(pte, _PAGE_RW);
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return pte;
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}
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static inline pte_t pte_mkuptodate(pte_t pte)
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{
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pte_clear_bits(pte, _PAGE_NEEDSYNC);
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return pte;
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}
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static inline pte_t pte_mkneedsync(pte_t pte)
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{
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pte_set_bits(pte, _PAGE_NEEDSYNC);
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return(pte);
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}
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static inline void set_pte(pte_t *pteptr, pte_t pteval)
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{
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pte_copy(*pteptr, pteval);
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/* If it's a swap entry, it needs to be marked _PAGE_NEEDSYNC so
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* update_pte_range knows to unmap it.
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*/
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*pteptr = pte_mkneedsync(*pteptr);
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}
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#define PFN_PTE_SHIFT PAGE_SHIFT
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static inline void um_tlb_mark_sync(struct mm_struct *mm, unsigned long start,
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unsigned long end)
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{
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guard(spinlock_irqsave)(&mm->context.sync_tlb_lock);
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if (!mm->context.sync_tlb_range_to) {
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mm->context.sync_tlb_range_from = start;
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mm->context.sync_tlb_range_to = end;
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} else {
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if (start < mm->context.sync_tlb_range_from)
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mm->context.sync_tlb_range_from = start;
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if (end > mm->context.sync_tlb_range_to)
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mm->context.sync_tlb_range_to = end;
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}
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}
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#define set_ptes set_ptes
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static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t pte, int nr)
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{
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/* Basically the default implementation */
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size_t length = nr * PAGE_SIZE;
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for (;;) {
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set_pte(ptep, pte);
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if (--nr == 0)
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break;
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ptep++;
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pte = __pte(pte_val(pte) + (nr << PFN_PTE_SHIFT));
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}
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um_tlb_mark_sync(mm, addr, addr + length);
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}
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#define __HAVE_ARCH_PTE_SAME
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static inline int pte_same(pte_t pte_a, pte_t pte_b)
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{
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return !((pte_val(pte_a) ^ pte_val(pte_b)) & ~_PAGE_NEEDSYNC);
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}
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#define __virt_to_page(virt) phys_to_page(__pa(virt))
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#define virt_to_page(addr) __virt_to_page((const unsigned long) addr)
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static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
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{
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pte_t pte;
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pte_set_val(pte, pfn_to_phys(pfn), pgprot);
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return pte;
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}
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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pte_set_val(pte, (pte_val(pte) & _PAGE_CHG_MASK), newprot);
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return pte;
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}
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/*
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* the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
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*
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* this macro returns the index of the entry in the pmd page which would
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* control the given virtual address
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*/
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#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
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struct mm_struct;
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extern pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr);
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#define update_mmu_cache(vma,address,ptep) do {} while (0)
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#define update_mmu_cache_range(vmf, vma, address, ptep, nr) do {} while (0)
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/*
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* Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
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* are !pte_none() && !pte_present().
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*
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* Format of swap PTEs:
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*
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* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
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* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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* <--------------- offset ----------------> E < type -> 0 0 0 1 0
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*
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* E is the exclusive marker that is not stored in swap entries.
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* _PAGE_NEEDSYNC (bit 1) is always set to 1 in set_pte().
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*/
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#define __swp_type(x) (((x).val >> 5) & 0x1f)
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#define __swp_offset(x) ((x).val >> 11)
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#define __swp_entry(type, offset) \
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((swp_entry_t) { (((type) & 0x1f) << 5) | ((offset) << 11) })
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#define __pte_to_swp_entry(pte) \
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((swp_entry_t) { pte_val(pte_mkuptodate(pte)) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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static inline bool pte_swp_exclusive(pte_t pte)
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{
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return pte_get_bits(pte, _PAGE_SWP_EXCLUSIVE);
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}
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static inline pte_t pte_swp_mkexclusive(pte_t pte)
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{
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pte_set_bits(pte, _PAGE_SWP_EXCLUSIVE);
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return pte;
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}
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static inline pte_t pte_swp_clear_exclusive(pte_t pte)
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{
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pte_clear_bits(pte, _PAGE_SWP_EXCLUSIVE);
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return pte;
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}
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#endif
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