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495bc70aa3
Move GR_NUM / VX_NUM macros to separate insn-common-asm.h header file so they can be reused for non-fpu insn constructs. Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
54 lines
1.2 KiB
C
54 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Assembler helper macros to generate .byte/.word code for instructions
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* that are unknown to older binutils versions.
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*/
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#ifndef __ASM_S390_INSN_COMMON_ASM_H
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#define __ASM_S390_INSN_COMMON_ASM_H
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#ifdef __ASSEMBLER__
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/*
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* GR_NUM - Retrieve general-purpose register number
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*
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* @opd: Operand to store register number
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* @gr: String designation register in the format "%rN"
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*/
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.macro GR_NUM opd gr
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\opd = 255
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.irp rs,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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.ifc \gr,%r\rs
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\opd = \rs
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.endif
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.endr
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.if \opd == 255
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\opd = \gr
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.endif
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.endm
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/*
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* VX_NUM - Retrieve vector register number
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*
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* @opd: Operand to store register number
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* @vxr: String designation register in the format "%vN"
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*
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* The vector register number is used for as input number to the
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* instruction and, as well as, to compute the RXB field of the
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* instruction.
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*/
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.macro VX_NUM opd vxr
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\opd = 255
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.irp vs,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
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.ifc \vxr,%v\vs
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\opd = \vs
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.endif
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.endr
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.if \opd == 255
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\opd = \vxr
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.endif
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.endm
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#endif /* __ASSEMBLER__ */
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#endif /* __ASM_S390_INSN_COMMON_ASM_H */
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