linux/arch/riscv/lib
Dmitry Antipov a354b8de9a riscv: add platform-specific double word shifts for riscv32
Add riscv32-specific '__ashldi3()', '__ashrdi3()', and '__lshrdi3()'. 
Initially it was intended to fix the following link error observed when
building EFI-enabled kernel with CONFIG_EFI_STUB=y and
CONFIG_EFI_GENERIC_STUB=y:

riscv32-linux-gnu-ld: ./drivers/firmware/efi/libstub/lib-cmdline.stub.o: in function `__efistub_.L49':
__efistub_cmdline.c:(.init.text+0x1f2): undefined reference to `__efistub___ashldi3'
riscv32-linux-gnu-ld: __efistub_cmdline.c:(.init.text+0x202): undefined reference to `__efistub___lshrdi3'

Reported at [1] trying to build
https://patchew.org/linux/20260212164413.889625-1-dmantipov@yandex.ru,
tested with 'qemu-system-riscv32 -M virt' only.

Link: https://lore.kernel.org/20260519172259.908980-7-dmantipov@yandex.ru
Signed-off-by: Dmitry Antipov <dmantipov@yandex.ru>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202603041925.KLKqpK6N-lkp@intel.com [1]
Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Charlie Jenkins <thecharlesjenkins@gmail.com>
Assisted-by: Gemini:gemini-3.1-pro-preview sashiko
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Alexandre Ghiti <alex@ghiti.fr>
Cc: Andriy Shevchenko <andriy.shevchenko@intel.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-05-28 21:24:51 -07:00
..
ashldi3.S riscv: add platform-specific double word shifts for riscv32 2026-05-28 21:24:51 -07:00
ashrdi3.S riscv: add platform-specific double word shifts for riscv32 2026-05-28 21:24:51 -07:00
clear_page.S use linux/export.h rather than asm-generic/export.h 2024-01-09 20:10:40 -08:00
csum.c riscv: fix various typos in comments and code 2026-04-04 18:42:39 -06:00
delay.c include/linux/delay.h: replace kernel.h with the necessary inclusions 2021-11-09 10:02:49 -08:00
error-inject.c riscv: Add support for function error injection 2021-01-14 15:09:09 -08:00
lshrdi3.S riscv: add platform-specific double word shifts for riscv32 2026-05-28 21:24:51 -07:00
Makefile riscv: add platform-specific double word shifts for riscv32 2026-05-28 21:24:51 -07:00
memcpy.S riscv: Use SYM_*() assembly macros instead of deprecated ones 2023-11-06 09:42:47 -08:00
memmove.S riscv: fix various typos in comments and code 2026-04-04 18:42:39 -06:00
memset.S RISC-V: lib: Add pi aliases for string functions 2024-08-05 12:06:39 -07:00
riscv_v_helpers.c riscv: make unsafe user copy routines use existing assembly routines 2025-06-05 11:39:15 -07:00
strchr.S riscv: lib: add strchr() implementation 2026-04-04 18:42:44 -06:00
strcmp.S RISC-V: separate Zbb optimisations requiring and not requiring toolchain support 2025-03-18 08:53:02 +00:00
strlen.S riscv: lib: optimize strlen loop efficiency 2026-02-09 15:27:33 -07:00
strncmp.S RISC-V: separate Zbb optimisations requiring and not requiring toolchain support 2025-03-18 08:53:02 +00:00
strnlen.S riscv: lib: add strnlen() implementation 2026-04-04 18:42:44 -06:00
strrchr.S riscv: lib: add strrchr() implementation 2026-04-04 18:42:44 -06:00
tishift.S use linux/export.h rather than asm-generic/export.h 2024-01-09 20:10:40 -08:00
uaccess_vector.S riscv: make unsafe user copy routines use existing assembly routines 2025-06-05 11:39:15 -07:00
uaccess.S riscv: make unsafe user copy routines use existing assembly routines 2025-06-05 11:39:15 -07:00