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On 32-bit book3s with hash-MMUs, tlb_flush() was a no-op. This was unnoticed because all uses until recently were for unmaps, and thus handled by __tlb_remove_tlb_entry(). After commit4a18419f71("mm/mprotect: use mmu_gather") in kernel 5.19, tlb_gather_mmu() started being used for mprotect as well. This caused mprotect to simply not work on these machines: int *ptr = mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0); *ptr = 1; // force HPTE to be created mprotect(ptr, 4096, PROT_READ); *ptr = 2; // should segfault, but succeeds Fixed by making tlb_flush() actually flush TLB pages. This finally agrees with the behaviour of boot3s64's tlb_flush(). Fixes:4a18419f71("mm/mprotect: use mmu_gather") Cc: stable@vger.kernel.org Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com> Signed-off-by: Dave Vasilevsky <dave@vasilevsky.ca> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20251116-vasi-mprotect-g3-v3-1-59a9bd33ba00@vasilevsky.ca
95 lines
2.3 KiB
C
95 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H
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#define _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H
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#include <linux/build_bug.h>
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#define MMU_NO_CONTEXT (0)
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/*
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* TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
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*/
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void hash__flush_tlb_mm(struct mm_struct *mm);
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void hash__flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
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void hash__flush_range(struct mm_struct *mm, unsigned long start, unsigned long end);
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void hash__flush_gather(struct mmu_gather *tlb);
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#ifdef CONFIG_SMP
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void _tlbie(unsigned long address);
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#else
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static inline void _tlbie(unsigned long address)
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{
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asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
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}
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#endif
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void _tlbia(void);
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/*
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* Called at the end of a mmu_gather operation to make sure the
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* TLB flush is completely done.
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*/
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static inline void tlb_flush(struct mmu_gather *tlb)
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{
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/* 603 needs to flush the whole TLB here since it doesn't use a hash table. */
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if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
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hash__flush_gather(tlb);
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else
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_tlbia();
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}
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static inline void flush_range(struct mm_struct *mm, unsigned long start, unsigned long end)
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{
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start &= PAGE_MASK;
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if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
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hash__flush_range(mm, start, end);
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else if (end - start <= PAGE_SIZE)
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_tlbie(start);
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else
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_tlbia();
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}
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static inline void flush_tlb_mm(struct mm_struct *mm)
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{
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if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
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hash__flush_tlb_mm(mm);
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else
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_tlbia();
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}
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static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
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{
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if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
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hash__flush_tlb_page(vma, vmaddr);
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else
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_tlbie(vmaddr);
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}
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static inline void
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flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
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{
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flush_range(vma->vm_mm, start, end);
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}
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static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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flush_range(&init_mm, start, end);
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}
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static inline void local_flush_tlb_page(struct vm_area_struct *vma,
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unsigned long vmaddr)
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{
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flush_tlb_page(vma, vmaddr);
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}
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static inline void local_flush_tlb_page_psize(struct mm_struct *mm,
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unsigned long vmaddr, int psize)
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{
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flush_range(mm, vmaddr, vmaddr);
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}
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static inline void local_flush_tlb_mm(struct mm_struct *mm)
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{
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flush_tlb_mm(mm);
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}
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#endif /* _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H */
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