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15513eefac
The callbacks into the MIPS RB532 platform to read the GPIO pin indicating that the NAND chip is ready are oldschool and does not assign GPIOs as properties to the NAND device. Add a capability to the generic platform NAND chip driver to use a GPIO line to detect if a NAND chip is ready and override the platform-local drv_ready() callback with this check if the GPIO is present. This makes it possible to drop the legacy include header <linux/gpio.h> from the RB532 devices. Signed-off-by: Linus Walleij <linusw@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
355 lines
8.0 KiB
C
355 lines
8.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* RouterBoard 500 Platform devices
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*
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* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
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*/
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/hex.h>
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#include <linux/init.h>
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#include <linux/ctype.h>
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#include <linux/string.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/platnand.h>
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#include <linux/mtd/mtd.h>
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#include <linux/gpio/machine.h>
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#include <linux/gpio/property.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/property.h>
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#include <linux/serial_8250.h>
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#include <asm/bootinfo.h>
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#include <asm/mach-rc32434/rc32434.h>
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#include <asm/mach-rc32434/dma.h>
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#include <asm/mach-rc32434/dma_v.h>
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#include <asm/mach-rc32434/eth.h>
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#include <asm/mach-rc32434/rb.h>
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#include <asm/mach-rc32434/integ.h>
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#include <asm/mach-rc32434/gpio.h>
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#include <asm/mach-rc32434/irq.h>
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#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
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#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
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extern unsigned int idt_cpu_freq;
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static struct mpmc_device dev3;
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static const struct software_node rb532_gpio0_node = {
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.name = "gpio0",
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};
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void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&dev3.lock, flags);
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dev3.state = (dev3.state | or_mask) & ~nand_mask;
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writeb(dev3.state, dev3.base);
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spin_unlock_irqrestore(&dev3.lock, flags);
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}
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EXPORT_SYMBOL(set_latch_u5);
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unsigned char get_latch_u5(void)
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{
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return dev3.state;
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}
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EXPORT_SYMBOL(get_latch_u5);
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static struct resource korina_dev0_res[] = {
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{
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.name = "emac",
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.start = ETH0_BASE_ADDR,
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.end = ETH0_BASE_ADDR + sizeof(struct eth_regs),
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.flags = IORESOURCE_MEM,
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}, {
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.name = "rx",
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.start = ETH0_DMA_RX_IRQ,
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.end = ETH0_DMA_RX_IRQ,
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.flags = IORESOURCE_IRQ
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}, {
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.name = "tx",
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.start = ETH0_DMA_TX_IRQ,
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.end = ETH0_DMA_TX_IRQ,
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.flags = IORESOURCE_IRQ
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}, {
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.name = "dma_rx",
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.start = ETH0_RX_DMA_ADDR,
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.end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "dma_tx",
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.start = ETH0_TX_DMA_ADDR,
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.end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct korina_device korina_dev0_data = {
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.name = "korina0",
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.mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee}
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};
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static struct platform_device korina_dev0 = {
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.id = -1,
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.name = "korina",
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.resource = korina_dev0_res,
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.num_resources = ARRAY_SIZE(korina_dev0_res),
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.dev = {
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.platform_data = &korina_dev0_data.mac,
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}
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};
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static struct resource cf_slot0_res[] = {
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{
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.name = "cf_membase",
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.flags = IORESOURCE_MEM
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}, {
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.name = "cf_irq",
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.start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */
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.end = (8 + 4 * 32 + CF_GPIO_NUM),
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.flags = IORESOURCE_IRQ
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}
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};
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static struct gpiod_lookup_table cf_slot0_gpio_table = {
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.dev_id = "pata-rb532-cf",
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.table = {
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GPIO_LOOKUP("gpio0", CF_GPIO_NUM,
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NULL, GPIO_ACTIVE_HIGH),
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{ },
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},
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};
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static struct platform_device cf_slot0 = {
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.id = -1,
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.name = "pata-rb532-cf",
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.resource = cf_slot0_res,
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.num_resources = ARRAY_SIZE(cf_slot0_res),
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};
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static void rb532_cmd_ctrl(struct nand_chip *chip, int cmd, unsigned int ctrl)
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{
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unsigned char orbits, nandbits;
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if (ctrl & NAND_CTRL_CHANGE) {
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orbits = (ctrl & NAND_CLE) << 1;
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orbits |= (ctrl & NAND_ALE) >> 1;
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nandbits = (~ctrl & NAND_CLE) << 1;
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nandbits |= (~ctrl & NAND_ALE) >> 1;
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set_latch_u5(orbits, nandbits);
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}
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, chip->legacy.IO_ADDR_W);
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}
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static struct resource nand_slot0_res[] = {
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[0] = {
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.name = "nand_membase",
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.flags = IORESOURCE_MEM
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}
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};
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static struct platform_nand_data rb532_nand_data = {
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.ctrl.cmd_ctrl = rb532_cmd_ctrl,
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};
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static const struct property_entry nand0_properties[] = {
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PROPERTY_ENTRY_GPIO("ready-gpios", &rb532_gpio0_node,
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GPIO_RDY, GPIO_ACTIVE_HIGH),
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{ }
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};
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static const struct platform_device_info nand0_info __initconst = {
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.name = "gen_nand",
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.id = PLATFORM_DEVID_NONE,
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.res = nand_slot0_res,
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.num_res = ARRAY_SIZE(nand_slot0_res),
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.data = &rb532_nand_data,
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.size_data = sizeof(struct platform_nand_data),
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.properties = nand0_properties,
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};
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static struct mtd_partition rb532_partition_info[] = {
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{
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.name = "Routerboard NAND boot",
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.offset = 0,
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.size = 4 * 1024 * 1024,
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}, {
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.name = "rootfs",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL,
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}
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};
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static struct platform_device rb532_led = {
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.name = "rb532-led",
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.id = -1,
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};
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static struct resource rb532_wdt_res[] = {
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{
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.name = "rb532_wdt_res",
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.start = INTEG0_BASE_ADDR,
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.end = INTEG0_BASE_ADDR + sizeof(struct integ),
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device rb532_wdt = {
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.name = "rc32434_wdt",
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.id = -1,
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.resource = rb532_wdt_res,
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.num_resources = ARRAY_SIZE(rb532_wdt_res),
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};
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static struct plat_serial8250_port rb532_uart_res[] = {
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{
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.type = PORT_16550A,
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.mapbase = REGBASE + UART0BASE,
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.mapsize = 0x1000,
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.irq = UART0_IRQ,
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.regshift = 2,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
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},
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{
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.flags = 0,
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}
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};
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static struct platform_device rb532_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev.platform_data = &rb532_uart_res,
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};
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static struct platform_device *rb532_devs[] = {
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&korina_dev0,
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&cf_slot0,
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&rb532_led,
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&rb532_uart,
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&rb532_wdt
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};
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static const struct property_entry rb532_button_properties[] = {
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PROPERTY_ENTRY_GPIO("button-gpios", &rb532_gpio0_node,
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GPIO_BTN_S1, GPIO_ACTIVE_LOW),
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{ }
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};
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static const struct platform_device_info rb532_button_info __initconst = {
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.name = "rb532-button",
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.id = PLATFORM_DEVID_NONE,
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.properties = rb532_button_properties,
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};
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/* NAND definitions */
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#define NAND_CHIP_DELAY 25
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static void __init rb532_nand_setup(void)
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{
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switch (mips_machtype) {
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case MACH_MIKROTIK_RB532A:
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set_latch_u5(LO_FOFF | LO_CEX,
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LO_ULED | LO_ALE | LO_CLE | LO_WPX);
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break;
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default:
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set_latch_u5(LO_WPX | LO_FOFF | LO_CEX,
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LO_ULED | LO_ALE | LO_CLE);
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break;
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}
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/* Setup NAND specific settings */
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rb532_nand_data.chip.nr_chips = 1;
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rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);
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rb532_nand_data.chip.partitions = rb532_partition_info;
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rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
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}
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static int __init plat_setup_devices(void)
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{
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struct platform_device *pd;
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int ret;
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/* Look for the CF card reader */
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if (!readl(IDT434_REG_BASE + DEV1MASK))
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rb532_devs[2] = NULL; /* disable cf_slot0 at index 2 */
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else {
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cf_slot0_res[0].start =
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readl(IDT434_REG_BASE + DEV1BASE);
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cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
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}
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/* Read the NAND resources from the device controller */
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nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
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nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
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/* Read and map device controller 3 */
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dev3.base = ioremap(readl(IDT434_REG_BASE + DEV3BASE), 1);
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if (!dev3.base) {
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printk(KERN_ERR "rb532: cannot remap device controller 3\n");
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return -ENXIO;
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}
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/* Initialise the NAND device */
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rb532_nand_setup();
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/* set the uart clock to the current cpu frequency */
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rb532_uart_res[0].uartclk = idt_cpu_freq;
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gpiod_add_lookup_table(&cf_slot0_gpio_table);
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ret = platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
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if (ret)
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return ret;
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/*
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* Stack devices using full info and properties here, after we
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* register the node for the GPIO chip.
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*/
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software_node_register(&rb532_gpio0_node);
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pd = platform_device_register_full(&nand0_info);
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ret = PTR_ERR_OR_ZERO(pd);
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if (ret) {
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pr_err("failed to create NAND slot0 device: %d\n", ret);
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return ret;
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}
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pd = platform_device_register_full(&rb532_button_info);
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ret = PTR_ERR_OR_ZERO(pd);
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if (ret) {
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pr_err("failed to create RB532 button device: %d\n", ret);
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return ret;
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}
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return 0;
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}
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#ifdef CONFIG_NET
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static int __init setup_kmac(char *s)
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{
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printk(KERN_INFO "korina mac = %s\n", s);
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if (!mac_pton(s, korina_dev0_data.mac))
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printk(KERN_ERR "Invalid mac\n");
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return 1;
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}
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__setup("kmac=", setup_kmac);
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#endif /* CONFIG_NET */
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arch_initcall(plat_setup_devices);
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