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Add the device tree of the evaluation board of the EyeQ6Lplus SoC. The board comes with 2GB of RAM and an SPI NAND connected to the octoSPI controller The UART of the SoC is used as the serial console. Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
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| .. | ||
| eyeq5-epm5.dts | ||
| eyeq5-pins.dtsi | ||
| eyeq5.dtsi | ||
| eyeq6h-epm6.dts | ||
| eyeq6h-pins.dtsi | ||
| eyeq6h.dtsi | ||
| eyeq6lplus-epm6.dts | ||
| eyeq6lplus-pins.dtsi | ||
| eyeq6lplus.dtsi | ||
| Makefile | ||