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The generic entry code expects architecture code to provide regs_irqs_disabled(regs) function, but arm64 does not have this and provides interrupts_enabled(regs), which has the opposite polarity. In preparation for moving arm64 over to the generic entry code, relace arm64's interrupts_enabled() with regs_irqs_disabled() and update its callers under arch/arm64. For the moment, a definition of interrupts_enabled() is provided for the GICv3 driver. Once arch/arm implement regs_irqs_disabled(), this can be removed. Delete the fast_interrupts_enabled() macro as it is unused and we don't want any new users to show up. No functional changes. Reviewed-by: Ada Couprie Diaz <ada.coupriediaz@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
29 lines
547 B
C
29 lines
547 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_ARM64_XEN_EVENTS_H
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#define _ASM_ARM64_XEN_EVENTS_H
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#include <asm/ptrace.h>
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#include <asm/atomic.h>
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enum ipi_vector {
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XEN_PLACEHOLDER_VECTOR,
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/* Xen IPIs go here */
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XEN_NR_IPIS,
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};
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static inline int xen_irqs_disabled(struct pt_regs *regs)
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{
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return regs_irqs_disabled(regs);
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}
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#define xchg_xen_ulong(ptr, val) xchg((ptr), (val))
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/* Rebind event channel is supported by default */
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static inline bool xen_support_evtchn_rebind(void)
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{
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return true;
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}
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#endif /* _ASM_ARM64_XEN_EVENTS_H */
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