linux/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi
Frank Li 9276abee59 ARM: dts: lpc: add #address-cells and #size-cells for sram node
Add #address-cells and #size-cells for sram node to fix below DTB_CHECK
warnings:
  arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dtb: sram@2,0 (mmio-sram): '#address-cells' is a required property

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2025-09-11 02:53:59 +03:00

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/*
* NXP LPC435x, LPC433x, LPC4327, LPC4325, LPC4317 and LPC4315 SoC
*
* Copyright 2015 Joachim Eastwood <manabian@gmail.com>
*
* This code is released using a dual license strategy: BSD/GPL
* You can choose the licence that better fits your requirements.
*
* Released under the terms of 3-clause BSD License
* Released under the terms of GNU General Public License Version 2.0
*
*/
/ {
compatible = "nxp,lpc4357";
cpus {
cpu@0 {
compatible = "arm,cortex-m4";
};
};
soc {
sram0: sram@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
sram1: sram@10080000 {
compatible = "mmio-sram";
reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
sram2: sram@20000000 {
compatible = "mmio-sram";
reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
};
};
&eeprom {
status = "okay";
};