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The Aspeed AST2700 SoC integrates the Synopsys DesignWare USB3 core with no vendor glue logic: it is functionally compatible with snps,dwc3, uses the standard DWC3 clocks, and the only SoC-specific part is a USB3 PHY that is handled by a separate driver. Add a dedicated binding document rather than adding the compatible and a conditional to snps,dwc3.yaml. This follows the established per-vendor DWC3 convention (apple,dwc3.yaml, socionext,uniphier-dwc3.yaml, ...) and keeps the AST2700-specific constraints - notably the mandatory USB3 PHY - out of the generic schema. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260710-xhci-v2-1-f292c4f7339a@aspeedtech.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
94 lines
2.0 KiB
YAML
94 lines
2.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/usb/aspeed,dwc3.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Aspeed SuperSpeed DWC3 USB SoC controller
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maintainers:
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- Ryan Chen <ryan_chen@aspeedtech.com>
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description:
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The common content of the node is defined in snps,dwc3.yaml.
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select:
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properties:
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compatible:
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contains:
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const: aspeed,ast2700-xhci
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required:
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- compatible
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properties:
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compatible:
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items:
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- const: aspeed,ast2700-xhci
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- const: snps,dwc3
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Controller bus early clock
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- description: PHY reference clock
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- description: Controller suspend clock
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clock-names:
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items:
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- const: bus_early
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- const: ref
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- const: suspend
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resets:
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maxItems: 1
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phys:
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maxItems: 1
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phy-names:
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const: usb3-phy
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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- phys
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- phy-names
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allOf:
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- $ref: snps,dwc3.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/aspeed,ast2700-scu.h>
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#include <dt-bindings/reset/aspeed,ast2700-scu.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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usb@12030000 {
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compatible = "aspeed,ast2700-xhci", "snps,dwc3";
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reg = <0x0 0x12030000 0x0 0x10000>;
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&syscon0 SCU0_CLK_GATE_PORTAUSB2CLK>,
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<&syscon0 SCU0_CLK_U2PHY_REFCLK>,
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<&syscon0 SCU0_CLK_U2PHY_CLK12M>;
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clock-names = "bus_early", "ref", "suspend";
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resets = <&syscon0 SCU0_RESET_PORTA_XHCI>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb3axh_default &pinctrl_usb2axh_default>;
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phys = <&uphy3a>;
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phy-names = "usb3-phy";
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dr_mode = "host";
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};
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};
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