linux/Documentation/devicetree/bindings/opp
Vivian Wang 1bf99c2a4b dt-bindings: opp-v2: Fix example 3 CPU reg value
Example 3 is a dual-cluster example, meaning that the CPU nodes should
have reg values 0x0, 0x1, 0x100, 0x101. The example incorrectly uses
decimal 0, 1, 100, 101 instead, which seems unintended. Use the correct
hexadecimal values.

Even though the value doesn't change for the first two CPUs, 0 and 1 in
example 3 are changed to 0x0 and 0x1 respectively for consistency. Other
examples all have reg less than 10, so they have not been changed.

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260403-dt-bindings-opp-v2-hex-cpu-reg-v1-1-38a4968ab515@iscas.ac.cn
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-04-07 06:44:43 -05:00
..
allwinner,sun50i-h6-operating-points.yaml dt-bindings: opp: h6: Add A100 operating points 2025-01-09 16:52:29 -06:00
operating-points-v2-ti-cpu.yaml dt-bindings: opp: operating-points-v2-ti-cpu: Describe opp-supported-hw 2024-10-01 14:57:08 +05:30
opp-v1.yaml dt-bindings: arm/cpus: Add missing properties 2025-04-22 09:40:07 -05:00
opp-v2-base.yaml dt-bindings: opp: drop maxItems from inner items 2024-03-11 10:39:24 +05:30
opp-v2-kryo-cpu.yaml dt-bindings: opp: opp-v2-kryo-cpu: Document named opp-microvolt property 2023-10-19 12:16:11 +05:30
opp-v2-qcom-adreno.yaml dt-bindings: opp: adreno: Update regex of OPP entry 2025-07-04 11:09:43 -07:00
opp-v2-qcom-level.yaml
opp-v2.yaml dt-bindings: opp-v2: Fix example 3 CPU reg value 2026-04-07 06:44:43 -05:00
ti,omap-opp-supply.yaml dt-bindings: opp: Convert ti-omap5-opp-supply to json schema 2023-08-21 11:23:34 +05:30