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The ZynqMP clock controller binding shares only #clock-cells with the Versal bindings. Move it to a dedicated xlnx,zynqmp-clk.yaml schema. Also remove "(Optional clock)" from clock description because it is visible from schema itself. Also update versal-firmware example to match changes in xlnx,zynqmp-firmware.yaml. Suggested-by: Rob Herring <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/973a8a5441cf13622594b95dd0dd20a5f42ccece.1783516336.git.michal.simek@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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| xlnx,zynqmp-firmware.yaml | ||