Swamil Jain 9c46924099 dt-bindings: display: ti, am65x-dss: Fix AM62L DSS reg and clock constraints ... The AM62L DSS [1] support incorrectly used the same register and clock constraints as AM65x, but AM62L has a single video port Fix this by adding conditional constraints that properly define the register regions and clocks for AM62L DSS (single video port) versus other AM65x variants (dual video port). [1]: Section 12.7 (Display Subsystem and Peripherals) Link : https://www.ti.com/lit/pdf/sprujb4 Fixes: cb8d432330 ("dt-bindings: display: ti,am65x-dss: Add support for AM62L DSS") Cc: stable@vger.kernel.org Signed-off-by: Swamil Jain <s-jain1@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260415110409.2577633-1-s-jain1@ti.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>		2026-04-16 07:27:24 -05:00
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ti,am65x-dss.yaml	dt-bindings: display: ti, am65x-dss: Fix AM62L DSS reg and clock constraints	2026-04-16 07:27:24 -05:00
ti,am625-oldi.yaml	dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter	2025-06-26 12:37:08 +03:00
ti,dra7-dss.txt	dt-bindings: display/ti: Add optional property to set memory bandwidth limit	2017-12-19 10:32:00 +02:00
ti,j721e-dss.yaml	dt-bindings: display/ti: Simplify dma-coherent property	2025-12-16 07:59:30 -06:00
ti,k2g-dss.yaml	dt-bindings: display: Drop unneeded quotes	2023-03-24 14:20:49 -05:00
ti,omap-dss.txt
ti,omap2-dss.txt	dt-bindings: display/ti: Add optional property to set memory bandwidth limit	2017-12-19 10:32:00 +02:00
ti,omap3-dss.txt	dt-bindings: display/ti: Add optional property to set memory bandwidth limit	2017-12-19 10:32:00 +02:00
ti,omap4-dss.txt	dt-bindings: display/ti: Add optional property to set memory bandwidth limit	2017-12-19 10:32:00 +02:00
ti,omap5-dss.txt	dt-bindings: display/ti: Add optional property to set memory bandwidth limit	2017-12-19 10:32:00 +02:00
ti,tpd12s015.txt