Commit Graph

121 Commits

Author SHA1 Message Date
Algea Cao
37b7830dd3 drm/rockchip: dw_hdmi: Get uboot hdmi color format
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I06bbd4a8888716a4b209a81f219309304a18420f
2022-07-14 14:25:59 +08:00
Algea Cao
dbad11d42f drm/bridge: synopsys: dw-hdmi-qp: Support multiple HDMI debugfs nodes
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ib7be546cba2130a84fe4a82194800d143cdb61d9
2022-04-26 15:43:24 +08:00
Wyon Bi
43f938cfbb drm/rockchip: analogix_dp: Support DP connector
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I338ed6b0478bc1bfd702ed4676384f5fd88fb194
2022-03-24 19:03:30 +08:00
Sugar Zhang
d27ca5b359 drm/bridge: synopsys: dw-hdmi-qp: Fix audio infoframe
AUDI_CONTENTS0: { RSV, HB2, HB1, RSV }
AUDI_CONTENTS1: { PB3, PB2, PB1, PB0 }
AUDI_CONTENTS2: { PB7, PB6, PB5, PB4 }

PB0: CheckSum
PB1: | CT3    | CT2  | CT1  | CT0  | F13  | CC2 | CC1 | CC0 |
PB2: | F27    | F26  | F25  | SF2  | SF1  | SF0 | SS1 | SS0 |
PB3: | F37    | F36  | F35  | F34  | F33  | F32 | F31 | F30 |
PB4: | CA7    | CA6  | CA5  | CA4  | CA3  | CA2 | CA1 | CA0 |
PB5: | DM_INH | LSV3 | LSV2 | LSV1 | LSV0 | F52 | F51 | F50 |
PB6~PB10: Reserved

AUDI_CONTENTS0 default value defined by HDMI specification,
and shall only be changed for debug purposes.
So, we only configure payload byte from PB0~PB7(2 word total).

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Idfbb34ff7f7069af4e73c6995f32eefa798a9450
2022-03-12 16:29:28 +08:00
Sugar Zhang
ea0f840194 drm/bridge: synopsys: dw-hdmi-qp: Fix channel status
* LPCM: BPCUV insertion by hw
* NLPCM/HBR: BPCUV insertion from stream

when BPCUV is from stream, we should not enable hw channel
status override which will replace CS with the hw one.
This fixes DD+ bitstream.

when BPCUV generated from HW, PBIT_FORCE_EN should be set
for Parity bit calculated internally.
This fixes no sound on some display devices.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I3aa0390d9dd7d217853394c74576749c36b84720
2022-03-12 16:29:22 +08:00
Algea Cao
de16913c3b drm/rockchip: dw_hdmi: Make sure dclk is enabled when set audio registers
Change-Id: Idb62c2c9ea0d75d7090ec3e35c7742b0d42b3e43
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2022-03-12 16:29:07 +08:00
Algea Cao
5efa70a0f1 drm/rockchip: dw_hdmi: Support hdmi split mode
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I71c5785ecfb9480f9569d3c55dd634579a5176fb
2022-03-09 16:45:03 +08:00
Wyon Bi
1a4c9d772a drm/bridge: analogix_dp: Rework irq handling
Tested on RK3588.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Iee8bbe592ea89e29b5e412727312398d3cfb3924
2022-02-22 14:53:17 +08:00
Algea Cao
c2af125780 drm/rockchip: dw_hdmi: set rk3588 hdmi grf reg after phy power on
RK3588 dclk is required to access hdmi grf register.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ia7a2f2ab18d8734696b9493340f206aad0168d4c
2022-01-15 19:48:17 +08:00
Algea Cao
b53d1f9467 drm/rockchip: dw_hdmi: Support 8K HDMI output
Support hdmi frl mode and dsc function.
Support max 8K-60Hz RGB 10bit output.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ibc2d48e2b25bc94e4be7ffa9703c400436bdee36
2021-12-08 11:26:13 +08:00
Sugar Zhang
5260237497 Revert "drm/bridge: synopsys: Fix register access panic when PD off"
This reverts commit 6b7fb9a6c9.

The audio regbank of hdmi-qp is drived by audio interface clk, and had
fixed by commits as follows:

[1] 3a7f369b5c ("arm64: dts: rockchip: rk3588: Add aud clk for hdmi nodes")
[2] e108ff9f6f ("drm/rockchip: dw_hdmi: Handle aud clk for hdmi qp")

OTOH, to make android hal happy, we still allow to access hdmi audio even
hdmi is plugged out.

  "hdmi-audio-codec: ASoC: error at snd_soc_dai_startup on i2s-hifi: -19"

Android/Linux should reopen hdmi sound card depends on HPD plug event
to bring back to normal state.

Change-Id: I654fe18a04b750f57c8bd52ef4948a476bc1fa50
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2021-12-01 16:43:15 +08:00
Jiajian Wu
d34e75ac1e drm/bridge: synopsys: Add hook_plugged_cb for dw-hdmi-qp reporting connector status
Signed-off-by: Jiajian Wu <jair.wu@rock-chips.com>
Change-Id: I3103df9f379dfe98a4eb54dc5d3ce9f407038d8c
2021-11-30 18:37:26 +08:00
Wyon Bi
80db5a7bc7 drm/rockchip: analogix_dp: Add support for split mode
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I7be492886ddd595a01415d92ce4a56ce9d69b21b
2021-11-25 16:59:40 +08:00
Sugar Zhang
6b7fb9a6c9 drm/bridge: synopsys: Fix register access panic when PD off
Internal error: synchronous external abort: 96000010 [#1] SMP
Modules linked in: bcmdhd
CPU: 3 PID: 958 Comm: aplay Not tainted 5.10.43 #275
Hardware name: Rockchip RK3588 EVB1 LP4 V10 Board (DT)
pstate: 20400089 (nzCv daIf +PAN -UAO -TCO BTYPE=--)
pc : regmap_mmio_read32le+0x18/0x34
lr : regmap_mmio_read+0x50/0x7c
sp : ffffffc013f7b6e0
x29: ffffffc013f7b6e0 x28: ffffff8406dc9200
x27: 0000000000000000 x26: 0000000000000000
x25: 0000000000000000 x24: 0000000000008106
x23: 0000000000000000 x22: ffffff84013c1400
x21: 0000000000000aa8 x20: ffffff8402478200
x19: ffffffc013f7b764 x18: 0000000000000000
x17: 0000000000000000 x16: ffffff84026a6844
x15: 0000000000000000 x14: 0000000000000000
x13: 0000000000000000 x12: 0000000000000008
x11: ffffffc010c2d150 x10: 0000000000000000
x9 : ffffffc01081bc80 x8 : ffffffc0136a0aa8
x7 : 0000000000000000 x6 : 0000000000000000
x5 : 0000000000000000 x4 : 0000000000000000
x3 : 0000000000000000 x2 : ffffffc013f7b764
x1 : 0000000000000aa8 x0 : ffffff8402478200
Call trace:
 regmap_mmio_read32le+0x18/0x34
 _regmap_bus_reg_read+0x24/0x30
 _regmap_read+0x94/0x14c
 _regmap_update_bits+0x98/0x110
 regmap_update_bits_base+0x70/0xa0
 hdmi_modb+0x38/0x44
 dw_hdmi_qp_i2s_hw_params+0x88/0x1ec
 hdmi_codec_hw_params+0x148/0x214
 snd_soc_dai_hw_params+0x68/0xbc
 soc_pcm_hw_params+0x28c/0x508
 snd_pcm_hw_params+0x140/0x3a0
 snd_pcm_common_ioctl+0x1284/0x1a40
 snd_pcm_ioctl+0x3c/0x54
 __arm64_sys_ioctl+0x84/0xbc
 el0_svc_common+0xac/0x184
 do_el0_svc+0x88/0x94
 el0_svc+0x10/0x1c
 el0_sync_handler+0x80/0x134
 el0_sync+0x1a0/0x1c0

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I85117d4375e6f32800188b37f432b9d1a41e738d
2021-11-25 14:19:13 +08:00
Sugar Zhang
b1662f1291 drm/bridge: synopsys: Add audio support for dw-hdmi-qp
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I41ceead79d46e08d5022bc1cc536af89437003a3
2021-11-18 16:55:24 +08:00
Algea Cao
b73433e36e drm/rockchip: Add dw-hdmi-qp driver
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I6ac976dc3693bfdac1ac09570f2c4d0efb87fe9e
2021-11-17 18:01:49 +08:00
Wyon Bi
332551a8c2 drm/rockchip: analogix_dp: Add support for rk3588
This patch adds support for Analogix eDP TX IP used on RK3588 SoC.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I362489fb294673512b6de1913aa2e0b855a98926
2021-11-14 10:24:44 +08:00
Algea Cao
4bfe307edf drm/rockchip: dw_hdmi: Add next hdr sink data property
Add property to transfer next hdr sink data to userspace.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I926ec6553bdb0b1730a7ca578f46f36926860ebd
2021-11-09 18:32:27 +08:00
Algea Cao
60d1c80f6b drm/rockchip: dw_hdmi: Add get edid dsc info interface
To support the rk3588 dsc function, add get edid dsc
info interface.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I33cc4b60183484e7cd15b519cec4c32d7be53deb
2021-11-09 18:32:27 +08:00
Algea Cao
a7c8450f79 drm/rockchip: dw_hdmi: Call get yuv422 format interface in dw_hdmi-rockchip.c
To be compatible with GKI, dw-hdmi driver can't call interfaces in
rockchip-drm directly. In order for dp to be usable, get yuv422
format interface should define in rockchip-drm. So hdmi call
get yuv422 format interface in dw_hdmi-rockchip.c.

Fixes: dbd228a254 ("drm/bridge: synopsys: dw-hdmi: Get edid yuv422 info independently")
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Icc879ff4420357a6becba84371b9e3317583960b
2021-10-26 10:50:21 +08:00
Guochun Huang
31e9f77c4b drm/bridge: dw-mipi-dsi: remove the pclk which can be managed in runtime pm
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ib5287e452c0f40ab0bdaddf5a8f61f9d7abdb45a
2021-09-03 17:48:03 +08:00
Algea Cao
3972b45872 drm/rockchip: dw_hdmi: Add property to show whether sink is DVI
Add property output_type_capacity:
enums: DVI=0 HDMI=1

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Iad09b386b55c52e21b01f98e81fadfd5aa1a42d3
2021-08-27 15:50:26 +08:00
Algea Cao
9905ae2b79 drm/rockchip: dw_hdmi: Add property to switch HDMI/DVI mode
Add property output_hdmi_dvi:
enums: auto=0 force_hdmi=1 force_dvi=2

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ic048fb5c004f332b60bbbeca857de4abe9c0ca08
2021-08-27 15:50:26 +08:00
Algea Cao
2fbd84454a drm/rockchip: dw_hdmi: Support set quant range take effect immediately
When set property hdmi_quant_range, quant range was changed immediately.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ib8c14404cc3dde645012399b6155d047b4e9609a
2021-08-27 15:50:26 +08:00
Wyon Bi
48fb554efc drm/rockchip: analogix_dp: Protect kernel logo with loader_protect callback
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I16a1653aac3f6475f898390e83b09c93b706429e
2021-08-26 15:03:04 +08:00
Algea Cao
d5e6b96ce0 drm: rockchip: dw-hdmi: Change HDR_PANEL_METADATA to private property
For compatibility with GKI, HDR_PANEL_METADATA can't be a global
property. So change HDR_PANEL_METADATA to Rockchip private property.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I7926683a5dc6274e6cab2151e476344fa897b66c
2021-08-25 17:23:20 +08:00
Guochun Huang
7a34356e24 drm/bridge: dw-mipi-dsi: add support for rockchip kernel logo
Change-Id: I3ebbec2cd9f1ab7b643144034be67ade4aa81580
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2021-08-18 16:44:28 +08:00
Algea Cao
299266141e drm/bridge: synopsys: dw-hdmi: Check whether color has changed in connector atomic_check
For compatibility with GKI, connector atomic_begin/atomic_flush should
be removed. If hdmi color format has changed, set flag mode_changed
true and start a modeset to config hdmi.

We check whether color format has changed in
dw_hdmi_connector_atomic_check(), but color format variable update in
dw_hdmi_rockchip_encoder_atomic_check(), It runs after
dw_hdmi_connector_atomic_check(). That will lead to misjudgments when
determining whether color format has changed.

To solve this problem, we introduce get_color_changed(). When color
properties are set and color format is changed, get_color_changed()
return true.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Id1fbe80171856f91efa5ae40a0e0608a92ebcbf7
2021-08-17 17:54:10 +08:00
Algea Cao
5fe797153d drm: bridge: dw-hdmi: Support report cec hpd
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I45a5a45623f2eaf3f66a87dcd35c9fbeb20f7c77
2021-08-11 18:30:51 +08:00
Sandy Huang
7c95c85b18 drm/bridge: synopsys: dw-hdmi: update for remove connector port
Change-Id: Ia0ca8c2fddf89f29bf4ac5703d8f4d0f68d6446a
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-08-05 09:36:46 +08:00
Algea Cao
207a1ee79c drm/bridge: synopsys: dw-hdmi: Support set RGB quantization range
1.Filling the HDMI AVI infoframe quantization range information.
2.If output is limited enable color space conversion to convert.

Change-Id: I75f666424f00f3f6ec695047f7851824e89cd1a5
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-08-05 09:36:45 +08:00
xuhuicong
dd387a422c drm/bridge: dw-hdmi: fix display shaking when uboot to kernel show
Change-Id: I899bb0dde7111fe97dd2c89d20afb09562d31300
Signed-off-by: xuhuicong <xhc@rock-chips.com>
2021-08-05 09:36:45 +08:00
Zheng Yang
8a67fdbcfe drm: bridge: dw-hdmi: support attach property
Introduce struct dw_hdmi_property_ops in plat_data to attach
vendor connector property.

Change-Id: I3d23e40e9d342b22ca47f723b3f81057b58010e8
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2021-07-29 20:48:42 +08:00
Algea Cao
a07b4b5edd drm/rockchip: hdmi: Add hdmi drv_data features
Hdmi features vary on different platforms:
1.max_tmdsclk:hdmi max tmds clock.
2.unsupported_yuv_input:hdmi only support rgb input.
3.unsupported_deep_color:deep color mode is unsupported.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I77468b21960c49596c45bfef037fc5bfb3545b61
2021-07-29 20:48:42 +08:00
Algea Cao
7b29b5f295 drm/rockchip: dw_hdmi: Support HDMI 2.0 YCbCr 4:2:0
Some old code has too many conflicts with the upstream code,
so recombine and commit these changes.

Including these changes:
1.Support yuv420.
2.Limit rk3229/rk3328 max output resolution.
3.Support dynamically get input/out color info.
4.Introduce mpll_cfg_420.
5.use drm_mode_is_420 instead of DRM_MODE_FLAG_420_MASK.

Change-Id: I42462284b16f26b7adef0e9455903ee5fc71e432
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-07-27 17:42:15 +08:00
Algea Cao
0a52ff8181 drm/rockchip: dw_hdmi: check display mode with crtc mode valid
Change-Id: I23470e46b97169da0b59153dfc0835833f1aa549
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-07-27 17:42:15 +08:00
Yakir Yang
9dd3cb3411 CHROMIUM: drm: bridge/dw_hdmi: improved the hdmi audio N/CTS cacluate math
The original math would bring some inaccurate to N/CTS that would
caused those magic number won't fit the HDMI 1.4 Spec request:
	128 * SampleRate = Tmds * N / CTS;

So this time we try to improved to math of N that would find the
minimal inaccurate with the HDMI 1.4 Spec.

Change-Id: Ied3cde3c352d955ae6f15d5e7fb172e92316c2a5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/315424
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2021-07-27 17:42:15 +08:00
Sandy Huang
e78097e89b drm/bridge: dw-mipi-dsi: add api to get connector
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Id024b178bf936f0af3a782fe2c54fde661cce0da
2021-07-23 11:36:15 +08:00
Bin Yang
901d4890ec drm/bridge: dw_hdmi: clear ih_mute register when system resume
HDMI PD is power off when system suspend, so ih_mute register
bit0 mute_all_interrupt will be reset to 1 when system resume.
HPD interrupt will be mask, that would cause hdmi plugin could
not be detected.

Change-Id: I3bf2e6116e902cd516a7ac69fbe8569ca943e853
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2021-07-23 09:57:01 +08:00
Wyon Bi
0d0f8a70ae drm/rockchip: analogix_dp: Add audio support
Change-Id: Ib611037f497a0758bd2b6a312155562a719fe15f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-07-05 15:27:53 +08:00
Wyon Bi
0173eec295 drm/rockchip: analogix_dp: Add support for rk3568
This patch adds support for Analogix eDP TX IP used on RK3568 SoC.

Change-Id: Ieb89906cba5bc569ed8c476fecd00f6035a7f582
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-07-05 15:26:37 +08:00
Wyon Bi
e17b120e85 drm/bridge: analogix_dp: Add runtime PM callback to handle clock
Ensure the pclk is enabled when register access occurs.

Change-Id: Id108a04aed8424725dcc02dec9fe46bfc724c09b
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2021-07-05 15:04:47 +08:00
Neil Armstrong
a328ca7e4a drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate
The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency
higher than 10MHz for the TX Escape Clock, thus make the target rate
configurable.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Philippe Cornu <philippe.cornu@st.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200904125531.15248-1-narmstrong@baylibre.com
2020-09-11 15:01:36 +02:00
Laurent Pinchart
7be390d4c0 drm: bridge: dw-hdmi: Pass drm_display_info to dw_hdmi_support_scdc()
To prepare for making connector creation optional in the driver, pass
the drm_display_info explicitly to dw_hdmi_support_scdc(). The pointer
is passed to the callers where required, particularly to the
dw_hdmi_phy_ops .init() function.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-19-laurent.pinchart+renesas@ideasonboard.com
2020-06-23 19:57:06 +02:00
Laurent Pinchart
35a395f113 drm: bridge: dw-hdmi: Constify mode argument to dw_hdmi_phy_ops .init()
The PHY .init() must not modify the mode it receives. Make the pointer
const to enfore that.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-17-laurent.pinchart+renesas@ideasonboard.com
2020-06-23 19:56:25 +02:00
Laurent Pinchart
af05bba0fb drm: bridge: dw-hdmi: Pass drm_display_info to .mode_valid()
Replace the drm_connector pointer passed to the .mode_valid() function
with a const drm_display_info pointer, as that's all the function should
need. Use the display info passed to the bridge .mode_valid() operation
instead of retrieving it from the connector, to prepare for make
connector creation optional.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-16-laurent.pinchart+renesas@ideasonboard.com
2020-06-23 19:56:02 +02:00
Laurent Pinchart
29fc89719d drm: bridge: dw-hdmi: Remove unused field from dw_hdmi_plat_data
The input_bus_format field of struct dw_hdmi_plat_data is unused. Remove
it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-14-laurent.pinchart+renesas@ideasonboard.com
2020-06-23 19:55:19 +02:00
Laurent Pinchart
49da7e5d84 drm: bridge: dw-hdmi: Pass private data pointer to .configure_phy()
The .configure_phy() operation takes a dw_hdmi_plat_data pointer as a
context argument. This differs from .mode_valid() that takes a custom
private context pointer, causing possible confusion. Make the
dw_hdmi_plat_data operations more consistent by passing the private
context pointer to .configure_phy() as well.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-13-laurent.pinchart+renesas@ideasonboard.com
2020-06-23 19:54:52 +02:00
Laurent Pinchart
96591a4b93 drm: bridge: dw-hdmi: Pass private data pointer to .mode_valid()
Platform glue drivers for dw_hdmi may need to access device-specific
data from their .mode_valid() implementation. They currently have no
clean way to do so, and one driver hacks around it by accessing the
dev_private data of the drm_device retrieved from the connector.

Add a priv_data void pointer to the dw_hdmi_plat_data structure, and
pass it to the .mode_valid() function.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-12-laurent.pinchart+renesas@ideasonboard.com
2020-06-23 19:54:32 +02:00
Marek Szyprowski
152cce0006
drm/bridge: analogix_dp: Split bind() into probe() and real bind()
Analogix_dp driver acquires all its resources in the ->bind() callback,
what is a bit against the component driver based approach, where the
driver initialization is split into a probe(), where all resources are
gathered, and a bind(), where all objects are created and a compound
driver is initialized.

Extract all the resource related operations to analogix_dp_probe() and
analogix_dp_remove(), then call them before/after registration of the
device components from the main Exynos DP and Rockchip DP drivers. Also
move the plat_data initialization to the probe() to make it available for
the analogix_dp_probe() function.

This fixes the multiple calls to the bind() of the DRM compound driver
when the DP PHY driver is not yet loaded/probed:

[drm] Exynos DRM: using 14400000.fimd device for DMA mapping operations
exynos-drm exynos-drm: bound 14400000.fimd (ops fimd_component_ops [exynosdrm])
exynos-drm exynos-drm: bound 14450000.mixer (ops mixer_component_ops [exynosdrm])
exynos-dp 145b0000.dp-controller: no DP phy configured
exynos-drm exynos-drm: failed to bind 145b0000.dp-controller (ops exynos_dp_ops [exynosdrm]): -517
exynos-drm exynos-drm: master bind failed: -517
...
[drm] Exynos DRM: using 14400000.fimd device for DMA mapping operations
exynos-drm exynos-drm: bound 14400000.fimd (ops hdmi_enable [exynosdrm])
exynos-drm exynos-drm: bound 14450000.mixer (ops hdmi_enable [exynosdrm])
exynos-drm exynos-drm: bound 145b0000.dp-controller (ops hdmi_enable [exynosdrm])
exynos-drm exynos-drm: bound 14530000.hdmi (ops hdmi_enable [exynosdrm])
[drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
Console: switching to colour frame buffer device 170x48
exynos-drm exynos-drm: fb0: exynosdrmfb frame buffer device
[drm] Initialized exynos 1.1.0 20180330 for exynos-drm on minor 1
...

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200310103427.26048-1-m.szyprowski@samsung.com
(cherry picked from commit 83a196773b)
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-04-09 10:29:35 +02:00