This patch adds support for Analogix eDP TX IP used on RK3588 SoC.
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I362489fb294673512b6de1913aa2e0b855a98926
Add property to transfer next hdr sink data to userspace.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I926ec6553bdb0b1730a7ca578f46f36926860ebd
To support the rk3588 dsc function, add get edid dsc
info interface.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I33cc4b60183484e7cd15b519cec4c32d7be53deb
To be compatible with GKI, dw-hdmi driver can't call interfaces in
rockchip-drm directly. In order for dp to be usable, get yuv422
format interface should define in rockchip-drm. So hdmi call
get yuv422 format interface in dw_hdmi-rockchip.c.
Fixes: dbd228a254 ("drm/bridge: synopsys: dw-hdmi: Get edid yuv422 info independently")
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Icc879ff4420357a6becba84371b9e3317583960b
Add a new drm_connector_oob_hotplug_event() function and
oob_hotplug_event drm_connector_funcs member.
On some hardware a hotplug event notification may come from outside the
display driver / device. An example of this is some USB Type-C setups
where the hardware muxes the DisplayPort data and aux-lines but does
not pass the altmode HPD status bit to the GPU's DP HPD pin.
In cases like this the new drm_connector_oob_hotplug_event() function can
be used to report these out-of-band events.
Avoid the conflict of GKI, the drm_connector_oob_hotplug_event() is be
completed in rockchip drm driver, not the drm framework.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I5b1428daa83b0fdb7cf88e95d0b8fde2548d43d8
When set property hdmi_quant_range, quant range was changed immediately.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ib8c14404cc3dde645012399b6155d047b4e9609a
For compatibility with GKI, HDR_PANEL_METADATA can't be a global
property. So change HDR_PANEL_METADATA to Rockchip private property.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I7926683a5dc6274e6cab2151e476344fa897b66c
This patch parses HFVSDB fields for DSC1.2 capabilities of an
HDMI2.1 sink. These fields are required by a source to understand the
DSC capability of the sink, to set appropriate PPS parameters,
before transmitting compressed data stream.
v2: Addressed following issues as suggested by Uma Shankar:
-Added a new struct for hdmi dsc cap
-Fixed bugs in macros usage.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch PARENTHESIS_ALIGNMENT.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-4-ankit.k.nautiyal@intel.com
(cherry picked from commit 76ee7b9056)
Change-Id: I02d96954736a9dae33cc31e06f411f2ffffddc35
This patch parses MAX_FRL field to get the MAX rate in Gbps that
the HDMI 2.1 panel can support in FRL mode. Source need this
field to determine the optimal rate between the source and sink
during FRL training.
v2: Fixed minor bugs, and removed extra wrapper function (Uma Shankar)
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch FROM_SIGN_OFF_MISMATCH, PARENTHESIS_ALIGNMENT.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-3-ankit.k.nautiyal@intel.com
(cherry picked from commit 4499d488f6)
Change-Id: I34cec87592960398eb04e9c2437b9352c14cdf3e
The HDMI2.1 extends HFVSDB (HDMI Forum Vendor Specific
Data block) to have fields related to newly defined methods of FRL
(Fixed Rate Link) levels, number of lanes supported, DSC Color bit
depth, VRR min/max, FVA (Fast Vactive), ALLM etc.
This patch adds the new HFVSDB fields that are required for
HDMI2.1.
v2: Minor fixes + consistent naming for DPCD register masks
(Uma Shankar)
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch FROM_SIGN_OFF_MISMATCH.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-2-ankit.k.nautiyal@intel.com
(cherry picked from commit 9bb85a6e29)
Change-Id: Ibbdea12806897cab0f95d13847b7e3d8bea1931d
For compatibility with GKI, connector atomic_begin/atomic_flush should
be removed. If hdmi color format has changed, set flag mode_changed
true and start a modeset to config hdmi.
We check whether color format has changed in
dw_hdmi_connector_atomic_check(), but color format variable update in
dw_hdmi_rockchip_encoder_atomic_check(), It runs after
dw_hdmi_connector_atomic_check(). That will lead to misjudgments when
determining whether color format has changed.
To solve this problem, we introduce get_color_changed(). When color
properties are set and color format is changed, get_color_changed()
return true.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Id1fbe80171856f91efa5ae40a0e0608a92ebcbf7
1.Filling the HDMI AVI infoframe quantization range information.
2.If output is limited enable color space conversion to convert.
Change-Id: I75f666424f00f3f6ec695047f7851824e89cd1a5
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Hdmi features vary on different platforms:
1.max_tmdsclk:hdmi max tmds clock.
2.unsupported_yuv_input:hdmi only support rgb input.
3.unsupported_deep_color:deep color mode is unsupported.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I77468b21960c49596c45bfef037fc5bfb3545b61
Some old code has too many conflicts with the upstream code,
so recombine and commit these changes.
Including these changes:
1.Support yuv420.
2.Limit rk3229/rk3328 max output resolution.
3.Support dynamically get input/out color info.
4.Introduce mpll_cfg_420.
5.use drm_mode_is_420 instead of DRM_MODE_FLAG_420_MASK.
Change-Id: I42462284b16f26b7adef0e9455903ee5fc71e432
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I23470e46b97169da0b59153dfc0835833f1aa549
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
The original math would bring some inaccurate to N/CTS that would
caused those magic number won't fit the HDMI 1.4 Spec request:
128 * SampleRate = Tmds * N / CTS;
So this time we try to improved to math of N that would find the
minimal inaccurate with the HDMI 1.4 Spec.
Change-Id: Ied3cde3c352d955ae6f15d5e7fb172e92316c2a5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/315424
Reviewed-by: Douglas Anderson <dianders@chromium.org>
HDMI PD is power off when system suspend, so ih_mute register
bit0 mute_all_interrupt will be reset to 1 when system resume.
HPD interrupt will be mask, that would cause hdmi plugin could
not be detected.
Change-Id: I3bf2e6116e902cd516a7ac69fbe8569ca943e853
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
This patch adds support for Analogix eDP TX IP used on RK3568 SoC.
Change-Id: Ieb89906cba5bc569ed8c476fecd00f6035a7f582
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Ensure the pclk is enabled when register access occurs.
Change-Id: Id108a04aed8424725dcc02dec9fe46bfc724c09b
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Extend the existing color management properties to support provision
of a 3D cubic look up table, allowing for color specific adjustments.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Co-developed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Change-Id: I0bda1203a10f0df978b767d29baf06b390c0867e
Link:
https: //lore.kernel.org/dri-devel/20201221015730.28333-4-laurent.pinchart+renesas@ideasonboard.com/
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
* android12-5.10: (966 commits)
ANDROID: Support disabling symbol trimming
ANDROID: Incremental fs: Fix pseudo-file attributes
ANDROID: sched: Fix missing RQCF_UPDATED in migrate_tasks
FROMLIST: mm, thp: Relax the VM_DENYWRITE constraint on file-backed THPs
ANDROID: GKI: Update the generic symbol list
ANDROID: ABI: Add symbols for crypto
ANDROID: ABI: Update the ABI XML
Revert "ANDROID: GKI: Change UCLAMP_BUCKETS_COUNT to 20"
ANDROID: vendor_hooks: Add hook for binder
UPSTREAM: crypto: arm/blake2s - fix for big endian
UPSTREAM: crypto: arm/blake2b - drop unnecessary return statement
FROMGIT: kasan, arm64: tests supports for HW_TAGS async mode
FROMGIT: arm64: mte: Report async tag faults before suspend
FROMGIT: arm64: mte: Enable async tag check fault
FROMGIT: arm64: mte: Conditionally compile mte_enable_kernel_*()
ANDROID: ABI: Update the ABI xml
ANDROID: ABI: Update the generic symbol list
ANDROID: selinux: add vendor hook in selinux
FROMGIT: arm64: mte: Enable TCO in functions that can read beyond buffer limits
ANDROID: sched: Add vendor hooks for update_load_avg
...
Change-Id: I74731b47c1f6cd67cea9622113833b3f8c994544
The explicit out-fences in crtc are signaled as part of vblank event,
indicating all framebuffers present on the Atomic Commit request are
scanned out on the screen. Though the fence signal and the vblank event
notification happens at the same time, triggered by the same hardware
vsync event, the timestamp set in both are different. With drivers
supporting precise vblank timestamp the difference between the two
timestamps would be even higher. This might have an impact on use-mode
frameworks using these fence timestamps for purposes other than simple
buffer usage. For instance, the Android framework [1] uses the
retire-fences as an alternative to vblank when frame-updates are in
progress. Set the fence timestamp during send vblank event using a new
drm_send_event_timestamp_locked variant to avoid discrepancies.
[1] https://android.googlesource.com/platform/frameworks/native/+/master/
services/surfaceflinger/Scheduler/Scheduler.cpp#397
Changes in v2:
- Use drm_send_event_timestamp_locked to update fence timestamp
- add more information to commit text
Changes in v3:
- use same backend helper function for variants of drm_send_event to
avoid code duplications
Changes in v4:
- remove WARN_ON from drm_send_event_timestamp_locked
Bug: 173434777
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Reviewed-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
[sumits: minor parenthesis alignment correction]
Link: https://patchwork.freedesktop.org/patch/msgid/1610757107-11892-2-git-send-email-veeras@codeaurora.org
(cherry picked from commit a78e7a51d2)
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Change-Id: Iaa29508f72e2c9c7abd2e3fe7a4dc7b9665336a5
The DP 1.4 spec defines the SDP header and SDP contents for
a Picture Parameter Set (PPS) that must be sent in advance
of DSC transmission to define the encoding characteristics.
This was done in one struct, drm_dsc_pps_infoframe, which
conatined the SDP header and PPS. Because the PPS is
a property of DSC over any connector, not just DP, and because
drm drivers may have their own SDP structs they wish to use,
make the functions that initialise SDP and PPS headers take
the components they operate on, not drm_dsc_pps_infoframe,
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-4-David.Francis@amd.com
(cherry picked from commit dbfbe717cc)
Change-Id: I691b513d778f8763e9e48e6b073a26fc1f6adb5b
Native 420 and 422 transfer modes are new in DSC1.2
In these modes, each two pixels of a slice are treated as one
pixel, so the slice width is half as large (round down) for
the purposes of calucating the groups per line and chunk size
in bytes
In native 422 mode, each pixel has four components, so the
mux component of a group is larger by one additional mux word
and one additional component
Now that there is native 422 support, the configuration option
previously called enable422 is renamed to simple_422 to avoid
confusion
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-3-David.Francis@amd.com
(cherry picked from commit 06d7cecdb6)
Change-Id: I5496e7bb6f3548fe9f59b6152ff0d72bb7d8fa7f
The function intel_compute_rc_parameters is part of the dsc spec
and is not driver-specific. Other drm drivers might like to use
it. The function is not changed; just moved and renamed.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-2-David.Francis@amd.com
(cherry picked from commit dc43332b7a)
Change-Id: I306b87e9f29ef54f7011a12336d5ad277a65b6a2
This patch adds appropriate kernel documentation for DRM DP helpers
used for enabling Display Stream compression functionality in
drm_dp_helper.h and drm_dp_helper.c as well as for the DSC spec
related structure definitions and helpers in drm_dsc.c and drm_dsc.h
Also add links between the functions and structures in the documentation.
v3:
* Fix the checkpatch warnings (Sean Paul)
v2:
* Add inline comments for longer structs (Daniel Vetter)
* Split the summary and description (Daniel Vetter)
Suggested-by: Daniel Vetter <daniel.vetter@intel.com>
Suggested-by: Sean Paul <sean@poorly.run>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Sean Paul <sean@poorly.run>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <sean@poorly.run>
Reviewed-by: Daniel Vetter <daniel.vetter@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190206213148.21390-1-manasi.d.navare@intel.com
(cherry picked from commit 05bad2357a)
Change-Id: I241d62c90db77f542690a244908ff8e1836633c4
DSC DPCD color depth register advertises its color depth capabilities
by setting each of the bits that corresponding to a specific color
depth. This patch defines those specific color depths and adds
a helper to return an array of color depth capabilities.
v2:
* Simplify the logic (Ville)
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-1-manasi.d.navare@intel.com
(cherry picked from commit 4d4101c8b3)
Change-Id: I3f8e33773f965c7b347df17be6227c253eb5a075
DSC specification defines linebuf_depth which contains the
line buffer bit depth used to generate the bitstream.
These values are defined as per Table 4.1 in DSC 1.2 spec
v2 (From Manasi):
* Rename as MAX_LINEBUF_DEPTH for DSC 1.1 and DSC 1.2
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-6-manasi.d.navare@intel.com
(cherry picked from commit f25310c736)
Change-Id: I1582b2b49463810f356bf7fdaf35b0730a81308c
According to Display Stream compression spec 1.2, the picture
parameter set metadata is sent from source to sink device
using the DP Secondary data packet. An infoframe is formed
for the PPS SDP header and PPS SDP payload bytes.
This patch adds helpers to fill the PPS SDP header
and PPS SDP payload according to the DSC 1.2 specification.
v7:
* Use BUILD_BUG_ON() to protect changing struct size (Ville)
* Remove typecaseting (Ville)
* Include byteorder.h in drm_dsc.c (Ville)
* Correct kernel doc spacing (Anusha)
v6:
* Use proper sequence points for breaking down the
assignments (Chris Wilson)
* Use SPDX identifier
v5:
Do not use bitfields for DRM structs (Jani N)
v4:
* Use DSC constants for params that dont change across
configurations
v3:
* Add reference to added kernel-docs in
Documentation/gpu/drm-kms-helpers.rst (Daniel Vetter)
v2:
* Add EXPORT_SYMBOL for the drm functions (Manasi)
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-5-manasi.d.navare@intel.com
(cherry picked from commit a408c857a9)
Change-Id: I3f46f13570f95488f4f1ba0dff6801457109e1a3
DSC has some Rate Control values that remain constant
across all configurations. These are as per the DSC
standard.
v3:
* Define them in drm_dsc.h as they are
DSC constants (Manasi)
v2:
* Add DP_DSC_ prefix (Jani Nikula)
Cc: dri-devel@lists.freedesktop.org
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Srivatsa, Anusha <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-4-manasi.d.navare@intel.com
(cherry picked from commit 082a7b8601)
Change-Id: Ifefe0bc5dfae70bbe9228bde8b50fe7c2cc37816
This defines all the DSC parameters as per the VESA DSC spec
that will be required for DSC encoder/decoder
v6: (From Manasi)
* Add a bit mask for RANGE_BPG_OFFSET for 6 bits(Manasi)
v5 (From Manasi)
* Add the RC constants as per the spec
v4 (From Manasi)
* Add the DSC_MUX_WORD_SIZE constants (Manasi)
v3 (From Manasi)
* Remove the duplicate define (Suggested By:Harry Wentland)
v2: Define this struct in DRM (From Manasi)
* Changed the data types to u8/u16 instead of unsigned longs (Manasi)
* Remove driver specific fields (Manasi)
* Move this struct definition to DRM (Manasi)
* Define DSC 1.2 parameters (Manasi)
* Use DSC_NUM_BUF_RANGES (Manasi)
* Call it drm_dsc_config (Manasi)
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Co-developed-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-3-manasi.d.navare@intel.com
(cherry picked from commit 19fd5adbb5)
Change-Id: I95115779a7efaef93309cabb16691be632be1d54
This patch defines a new header file for all the DSC 1.2 structures
and creates a structure for PPS infoframe which will be used to send
picture parameter set secondary data packet for display stream compression.
All the PPS infoframe syntax elements are taken from DSC 1.2 specification
from VESA.
v4:
* Remove redundant blankline in doc (Ville)
* use drm_dsc namespace for all structs (Ville)
* Use packed struct (Ville)
v3:
* Add the SPDX shorthand (Chris Wilson)
v2:
* Do not use bitfields in the struct (Jani Nikula)
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-2-manasi.d.navare@intel.com
(cherry picked from commit 7c247c0675)
Change-Id: I3f21cf671e629e10092a35675316bd6c772cc9f9
This patch adds inline functions and helpers for obtaining
DP sink's supported DSC parameters like DSC sink support,
eDP compressed BPP supported, maximum slice count supported
by the sink devices, DSC line buffer bit depth supported on DP sink,
DSC sink maximum color depth by parsing corresponding DPCD registers.
v4:
* Add helper to give line buf bit depth (Manasi)
* Correct the bit masking in color depth helper (manasi)
v3:
* Use SLICE_CAP_2 for DP (Anusha)
v2:
* Add DSC sink support macro (Jani N)
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-4-manasi.d.navare@intel.com
(cherry picked from commit 0575650077)
Change-Id: I0d4952118e1b9e9a613d71abe1e0ecfaab1af6cc
This patch defines the DP DSC receiver capability size that gives
total number of DP DSC DPCD registers.
This also adds a missing #defines for DP DSC support missed in the
commit id (ab6a46ea68 "Add DPCD definitions for DP 1.4 DSC feature")
v3:
* MIN_SLICE_WIDTH = 2560 (Anusha)
* Define DP_DSC_SLICE_WIDTH_MULTIPLIER = 320
v2:
* Add SHIFT define and DECOMPRESSION_EN define missed in prev patch
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-2-manasi.d.navare@intel.com
(cherry picked from commit ffddc4363c)
Change-Id: Ie6fea02981e53658d1d94cc0be9029fbf5a5e1f2
DP 1.4 spec defines DP secondary data packet for DSC
picture parameter set. This patch defines its payload size
according to the DP 1.4 specification.
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-7-manasi.d.navare@intel.com
(cherry picked from commit 6e97272a9a)
Change-Id: I2d3bc1d31286da528b38fc79230c3d3b2935edb2
This patch parses HFVSDB fields for DSC1.2 capabilities of an
HDMI2.1 sink. These fields are required by a source to understand the
DSC capability of the sink, to set appropriate PPS parameters,
before transmitting compressed data stream.
v2: Addressed following issues as suggested by Uma Shankar:
-Added a new struct for hdmi dsc cap
-Fixed bugs in macros usage.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch PARENTHESIS_ALIGNMENT.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-4-ankit.k.nautiyal@intel.com
(cherry picked from commit 76ee7b9056)
Change-Id: I02d96954736a9dae33cc31e06f411f2ffffddc35
This patch parses MAX_FRL field to get the MAX rate in Gbps that
the HDMI 2.1 panel can support in FRL mode. Source need this
field to determine the optimal rate between the source and sink
during FRL training.
v2: Fixed minor bugs, and removed extra wrapper function (Uma Shankar)
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
[Jani: Fixed checkpatch FROM_SIGN_OFF_MISMATCH, PARENTHESIS_ALIGNMENT.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-3-ankit.k.nautiyal@intel.com
(cherry picked from commit 4499d488f6)
Change-Id: I34cec87592960398eb04e9c2437b9352c14cdf3e
