Commit Graph

74558 Commits

Author SHA1 Message Date
Andy Yan
d43135dfce drm/rockchip: vop2: Add axi id configuration
Two axi bus:
AXI0 is a read/write bus with a higher performance.
AXI1 is a read only bus.

Every window on a AXI bus must assigned two unique
read id(yrgb_id/uv_id, valid id are 0x1~0xe).

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I867df219797da33f89fec6fba639bcdf55cb54b3
2021-11-15 16:42:37 +08:00
Zhen Chen
44194e5f13 MALI: bifrost: Kconfig: make MALI_CSF_SUPPORT selectable
remove depends on MALI_BIFROST=m

Change-Id: I3296839dd0f40e8fdfc6c66aa0d6f8f7155cdf68
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-11-14 19:39:22 +08:00
Guochun Huang
127485c33e drm/rockchip: dsi2: make send or receive cmd packet more robust
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I013803d14730132c13bdca2bcced829aaf3b5112
2021-11-14 17:46:47 +08:00
Guochun Huang
a4527a60bf drm/rockchip: dsi2: add support dual channel dsi
Display Pipeline:
                   ---> dsi0 --> dcphy_tx0 --->
                  /                  |         \
                 /              dcphy0_pll      \
      vp2/vp3 -->                                --->dual channel panel
                 \              dcphy1_pll      /
                  \                  |         /
                   ---> dsi1 --> dcphy_tx1 --->

Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I5a87aa940510f803479318c66535024d5ce2c8d6
2021-11-14 17:01:43 +08:00
Guochun Huang
4c3fbbcd22 drm/panel: simple: add support dsc/pps sequence transfer for dsi
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I7a828c34c13c201694bd5e3fcaeab47508b58ed8
2021-11-14 17:01:11 +08:00
Andy Yan
6d75cc0dc6 drm/rockchip: vop2: Delete mipi_dclk_pol on rk3588
This bit has a hide founction for height/low bit swap,
And should not be touched.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I8ce2caddebdf87edbd75cc1fe4460699e7d9ca89
2021-11-14 15:17:12 +08:00
Andy Yan
57ff9f2f3a drm/rockchip: vop2: Set K = 2 for eDP DUAL_CHANNEL_LEFT_RIGHT_MODE
Video_Pixclk = edp_pixclk x K = edp_dclk x K = dclk_core x 4;

K = 2 for SPLIT, other condition is 1.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I8e6f3e32bd1c214bfe46cc3f37dd813af8901839
2021-11-14 15:17:08 +08:00
Wyon Bi
332551a8c2 drm/rockchip: analogix_dp: Add support for rk3588
This patch adds support for Analogix eDP TX IP used on RK3588 SoC.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I362489fb294673512b6de1913aa2e0b855a98926
2021-11-14 10:24:44 +08:00
Andy Yan
fd6591c08d drm/rockchip: vop2: Fix Cluster2/3 MIX offset
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ibc9b82b7c1c531b7ac062a8ead6f9e162f6fa0fb
2021-11-14 10:18:31 +08:00
Sandy Huang
b8a6f5f211 drm/rockchip: add DRM_RENDER_ALLOW
This is required by android hwc for dev/dri/card128.

Change-Id: Ia0159b877f7d8b2bb5cecf3b352b67d9c76c7c97
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-11-14 10:18:31 +08:00
Andy Yan
d9ba95a38e drm/rockchip: vop2: Fix win_dly register definition
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I49bf658d1e6447a34d2af18d9aea574d1636f054
2021-11-13 16:35:18 +08:00
Andy Yan
cea2902425 drm/rockchip: vop2: Change pd->lock to spinlock
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: If1f50d15c48c569e8cf91c98cd0077bd53a753a1
2021-11-13 14:36:45 +08:00
Andy Yan
f8d3c11f67 drm/rockchip: vop2: Support set unique possible_crtcs by plane_mask
Enabled by:

&vop2 {
	disable-win-move;
};

Change-Id: Idc15f713b74650ac910233538d186ad799e25124
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-11-13 11:49:20 +08:00
Andy Yan
d188e84472 drm/rockchip: vop2: Enable POST_BUF_EMPTY_INT err irq print
Just print out POST_BUF_EMPTY_INT err irq if it happened.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ia1d3747c94d432ca8451f38e10d32a82bbf7b958
2021-11-13 11:49:20 +08:00
Sandy Huang
fb678bd98a drm/rockchip: vop2: fix splash screen when vsync less than 8
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I065f1e5d4795b10442d285eae2178153be870d02
2021-11-12 22:08:52 +08:00
Andy Yan
1b19072d1d drm/rockchip: vop2: Fix AFBC gating on rk3588
On RK3568: this bit is Auto gating enable
on RK3588: this bit is gating disable(we must set it to 1 when afbc
enable)

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: If689c587c6df9e1e8c6ff670d30e62c53b621194
2021-11-12 21:21:43 +08:00
Guochun Huang
ff3bc17f44 drm/rockchip: fix ratio of frequency phy_ipi_ratio
Change-Id: I4f5166d44e404dbb1300eb31d012ab5bfcf09f59
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2021-11-12 16:43:45 +08:00
Andy Yan
8854c8ef52 drm/rockchip: vop2: Add submem power gate support
RK3588 VOP2 has power gates for VP0/1/2/3, DB0/1/2
and WB.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ie3d67aa804282834949d6950470ba960ea51fcdb
2021-11-11 20:21:41 +08:00
Guochun Huang
89f783f024 drm: rockchip: introduce dw-mipi-dsi2
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I1865ea38e7b9431ad06282b16300a45989ca065f
2021-11-11 09:46:23 +08:00
Guochun Huang
d7e3e6de15 drm/rockchip: Add dw-mipi-dsi2 driver
Change-Id: Ib5e6a8eedd8d49b568057550571b4c5685110df9
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
2021-11-11 09:46:23 +08:00
Zhen Chen
44a562051e MALI: bifrost: enlarge BASE_MAX_NR_CLOCKS_REGULATORS to 3
rk3588 actually has 3 clocks and 2 regulators to manage.

Change-Id: Ie0322fcce0f020fed7e51008e6fba34fe1350f49
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-11-10 14:39:48 +08:00
Algea Cao
4bfe307edf drm/rockchip: dw_hdmi: Add next hdr sink data property
Add property to transfer next hdr sink data to userspace.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I926ec6553bdb0b1730a7ca578f46f36926860ebd
2021-11-09 18:32:27 +08:00
Algea Cao
31d7cfd41e drm/rockchip: drv: Parse edid next hdr info in rockchip driver
To be compatible with GKI, we parse the edid next hdr information
in rockchup-drm driver.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Id6fd8f2d8429b07472c6562c223ae84262952e8d
2021-11-09 18:32:27 +08:00
Algea Cao
60d1c80f6b drm/rockchip: dw_hdmi: Add get edid dsc info interface
To support the rk3588 dsc function, add get edid dsc
info interface.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I33cc4b60183484e7cd15b519cec4c32d7be53deb
2021-11-09 18:32:27 +08:00
Algea Cao
0c087e3910 drm/rockchip: drv: Parse edid dsc info in rockchip driver
To be compatible with GKI, we parse the edid dsc information
in rockchup-drm driver.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I2f2cc9e9fe8578865975e1631450dbbc723ce08e
2021-11-09 18:32:27 +08:00
Andy Yan
5f5b655409 drm/rockchip: vop2: Forbid X Mirror in splice mode
Rotate90/270 and X Mirror are unsupported.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I1656f602a20a38074b2777b349b7d77f1c7316b6
2021-11-09 17:25:03 +08:00
Andy Yan
03b6bb941d drm/rockchip: vop2: No need to check act_width on rk3588
VOP has a limitation of act_width on rk3568:

(1) The act_width should align as 4 pixel at afbc mode
(2) can't handle a act_width % 16 = 1

VOP on rk3588 has no such limitation.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I56f2ff32ac384bff81b6b911cd10ef599e5f44c3
2021-11-09 17:24:30 +08:00
Andy Yan
fd1e752b58 drm/rockchip: vop2: Check for YUV2RGB for writeback
YUV2RGB is not supported by wb.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ib0ed42029522b3a16ea2fc09c7f2ca09ad4e121e
2021-11-09 17:23:40 +08:00
Andy Yan
ad5e232220 drm/rockchip: vop2: Enable mipi dual channel mode
We should set both VP->DUAL_CHANNEL_CTRL.dual_channel_en
and DSP_INTERFACE_EN.mipi_dual_channel_en when drive
a dual channel mipi dsi on rk3588, this is different
from rk356x.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I784f9556903126bae52b3063eb23fbf0a0193739
2021-11-09 17:23:04 +08:00
Sandy Huang
91142983e6 drm/rockchip: debugfs: fix dump yuv format size error
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ibec7e083c38d2b8d151f285848133e7e72310095
2021-11-09 16:20:40 +08:00
Andy Yan
cddd9bf436 drm/rockchip: vop2: Add check for two win mode
When cluster work at two win mode:
act_w + xoffset % 16 <= 2048

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I1326b02ede58b9a96960ad0d262cb1665bd29525
2021-11-08 15:55:02 +08:00
Andy Yan
265d675c1a drm/rockchip: vop2: Add VOP_GRF and SYS_GRF support
Some clk invert(dclk invert) control in SYS_GRF
Some interface enable(hdmi/edp enable) control in VOP_GRF
hdmi_vsync/hsync_pol control in VO1_GRF

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ia3972c9d207c9385b4512c96ea8e2d66e8fa03d5
2021-11-08 14:35:37 +08:00
Andy Yan
1eaccc255a drm/rockchip: vop2: Add dual channel configuration
HDMI/eDP/DP on RK3588 also support dual channel mode
like mipi dsi.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I06454d3c64bc6a283d180c57fac6e8464ff6ca19
2021-11-05 09:24:24 +08:00
Andy Yan
932f203d92 drm/rockchip: vop2: Enable DataStream mode when mipi dsi work at cmd mode
RK3588 VOP should enable DataStream mode when mipi dsi
work at cmd mode, this is different from rk356x.

Change-Id: I770f98dd78d12e4b1a6411f0b1ffb9572dda62a4
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-11-03 19:00:01 +08:00
Andy Yan
77359bd785 drm/rockchip: vop2: Check rotation for cluster window at non-afbc mode
Cluster window only support rotation(x/ymirror, rotation90/270)
at afbc mode.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I6439a59793f724bd5d0e643c2d02486cce733165
2021-11-02 18:30:39 +08:00
Andy Yan
ab4a52e2ee drm/rockchip: vop2: Add port mux translation for rk3588 mipi dsi
The port mux configuration of two mipi dsi hosts on rk3588 break
the direct mapping rules used on other soc and other connector
interfaces. We need add a translation here.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: If3d6ae26c685e40e00e8c783b28856be3ec2d524
2021-11-02 18:30:15 +08:00
Sandy Huang
6711962e5f drm/rockchip: vop: update crtc feature
1. add overscan feature to indicate rk3588 can't support overscan;
2. add more feature info for rk3588;
3. fix some feature character error;

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I708e506db87c36078453232530bfb4d78e779010
2021-11-02 18:27:28 +08:00
Guochun Huang
a124131bab drm/rockchip: dsi: add to get dsc info from dts
Change-Id: Idbf1503e775a26d24ba1965495d531e30b7cc6c6
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2021-11-02 10:25:20 +08:00
Sandy Huang
a3d4f6e0df drm/rockchip: vop: add calculate current frame data size
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie9c92c651b8c379c77aac941d03bf3f772ed7eea
2021-10-29 19:00:34 +08:00
Zhen Chen
a42b57181b MALI: rockchip: upgrade bifrost DDK to g7p1-01bet0, from g6p0-01eac0
Including modifications under drivers/base/ from the new DDK.

Resolve lots of conflicts.

Fix compilation errors when CONFIG_DEBUG_FS is disabled.

Change-Id: I69f9ac87d927441d0b92b8dac8b704922aeb6a0a
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-10-29 18:44:22 +08:00
Zhen Chen
8e59d03969 MALI: bifrost: fix a bug that makes vdd_gpu abnormally low
Change-Id: Ic0b785ead0da551e9e640c45b73f6686a1ec5cca
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-10-29 18:44:22 +08:00
Zhen Chen
404110b7de MALI: rockchip: upgrade bifrost DDK to g6p0-01eac0, from g2p0-01eac0
Include a new directory include/uapi/gpu/arm/bifrost/,
which includes some header files of bifrost device driver.
In the original part of g6, the path is include/uapi/gpu/arm/midgard/.
I changed the "midgard" to "bifrost", and modified the paths of the header files in .c files.

I resolved some conflicts between modifications form ARM and RK, manually.

In addition, introduce source files of protected_memory_allocator
that might be needed by bifrost_device_driver into build system.

Further more, to avoid errors when building in GKI mode,
add "WITH Linux-syscall-note" to SPDX tag of uapi headers.

Change-Id: I09d500a0fdbc5da352c81dc4fcfbffb5b7f907f5
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-10-29 18:44:22 +08:00
Sandy Huang
cd2119c1ce drm/rockchip: vop2: add support rk3588 DSC
RK3588 can support DSC (Display Stream Compression) with the following
feature:

1. DSC 8K encoder for HDMI TX0/MIPI DSI2 Host0 interface
2. DSC 4K encoder for HDMI TX1/MIPI DSI2 Host1 interface
3. Conformance Standard: VESA DSC v1.1 and v1.2a
4. Data path: VOP VP -> DSC encoder -> DSI/HDMI controller -> phy -> panel

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ia395374102be0e1710bb2049d7407a6cc0d5f873
2021-10-29 17:12:50 +08:00
Andy Yan
aa3aee14d0 drm/rockchip: vop2: Add vop2 internal pd support for rk3588
There are 7 internal power domains on rk3588 vop:

Cluster0/1/2/3 each have one, and Cluster0 power domain act
as parent pd of Cluster1/2/3.

Esmart0/1/2/3 share on pd.

DSC_8K/DSC_4K each have one.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: If2c3c79980d2690761d12e64a486aca9be992e4b
2021-10-29 17:01:03 +08:00
Guochun Huang
cfd737a904 drm/rockchip: rk628: fix lvds default data format
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Ib99e6e3d285b3693428523fdd11027d8862ee734
2021-10-29 16:00:57 +08:00
Sandy Huang
dd32d33d69 drm/rocckhip: vop: rename to NEXT_HDR feature
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I148ecf0f400c98e8c5e79716a6c69add3b21b6e5
2021-10-29 15:29:05 +08:00
Andy Yan
c4b5e35d90 drm/rockchip: vop2: Add splice mode for alpha
Used for 8K output on rk3588

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ic5a5443f85c063fcf45a2c91a676766a773a0317
2021-10-27 16:11:32 +08:00
Andy Yan
b5502e21e2 drm/rockchip: vop2: Add splice support for HDR10
We need two HDR10 controllers in splice mode.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ie4f98f64b3afa1a4bbf561d4dc061031febd22e5
2021-10-27 16:10:55 +08:00
Andy Yan
f001cec92f drm/rockchip: vop: Use __drm_atomic_helper_plane_reset instead of copying the logic
A new helper function(__drm_atomic_helper_plane_reset) has been added
for linking a plane with its state and resetting the core
properties(alpha, rotation, etc.) to their default values.
Use that instead of duplicating the logic.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I3219f6ee0eef49c59277c84ea6efc72ae4a90ef9
2021-10-27 15:49:52 +08:00
Andy Yan
339b80072b drm/rockchip: vop2: Use __drm_atomic_helper_plane_reset instead of copying the logic
A new helper function(__drm_atomic_helper_plane_reset) has been added
for linking a plane with its state and resetting the core
properties(alpha, rotation, etc.) to their default values.
Use that instead of duplicating the logic.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ic9db9e9d6eee32796899fceba4df7cbf1eaaf5f6
2021-10-27 15:49:52 +08:00