Part of spinand sram maybe change after read status register
Fixes: cf69491c97 ("drivers: rkflash: Add spinand program cache recheck")
Change-Id: Ia8f902fe51562d71a5b8e78a80e63eb26257df38
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Add spinand power lost situation protection to avoid
abnormal data written to flash array(recheck 1) or
just reduce error behavior(recheck 2)
Change-Id: Ic445fd09fd407c225b47310d666b39f095fcfb17
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
In file included from drivers/rkflash/sfc_nand_mtd.c:6:0:
./include/linux/mtd/cfi.h:76:2: warning: #warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. [-Wcpp]
error, forbidden warning:cfi.h:76
#warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work.
^~~~~~~
scripts/Makefile.build:333: recipe for target 'drivers/rkflash/sfc_nand_mtd.o' failed
make[2]: *** [drivers/rkflash/sfc_nand_mtd.o] Error 1
make[2]: *** Waiting for unfinished jobs....
In file included from drivers/rkflash/sfc_nor_mtd.c:6:0:
./include/linux/mtd/cfi.h:76:2: warning: #warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. [-Wcpp]
error, forbidden warning:cfi.h:76
Change-Id: I900d20adbd86c8293a9496ffba4bd722a46bfeae
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
1.Change to use RK MTD vendor operation
2.RK MTD vendor is incompatible with RK vendor
Change-Id: I7c233b0b0a98c5e93d0722956809a9d6c01663a1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Fixes: 008340a82 ("drivers: rkflash: Change to use the api which the oob area available")
Change-Id: I140aa76a2acb73271ba04b7060030dc06a2353e6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Fixes: 69f3c341d9 ("drivers: rkflash: Support spinand non aligned read")
Change-Id: I3146cd574ac77c2d1a0b5b6563440d86766a0a9a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.Add more information for SPI Nand MTD debug
2.Return program result
Change-Id: I3fc7d63955355ad88adfbd02f0b67fc16c9d76d5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Firstly, init SNOR from flash table, then if this SPI Nor isn't
in flash table, reinit from snor flash packet.
Change-Id: Ia6fc76801ac44f978a198f4d369ade5c0af36f8b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
That snor_info_packet is SPI Nor information placed in IDB header
area, each progress can parse it to get flash information.
Change-Id: I101e3720050f8b926d3f3f9da812112a408e5586
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.Fix wrong return value
2.Results are subject to back reading verification
Change-Id: Ifd3965423261617bdaeecc10fd4da28cb703b2aa
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.Add more varification for ftl read/write input param
2.dump stack in FtlMemInit
Change-Id: I7a09f54c217d9da8e656cb91fe18ca83a882cff6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.more undefined references to `__memzero' follow
2.fix to MTD return value
Change-Id: I1adf89873db1e85568deaf2941867b8d45252eff
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.Decrece reserved IDBlock from 16 to 8
2.Decrece print info
Change-Id: I69443b0f2381f061176d6f2cf32497f644564093
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.Extern all controller low layer driver APIs in rkflash_api.h
2.Register dev when controller node is probed;
3.APIs rkflash_dev_xxx for dev register in rkflash_blk.c, support:
rkflash_blk: SLC Nand blk dev;
rkflash_blk: SPI Nand blk dev;
rkflash_blk: SPI Nor mtd dev;
spi_nand_mtd: SPI Nand mtd dev;
spi_nor_mtd: SPI Nor mtd dev;
Change-Id: I5423fead6b6343d1ab94303d30d486dea74b166c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
