Commit Graph

74848 Commits

Author SHA1 Message Date
Algea Cao
efab7c9ded drm/rockchip: dw_hdmi: SCDC communication is performed only on SCDC supported TV
If SCDC communication is performed on a TV that does not
support SCDC, the I2C bus may become stuck.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I1c1cf926394746dcc198b427a61ffa486ecc99f3
2021-12-23 21:15:44 +08:00
Algea Cao
b09fc482a2 drm/rockchip: set read only properties immutable
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I22bc515d1605b3bde74f230e96b99cd2ee26dce9
2021-12-23 20:14:38 +08:00
Wyon bi
ce6108c721 drm/rockchip: dw-dp: Use max bpc for color depth limit
Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: I2ef8d8ba17af50abb4ad3be54e15b5e933ef1e48
2021-12-23 20:10:43 +08:00
Zhen Chen
757826e997 MALI: rockchip: upgrade bifrost DDK to g9p0-01eac0, from g7p1-01bet0
In addition, fix a bug of calling KBASE_KTRACE_ADD() too early.

Change-Id: I843f340526275b50ae7d1ec6a7a68963e081e219
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2021-12-23 19:33:49 +08:00
Sandy Huang
3c5901b19d drm/rockchip: vop2: set dsc delay num according to dsc bpp
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I57a2a4a8d07c98ce5fb76aa7364690e171fa2937
2021-12-23 19:08:03 +08:00
Sandy Huang
14b835b916 drm/rockchip: vop2: reset dsc config when exit dsc
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Idfe11a25249ab89b73a752c8f48c6c38bc192885
2021-12-23 19:07:59 +08:00
Andy Yan
df5f245c28 drm/rockchip: vop2: Make sure previout zpos update take effect before change it
We have the same LAYER_SEL&PORT_SEL register conflicts
issue as rk356x.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I68bf32499b04bba5b0089df2bb473673d9804b90
2021-12-23 11:07:42 +08:00
Andy Yan
29af993b46 drm/rockchip: vop2: Setup dly for vp even there is no plane
We notice there are many POST_BUF_EMPTY irq when user space
enable a video port but without any attached plane.

Setup dly in this situation can avoid the POST_BUF_EMPTY
irq storm.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I907eb1737ac134dda8b2d237584c9d2f2b917b5e
2021-12-22 20:13:52 +08:00
Andy Yan
f925d936cb drm/rockchip: vop2: swap uv for YUV422 8bit/10bit AFBC
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Iba6af8944093201ba84c8fec5deab9eb29265c9e
2021-12-22 20:10:12 +08:00
Sandy Huang
cf58ab4406 drm/rockchip: vop2: rename and correct supported format
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie9b78a26446ce8fc413f2595df6414c1454f03f9
2021-12-22 18:54:35 +08:00
Sandy Huang
3023f3acc5 drm/rockchip: vop2: add support YUYV and UYVY for rk3588
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iecdfa09746389998a9eefef442b2350308c59b14
2021-12-22 16:36:27 +08:00
Caesar Wang
325213d280 drm/rockchip: dw_hdmi: improve readability of unknown property
The original set the property error message:
[drm:dw_hdmi_rockchip_set_property] *ERROR* failed to set
rockchip hdmi connector property

This patch will output the useful information as below:
[drm:dw_hdmi_rockchip_set_property] *ERROR* Unknown property
[PROP:198:hdmi_color_depth_capacity]

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I43762d395ebed5e0fcaa96d1ebc6142a5fe1b068
2021-12-21 20:49:50 +08:00
Finley Xiao
34af47df70 MALI: bifrost: Implement rk3588_gpu_set_read_margin()
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I02ea2bc1feb987b94832182ee7ea94fd1b4ee6cf
2021-12-21 18:13:20 +08:00
Finley Xiao
b962421460 MALI: bifrost: change BASE_MAX_NR_CLOCKS_REGULATORS to 4
Add a new scmi clk for changing gpu clock rate.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ib2496a528a44a4106e1becf0d99335e207d85667
2021-12-21 18:13:12 +08:00
Finley Xiao
ddd6a0b49a soc: rockchip: opp_select: Add struct rockchip_opp_info
Add support to get soc info and set voltage read margin.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I254a92ba124655e3efc4922a7425c1f13d384adf
2021-12-21 15:01:01 +08:00
Wyon Bi
9d4c703bdf drm/bridge: analogix_dp: Fix AUX channel access error handling
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ie06285f729ff6a02f8ccdea51de16757df7abf4d
2021-12-17 17:35:34 +08:00
Algea Cao
6b84df2152 drm/rockchip: dw_hdmi: Support rk3588 hdr10
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ib7618b7627fca48efe4a9812a1b60106b9e1b834
2021-12-16 19:06:51 +08:00
Guochun Huang
b8571e2321 drm/panel: simple: Add support for dcs backlight
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: Id9380a16c1db606f30032259a3bbba0884731c97
2021-12-15 11:10:54 +08:00
Wyon Bi
54821e8d85 drm/rockchip: dw-dp: Fix aux timeout at boot
Use the HPD state machine state in detect instead of HPD_STATUS.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I9e6b14c819fa29dd38101340e40334f050832524
2021-12-14 18:44:28 +08:00
Tao Huang
f6909c028f Merge tag 'ASB-2021-12-05_12-5.10' of https://android.googlesource.com/kernel/common
https://source.android.com/security/bulletin/2021-12-01
CVE-2021-33909
CVE-2021-38204
CVE-2021-0961

* tag 'ASB-2021-12-05_12-5.10': (3010 commits)
  ANDROID: workqueue: export symbol of the function wq_worker_comm()
  ANDROID: GKI: Update symbols to symbol list
  ANDROID: vendor_hooks: Add hooks for binder proc transaction
  ANDROID: GKI: Add symbols abi for USB IP kernel modules.
  ANDROID: GKI: Fix file mode on mtk abi file
  UPSTREAM: erofs: fix deadlock when shrink erofs slab
  ANDROID: init_task: Init android vendor and oem data
  UPSTREAM: sched/core: Mitigate race cpus_share_cache()/update_top_cache_domain()
  ANDROID: Update symbol list for mtk
  UPSTREAM: erofs: fix unsafe pagevec reuse of hooked pclusters
  UPSTREAM: erofs: remove the occupied parameter from z_erofs_pagevec_enqueue()
  UPSTREAM: usb: dwc3: gadget: Fix null pointer exception
  ANDROID: fips140: support "evaluation testing" builds via build.sh
  FROMGIT: sched/scs: Reset task stack state in bringup_cpu()
  ANDROID: dma-buf: heaps: fix dma-buf heap pool pages stat
  ANDROID: ABI: Add several spi_mem related symbols
  UPSTREAM: spi: spi-mem: add spi_mem_dtr_supports_op()
  ANDROID: gki_defconfig: enable CONFIG_SPI_MEM
  ANDROID: ABI: Add several iio related symbols
  ANDROID: ABI: Update symbol list for IMX
  ...

Change-Id: I09cddc92fa34553b944e62cc5cbbba94a84e5437

Conflicts:
	arch/arm/boot/dts/rk322x.dtsi
	arch/arm64/boot/dts/rockchip/rk3399.dtsi
	drivers/dma-buf/heaps/system_heap.c
	drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
	drivers/gpu/drm/rockchip/rockchip_drm_vop.c
	drivers/gpu/drm/rockchip/rockchip_lvds.c
	drivers/gpu/drm/rockchip/rockchip_vop_reg.c
	drivers/mtd/nand/spi/core.c
	drivers/pci/controller/pcie-rockchip-host.c
	drivers/soc/rockchip/Kconfig
	drivers/usb/dwc3/core.c
	drivers/usb/dwc3/core.h
2021-12-14 17:09:02 +08:00
Algea Cao
6767e3819f drm/rockchip: dw_hdmi: Don't create hdmi property hdmi_quant_range
RK3588 does not currently support this property.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Iddb898bc044a3f2aa07b27506593b2c56f096e16
2021-12-14 14:59:09 +08:00
Wyon Bi
fd70e6d353 drm/rockchip: dw-dp: Fix connectors changed in clone mode
When a new connector is added to current routing in clone mode,
the new connector doesn't have mode_changed=true set. This
incorrect programming sequence causes .mode_set call mismatches
to occur in the new stream.

So move the mode_set code to other callback.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I90f50882057c63f702cf390fb7bfeed088575324
2021-12-14 14:50:21 +08:00
Damon Ding
56102c8698 drm/bridge: sii902x: modify the check of bus-format
Use the definition of MEDIA_BUS_FMT_XXX instead of the
definition of sii902x_bus_format.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I72b4d92a1704f98f437a80d2a8afe16d9f6b003f
2021-12-14 09:58:24 +08:00
Wyon Bi
29bdeacb4b drm/rockchip: dw-dp: Fix bus format for split mode
Fixes: f9e002e86f ("drm/rockchip: dw-dp: Add full output bus format support")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ib644ce28a5963082989e5345f046aca591c63166
2021-12-13 15:01:12 +08:00
Algea Cao
5989ac192f drm/rockchip: dw_hdmi: Correct incorrect color format configuration
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Id3267a80c0893acbfdbbd64ed06bf4c24fec57ae
2021-12-10 14:20:44 +08:00
Andy Yan
ae488c03ab drm: Not mark crtc state as connectors_changed when a writeback connector attatch to a crtc
The drm core will disable than enable a crtc when is marked as
connectors_changed.

But when we attach a writeback connector to a running
crtc, we really don't need this disable/enable, which
will black a running screen.

Change-Id: I636615f27424bc60496ffc487c218f60fb95d719
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-12-10 10:55:24 +08:00
Guochun Huang
9dd3db9ef9 drm/rockchip: dsi2: add loader protect helper for kernel logo
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I8132c8c6146e110a1ec0f559ce9ee426a85dd7e2
2021-12-09 16:01:53 +08:00
Andy Yan
81d9bd6936 drm/rockchip: vop2: Make sure the primary plane type is DRM_PLANE_TYPE_PRIMARY
Some times we want change a overlay plane defined in vop2_reg
to primary plane.

Change-Id: I5f563fb258a66278255be762ebdfca21b51aabd1
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2021-12-09 14:22:16 +08:00
Jianqun Xu
cd5c6a5b3a drm: rockchip: use dmabuf cache
Change-Id: I6a34a5a4f33e54b7459461bcfa84f03a831d2f65
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2021-12-09 10:55:09 +08:00
Sandy Huang
625ff3fefb drm/rockchip: vop2: gamma add support 8k
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I913ce7ec5a2f6486515ce2356051088b2934c205
2021-12-08 18:37:14 +08:00
Sandy Huang
696cf91c28 drm/rockchip: vop2: bcsh add support 8k
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I2ff73d12b9d6100c5bbfb96229166800841356ac
2021-12-08 18:37:14 +08:00
Sandy Huang
4dad387418 drm/rockchip: vop2: cubic lut add support 8k
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I222a734ae68d134bc52526530e008874b8e07a5b
2021-12-08 18:37:14 +08:00
Sandy Huang
30f24f27ba drm/rockchip: vop2: update axi rid
after this commit, axi id is used as the following rules:
AXI0
    Cluster0:
	win0: 0x2,0x3
	win1: 0x4,0x5
    Cluster1:
	win0: 0x6,0x7
	win1: 0x8,0x9
    Esmart0: 0xa, 0xb
    Esmart1: 0xc, 0xd
    Lut: 0xe[for vp0/2, will be used at different time]

AXI1:
    Cluter2:
	win0: 0x2,0x3
	win1: 0x4,0x5
    Cluster3:
	win0: 0x6,0x7
	win1: 0x8,0x9
    Esmart2: 0xa,0xb
    Esmart3: 0xc, 0xd
    Lut: 0x1[for vp1]

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iae865835e49ba8ca0197b0f015d7709cba23e8b3
2021-12-08 18:37:14 +08:00
Algea Cao
b53d1f9467 drm/rockchip: dw_hdmi: Support 8K HDMI output
Support hdmi frl mode and dsc function.
Support max 8K-60Hz RGB 10bit output.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ibc2d48e2b25bc94e4be7ffa9703c400436bdee36
2021-12-08 11:26:13 +08:00
Algea Cao
02dbed2fbb drm/rockchip: drv: Don't parse DSC information when the VSDB does not contain the DSC block
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I685fea28613e2538657074ac2ee8c8d4b2667cd3
2021-12-08 11:22:47 +08:00
Algea Cao
a771ef8592 drm/rockchip: dw_hdmi: Attach rk3588 hdmi properties
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I9520b410f1dafa6a765a2341e244568ea78700ba
2021-12-08 11:22:47 +08:00
Sandy Huang
180d0b6980 drm/rockchip: vop2: add support cubic lut
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I0cf87a6d6c30ddc705c17dce677e5b7747084908
2021-12-07 15:59:58 +08:00
Sandy Huang
2d67ec5094 drm/rockchip: vop2: add support rk3588 gamma
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I6be46a12d73890c61578f1dae7a88b9cb4271dfb
2021-12-07 15:58:47 +08:00
Herman Chen
30eb2be25b iommu/rockchip: Add shootdown_entire prop
Replace IOMMU_TLB_SHOT_ENTIRE by shootdown_entire defined in
iommu DT node for clean IOMMU framework code and more convenient
for masters. The master should call iommu_flush_iotlb_all to
zap cache manually.

Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I5feab72fa12782d0715ad84a98cbd96a88bcd598
2021-12-07 15:02:35 +08:00
Simon Xue
540ad49319 Revert "drm/rockchip: gem: add IOMMU_TLB_SHOT_ENTIRE when call iommu_map_sg"
This reverts commit 91db0733d7.

Signed-off-by: Simon Xue <xxm@rock-chips.com>
Change-Id: I7842de3f5a7e4a64e570ceb93e82fdee38f78498
2021-12-07 15:02:27 +08:00
Sandy Huang
2e72e95308 drm/rockchip: dsi2: add support software TE mode
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I5fd600c9a91dd59cbfaf89765b63b7aa261f3976
2021-12-07 14:21:00 +08:00
Sandy Huang
cc5f5c07a0 drm/rockchip: vop2: add support mipi dsi cmd mode panel
for vp2/vp3, we can use hardware or software TE to sync with panel ram,
but for vp1->dsc1->dsc1 path, we only can use software TE to sync with panel
ram.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I0f54723c5c1c45916e669ce21819a127dc5b415d
2021-12-07 14:21:00 +08:00
Sandy Huang
be1e4b616a drm/rockchip: drv: add support soft TE mode to sync with panel ram
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I3d0cc0f6f941da61336f47062a8682210234b803
2021-12-07 14:21:00 +08:00
Wyon Bi
f9e002e86f drm/rockchip: dw-dp: Add full output bus format support
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I9d64c8d7cdf756f7e2e02465a70b6f3e1ccf03f9
2021-12-07 09:21:30 +08:00
Wyon Bi
abcb1f7cc8 drm/rockchip: vop2: Add more bus formats
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Icedcbb58a441086727baf6c194598dae0f7c97df
2021-12-07 09:21:30 +08:00
Sandy Huang
aa4f2f1f87 drm/rockchip: vop2: update DSC config for HDMI 8kp60 RGB output
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Id80e3ced8899843e42e2fcaf1954fdad71f0cef1
2021-12-04 16:05:51 +08:00
Algea Cao
7bd094a384 drm/rockchip: dw_hdmi_qp: Fix rk3588 hdmitx suspend crash
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I5f7771dbcbcfb13fb556b84ba147711fbde689e5
2021-12-03 16:14:51 +08:00
Wyon Bi
b7723280a5 drm/rockchip: dw-dp: support dynamic binding to different vp port
Fixes: ca885383eb ("drm/rockchip: dw-dp: support dynamic binding to different vp port")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I94654e6eb916d688d9fe46544f60bd02e8d8cb7b
2021-12-03 15:16:11 +08:00
Sugar Zhang
ae7682acd6 drm/bridge: synopsys: dw-hdmi-qp: Fix PKTSCHED register access error
ACR located at Packet Scheduler which belongs to VIDQPCLK domain.
So, the related clk should be enabled before register access.

Actually, There are three CLK domain (AUDCLK, VIDQPCLK, LINKQPCLK)
related to Audio. So, do check clk status before config audio.

Maybe the better way should be spliting hdmi regmap into several parts
which managed by related clk domain in future.

e.g.

  devm_regmap_init_mmio_clk(dev, "aud", regs, AUD_REGBANK);
  devm_regmap_init_mmio_clk(dev, "vidqp", regs, VIDQP_REGBANK);
  devm_regmap_init_mmio_clk(dev, "linkqp", regs, LINKQP_REGBANK);
  ...

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ib497d92a73d99d9f38c4617f615f02c705b82ae7
2021-12-03 15:15:46 +08:00
Sugar Zhang
5260237497 Revert "drm/bridge: synopsys: Fix register access panic when PD off"
This reverts commit 6b7fb9a6c9.

The audio regbank of hdmi-qp is drived by audio interface clk, and had
fixed by commits as follows:

[1] 3a7f369b5c ("arm64: dts: rockchip: rk3588: Add aud clk for hdmi nodes")
[2] e108ff9f6f ("drm/rockchip: dw_hdmi: Handle aud clk for hdmi qp")

OTOH, to make android hal happy, we still allow to access hdmi audio even
hdmi is plugged out.

  "hdmi-audio-codec: ASoC: error at snd_soc_dai_startup on i2s-hifi: -19"

Android/Linux should reopen hdmi sound card depends on HPD plug event
to bring back to normal state.

Change-Id: I654fe18a04b750f57c8bd52ef4948a476bc1fa50
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2021-12-01 16:43:15 +08:00