On page 362 of the USB3.2 specification (
https://usb.org/sites/default/files/usb_32_20210125.zip),
The 'SuperSpeed Endpoint Companion Descriptor' shall only be returned
by Enhanced SuperSpeed devices that are operating at Gen X speed.
Each endpoint described in an interface is followed by a 'SuperSpeed
Endpoint Companion Descriptor'.
If users use SuperSpeed UDC, host can't recognize the device if endpoint
doesn't have 'SuperSpeed Endpoint Companion Descriptor' followed.
Currently in the uac2 driver code:
1. ss_epout_desc_comp follows ss_epout_desc;
2. ss_epin_fback_desc_comp follows ss_epin_fback_desc;
3. ss_epin_desc_comp follows ss_epin_desc;
4. Only ss_ep_int_desc endpoint doesn't have 'SuperSpeed Endpoint
Companion Descriptor' followed, so we should add it.
Fixes: eaf6cbe099 ("usb: gadget: f_uac2: add volume and mute support")
Signed-off-by: Jing Leng <jleng@ambarella.com>
Link: https://lore.kernel.org/all/20220218095948.4077-1-3090101217@zju.edu.cn/
Change-Id: Iceb69749909795632a1620cd5c6f70756c2bf023
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Currently the f_uac1 driver only supports UAC_SET_CUR request.
But when uac1 device is plugged to Ubuntu 20.04 PC, at the stage
of setup, the PC will send UAC_SET_RES request, If the device
doesn't respond to the request, the PC will abort the setup process
and uac1 device can't be recognized on Ubuntu 20.04 PC.
So f_uac1 driver should handle other set requests.
Fixes: 0356e6283c ("usb: gadget: f_uac1: add volume and mute support")
Signed-off-by: Jing Leng <jleng@ambarella.com>
Link: https://lore.kernel.org/all/20220218094947.3835-1-3090101217@zju.edu.cn/
Change-Id: I733f2fdab6256fe29094a15b31e3490f59e6498b
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
On page 61 of the UAC1 specification (
https://www.usb.org/sites/default/files/audio10.pdf),
bInterval is interval for polling endpoint for data transfers
expressed in milliseconds, must be set to 1.
On page 47 of the USB2.0 specification (
https://www.usb.org/sites/default/files/usb_20_20211008.zip),
An isochronous endpoint must specify its required bus access period.
Full-/high-speed endpoints must specify a desired period as
(2^(bInterval-1)) x F, where bInterval is in the range one to
(and including) 16 and F is 125 μs for high-speed and 1ms for full-speed.
On page 362 of the USB3.2 specification (
https://usb.org/sites/default/files/usb_32_20210125.zip),
The 'SuperSpeed Endpoint Companion Descriptor' shall only be
returned by Enhanced SuperSpeed devices that are operating at Gen X speed.
Each endpoint described in an interface is followed by a 'SuperSpeed
Endpoint Companion Descriptor'.
Currently uac1 driver doesn't set bInterval to 1 in full speed transfer
and doesn't have a 'SuperSpeed Endpoint Companion Descriptor' behind
'Standard Endpoint Descriptor'.
So we should set bInterval to 1 in full speed transfer and set it to 4
in other speed transfers, and we should add 'SuperSpeed Endpoint Companion
Descriptor' behind 'Standard Endpoint Descriptor' for superspeed transfer.
Signed-off-by: Jing Leng <jleng@ambarella.com>
Link: https://lore.kernel.org/all/20220217051951.7466-1-3090101217@zju.edu.cn/
Change-Id: I53205c1850a0239d1f39f4c44cea77bfb1c00e81
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
bay3d support 8x8 write to ddr for full resolution
drc gas_t 13bit
Change-Id: Ifb58985858a66257be0f8811e94e089f75ef19ff
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
The default clock is not necessarily the normal operating
frequency, so the frequency must be specified explicitly.
CORE_CRYPTO: 300M
PKA_CRYPTO : 300M
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ic65db79365c0b21678d04bb0a09cc813d84c1eb7
Since fusb302 is out of stock, produced toybrick boards will use husb311.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Change-Id: I1fca5ee70776cdf29ddecac77ff22a09f5126f38
Enable the bridge driver for VGA/DP/HDMI display connectors.
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I5b8cc74cdffa5e7a0dd6b85b7591525389d9d85a
Since this bridge is tied to the connector, it acts like a passthrough,
so concerning the output & input bus formats, either pass the bus formats from the
previous bridge or return fallback data like done in the bridge function:
drm_atomic_bridge_chain_select_bus_fmts() & select_bus_fmt_recursive.
This permits avoiding skipping the negociation if the remaining bridge chain has
all the bits in place.
Without this bus fmt negociation breaks on drm/meson HDMI pipeline when attaching
dw-hdmi with DRM_BRIDGE_ATTACH_NO_CONNECTOR, because the last bridge of the
display-connector doesn't implement buf fmt callbacks and MEDIA_BUS_FMT_FIXED
is used leading to select an unsupported default bus format from dw-hdmi.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211020123947.2585572-2-narmstrong@baylibre.com
(cherry picked from commit 7cd70656d1)
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I0ca41465e69c8d251c45faf963585ef2f7cdc39e
The "label" pointer is used for debug output. The code assumes that it
is either NULL or valid, but it is never set to NULL. It is either
valid or uninitialized.
Fixes: 0c275c3017 ("drm/bridge: Add bridge driver for display connectors")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211013080825.GE6010@kili
(cherry picked from commit 189723fbe9)
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I79bf43cfce81556eb1fec67eaf2559884f5f6e98
Add DP support to display-connector driver. The driver will support HPD
via a GPIO and DP PWR.
DP PWR will be enabled at probe, which is not optimal, but I'm not sure
what would be a good place to enable and disable DP PWR. Perhaps
attach/detach, but I don't know if enabling HW is something that attach
is supposed to do.
In any case, I don't think there's much difference in power consumption
between the version in this patch and enabling the regulator later: if
the driver probes, supposedly it will attach very soon afterwards, and
we need to enable the DP PWR as soon as possible.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130112919.241054-3-tomi.valkeinen@ti.com
(cherry picked from commit 2e2bf3a558)
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I6dade5750c5019cfdbc46d4d9c0df88b4ceeff06
MI_WR_WRAP_CTRL will be different at isp power on,
and selfpath maybe no auto update addr.
Change-Id: I729048e7d6dca7cdf26fb403f46beae8557a7879
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
Although this property does not affect the real hardware,
it is still added to let people know the clock direction.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I1b08303568fe474fb3dbf5803b252749f30b9c94
Amends to support the new type-c framework for rk3399-evb-ind board.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I07c5ca9fd5770bd663ea1de70eb1cbe297177282
1.Support PCIE_DMA_GET_BUFFER_SIZE
2.Fix variable type
Change-Id: I458e52e99495a2c5b53bd80624bcfe636df3145f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
