msm-next:
- OCMEM support for a3xx and a4xx GPUs.
- a510 support + display support
core:
- mst payload deletion fix
i915:
- uapi alignment fix
- fix for power usage regression due to security fixes
- change default preemption timeout to 640ms from 100ms
- EHL voltage level display fixes
- TGL DGL PHY fix
- gvt - MI_ATOMIC cmd parser fix, CFL non-priv warning
- CI spotted deadlock fix
- EHL port D programming fix
amdgpu:
- VRAM lost fixes on BACO for CI/VI
- navi14 DC fixes
- misc SR-IOV, gfx10 fixes
- XGMI fixes for arcturus
- SRIOV fixes
amdkfd:
- KFD on ppc64le enabled
- page table optimisations
radeon:
- fix for r1xx/2xx register checker.
tegra:
- displayport regression fixes
- DMA API regression fixes
mgag200:
- fix devices that can't scanout except at 0 addr
omap:
- fix dma_addr refcounting
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Merge tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm
Pull more drm updates from Dave Airlie:
"Rob pointed out I missed his pull request for msm-next, it's been in
next for a while outside of my tree so shouldn't cause any unexpected
issues, it has some OCMEM support in drivers/soc that is acked by
other maintainers as it's outside my tree.
Otherwise it's a usual fixes pull, i915, amdgpu, the main ones, with
some tegra, omap, mgag200 and one core fix.
Summary:
msm-next:
- OCMEM support for a3xx and a4xx GPUs.
- a510 support + display support
core:
- mst payload deletion fix
i915:
- uapi alignment fix
- fix for power usage regression due to security fixes
- change default preemption timeout to 640ms from 100ms
- EHL voltage level display fixes
- TGL DGL PHY fix
- gvt - MI_ATOMIC cmd parser fix, CFL non-priv warning
- CI spotted deadlock fix
- EHL port D programming fix
amdgpu:
- VRAM lost fixes on BACO for CI/VI
- navi14 DC fixes
- misc SR-IOV, gfx10 fixes
- XGMI fixes for arcturus
- SRIOV fixes
amdkfd:
- KFD on ppc64le enabled
- page table optimisations
radeon:
- fix for r1xx/2xx register checker.
tegra:
- displayport regression fixes
- DMA API regression fixes
mgag200:
- fix devices that can't scanout except at 0 addr
omap:
- fix dma_addr refcounting"
* tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm: (100 commits)
drm/dp_mst: Correct the bug in drm_dp_update_payload_part1()
drm/omap: fix dma_addr refcounting
drm/tegra: Run hub cleanup on ->remove()
drm/tegra: sor: Make the +5V HDMI supply optional
drm/tegra: Silence expected errors on IOMMU attach
drm/tegra: vic: Export module device table
drm/tegra: sor: Implement system suspend/resume
drm/tegra: Use proper IOVA address for cursor image
drm/tegra: gem: Remove premature import restrictions
drm/tegra: gem: Properly pin imported buffers
drm/tegra: hub: Remove bogus connection mutex check
ia64: agp: Replace empty define with do while
agp: Add bridge parameter documentation
agp: remove unused variable num_segments
agp: move AGPGART_MINOR to include/linux/miscdevice.h
agp: remove unused variable size in agp_generic_create_gatt_table
drm/dp_mst: Fix build on systems with STACKTRACE_SUPPORT=n
drm/radeon: fix r1xx/r2xx register checker for POT textures
drm/amdgpu: fix GFX10 missing CSIB set(v3)
drm/amdgpu: should stop GFX ring in hw_fini
...
Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Olof Johansson:
"Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
soc: fsl: add RCPM driver
dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
memory: tegra: Consolidate registers definition into common header
memory: tegra: Ensure timing control debug features are disabled
memory: tegra: Introduce Tegra30 EMC driver
memory: tegra: Do not handle error from wait_for_completion_timeout()
memory: tegra: Increase handshake timeout on Tegra20
memory: tegra: Print a brief info message about EMC timings
memory: tegra: Pre-configure debug register on Tegra20
memory: tegra: Include io.h instead of iopoll.h
memory: tegra: Adapt for Tegra20 clock driver changes
memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
memory: tegra: Add gr2d and gr3d to DRM IOMMU group
memory: tegra: Set DMA mask based on supported address bits
soc: at91: Add Atmel SFR SN (Serial Number) support
memory: atmel-ebi: switch to SPDX license identifiers
memory: atmel-ebi: move NUM_CS definition inside EBI driver
soc: mediatek: Refactor bus protection control
soc: mediatek: Refactor sram control
...
Most of these are for MMP (seeing a bunch of cleanups and refactorings
for the first time in a while), and for OMAP (a bunch of cleanups and
added support for voltage controller on OMAP4430).
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform updates from Olof Johansson:
"Most of these are for MMP (seeing a bunch of cleanups and refactorings
for the first time in a while), and for OMAP (a bunch of cleanups and
added support for voltage controller on OMAP4430)"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
ARM: OMAP2+: Add missing put_device() call in omapdss_init_of()
OMAP2: fixup doc comments in omap_device
ARM: OMAP1: drop duplicated dependency on ARCH_OMAP1
ARM: ASPEED: update default ARCH_NR_GPIO for ARCH_ASPEED
ARM: imx: use generic function to exit coherency
ARM: tegra: Use WFE for power-gating on Tegra30
ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
ARM: exynos: Enable exynos-asv driver for ARCH_EXYNOS
ARM: s3c: Rename s5p_usb_phy functions
ARM: s3c: Rename s3c64xx_spi_setname() function
ARM: imx: Add serial number support for i.MX6/7 SoCs
ARM: imx: Drop imx_anatop_usb_chrg_detect_disable()
arm64: Introduce config for S32
ARM: hisi: drop useless depend on ARCH_MULTI_V7
arm64: realtek: Select reset controller
ARM: shmobile: rcar-gen2: Drop legacy DT clock support
ARM: OMAP2+: Remove duplicated include from pmic-cpcap.c
ARM: OMAP1: ams-delta FIQ: Fix a typo ("Initiaize")
MAINTAINERS: Add logicpd-som-lv and logicpd-torpedo to OMAP TREE
ARM: OMAP2+: pdata-quirks: drop TI_ST/KIM support
...
+ OCMEM support to enable the couple generations that had shared OCMEM
rather than GMEM exclusively for the GPU (late a3xx and I think basically
all of a4xx). Bjorn and Brian decided to land this through the drm
tree to avoid having to coordinate merge requests.
+ a510 support, and various associated display support
+ the usual misc cleanups and fixes
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ <CAF6AEGv-JWswEJRxe5AmnGQO1SZnpxK05kO1E29K6UUzC9GMMw@mail.gmail.com
RCPM driver for ARM SoCs
- add RCPM driver to manage the wakeup devices for QorIQ ARM SoCs (HW low
power states are supported in PSCI firmware)
- add API to PM wakeup framework to retrieve wakeup sources
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Merge tag 'soc-fsl-next-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.5
RCPM driver for ARM SoCs
- add RCPM driver to manage the wakeup devices for QorIQ ARM SoCs (HW low
power states are supported in PSCI firmware)
- add API to PM wakeup framework to retrieve wakeup sources
* tag 'soc-fsl-next-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: add RCPM driver
dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
PM: wakeup: Add routine to help fetch wakeup source object.
Link: https://lore.kernel.org/r/1573599595-31411-1-git-send-email-leoyang.li@nxp.com
Signed-off-by: Olof Johansson <olof@lixom.net>
The NXP's QorIQ processors based on ARM Core have RCPM module
(Run Control and Power Management), which performs system level
tasks associated with power management such as wakeup source control.
Note that this driver will not support PowerPC based QorIQ processors,
and it depends on PM wakeup source framework which provide collect
wake information.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
- a new driver exposing the serial number registers through nvmem
- a few documentation and definition changes
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Merge tag 'at91-5.5-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/drivers
AT91 drivers for 5.5
- a new driver exposing the serial number registers through nvmem
- a few documentation and definition changes
* tag 'at91-5.5-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
soc: at91: Add Atmel SFR SN (Serial Number) support
memory: atmel-ebi: switch to SPDX license identifiers
memory: atmel-ebi: move NUM_CS definition inside EBI driver
ARM: at91: Documentation: update the sama5d3 and armv7m datasheets
Link: https://lore.kernel.org/r/20191107221644.GA201884@piout.net
Signed-off-by: Olof Johansson <olof@lixom.net>
- Extend firmware interface to cover Versal chip
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Merge tag 'zynqmp-soc-for-v5.5' of https://github.com/Xilinx/linux-xlnx into arm/drivers
arm64: soc: Xilinx SoC changes for v5.5
- Extend firmware interface to cover Versal chip
* tag 'zynqmp-soc-for-v5.5' of https://github.com/Xilinx/linux-xlnx:
firmware: xilinx: Add support for versal soc
dt-bindings: firmware: Add bindings for Versal firmware
soc: xilinx: Set CAP_UNUSABLE requirement for versal while powering down domain
Link: https://lore.kernel.org/r/6954a53c-6dab-c7a3-7257-58460ca952cb@monstr.eu
Signed-off-by: Olof Johansson <olof@lixom.net>
Put bus protection enable and disable control in separate functions.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Put sram enable and disable control in separate functions.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
[mb: fix coding style of reading register and changing the read value]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Put clock enable and disable control in separate function.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Put regulator enable and disable control in separate functions.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Use USEC_PER_SEC to indicate the polling timeout directly.
And add documentation of scp_domain_data.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* Add thermal IRQ support on MSM8916, SDM845, MSM8996, and QCS404
* Fix thermal HW ids for cpus on MSM8916
* Add blsp1 UART3 and blsp1 BAM on MSM8998
* Add volume buttons and WCNSS for Wifi and BT on MSM8916 LongCheer-l8150
* Fixup load on l21 for SD on apq8096-db820c
* Enable LVS1/2, APSS watchdog, and select UFS reset gpio for SDM845
* Disable coresight by default on MSM8998
* Enable bluetooth and remove retention idle state on MSM8998-clamshell
* Enable adsp, cdsp, and mpss on C630
* Enable bluetooth on MSM8998-mtp
* Delete zap shader on SDM845-cheza
* Add tactile buttons and hall sensor on MSM8916-Samsung-A2015
* Add Interconnect nodes, watchdog, and sleep clk on QCS404
* Override Iris compatible on MSM8916-Samsung-A5U
* Enable WCNSS Wifi and bluetooth on MSM8916-Samsung-A2015
* Fixup cooling states for the aoss warming devices
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Merge tag 'qcom-arm64-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 Updates for v5.5
* Add thermal IRQ support on MSM8916, SDM845, MSM8996, and QCS404
* Fix thermal HW ids for cpus on MSM8916
* Add blsp1 UART3 and blsp1 BAM on MSM8998
* Add volume buttons and WCNSS for Wifi and BT on MSM8916 LongCheer-l8150
* Fixup load on l21 for SD on apq8096-db820c
* Enable LVS1/2, APSS watchdog, and select UFS reset gpio for SDM845
* Disable coresight by default on MSM8998
* Enable bluetooth and remove retention idle state on MSM8998-clamshell
* Enable adsp, cdsp, and mpss on C630
* Enable bluetooth on MSM8998-mtp
* Delete zap shader on SDM845-cheza
* Add tactile buttons and hall sensor on MSM8916-Samsung-A2015
* Add Interconnect nodes, watchdog, and sleep clk on QCS404
* Override Iris compatible on MSM8916-Samsung-A5U
* Enable WCNSS Wifi and bluetooth on MSM8916-Samsung-A2015
* Fixup cooling states for the aoss warming devices
* tag 'qcom-arm64-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (26 commits)
arm64: dts: qcom: db845c: Enable LVS 1 and 2
arm64: dts: qcom: msm8998: Disable coresight by default
arm64: dts: qcom: msm8998-clamshell: Remove retention idle state
arm64: dts: qcom: sdm845-cheza: delete zap-shader
arm64: dts: msm8916: thermal: Fixup HW ids for cpu sensors
arm64: dts: sdm845: thermal: Add interrupt support
arm64: dts: msm8996: thermal: Add interrupt support
arm64: dts: msm8998: thermal: Add interrupt support
arm64: dts: qcs404: thermal: Add interrupt support
arm64: dts: qcom: sdm845: Add APSS watchdog node
arm64: dts: qcom: c630: Enable adsp, cdsp and mpss
arm64: dts: qcom: msm8998-clamshell: Enable bluetooth
arm64: dts: qcom: msm8998-mtp: Enable bluetooth
arm64: dts: qcom: msm8998: Add blsp1_uart3
arm64: dts: qcom: msm8998: Add blsp1 BAM
arm64: dts: msm8916-longcheer-l8150: Add Volume buttons
arm64: dts: msm8916-longcheer-l8150: Enable WCNSS for WiFi and BT
soc: qcom: Invert the cooling states for the aoss warming devices
arm64: dts: apq8096-db820c: Increase load on l21 for SDCARD
arm64: dts: msm8916-samsung-a2015: add tactile buttons and hall sensor
...
Link: https://lore.kernel.org/r/1573068840-13098-2-git-send-email-agross@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Chip on the board is S905D3 not S905X3:
[ 0.098998] soc soc0: Amlogic Meson SM1 (S905D3) Revision 2b:c (b0:2) Detected
Change from v1: use 0xf0 mask instead of 0xf2 as advised by Neil Armstrong.
Fixes: 1d7c541b8a ("soc: amlogic: meson-gx-socinfo: Add S905X3 ID for VIM3L")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
- Skip return check for those SCU firmware APIs that are defined as
void function in firmware.
- Use established serial_number attribute instead of custom one to show
SoC's unique ID for i.MX8 SoC drivers.
- Read i.MX8MQ SOC revision from TF-A which parses ROM and exposes the
value through a SMC call. This improves the situation that SOC
revision reports 'unknown' on some older revisions.
- Add a check and warn on unexpected SCU RX to avoid potential stack
corruption in imx-scu driver.
- Fix a sparse warning in imx-scu-irq driver by adding missing header.
- Remove an unneeded call to devm_of_platform_populate() from imx-dsp
driver.
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Merge tag 'imx-drivers-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.5:
- Skip return check for those SCU firmware APIs that are defined as
void function in firmware.
- Use established serial_number attribute instead of custom one to show
SoC's unique ID for i.MX8 SoC drivers.
- Read i.MX8MQ SOC revision from TF-A which parses ROM and exposes the
value through a SMC call. This improves the situation that SOC
revision reports 'unknown' on some older revisions.
- Add a check and warn on unexpected SCU RX to avoid potential stack
corruption in imx-scu driver.
- Fix a sparse warning in imx-scu-irq driver by adding missing header.
- Remove an unneeded call to devm_of_platform_populate() from imx-dsp
driver.
* tag 'imx-drivers-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx8mq: Read SOC revision from TF-A
soc: imx-scu: Using existing serial_number instead of UID
soc: imx8: Using existing serial_number instead of UID
firmware: imx: add missing include of <linux/firmware/imx/sci.h>
firmware: imx: Remove call to devm_of_platform_populate
firmware: imx: Skip return value check for some special SCU firmware APIs
firmware: imx: warn on unexpected RX
Link: https://lore.kernel.org/r/20191105150315.15477-1-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Minor fixes to Exynos Chipid driver.
2. Add Exynos Adaptive Supply Voltage driver allowing to adjust voltages
used during CPU frequency scaling based on revision of SoC. This
also pulls dependency from PM/OPP tree - driver uses newly added
dev_pm_opp_adjust_voltage() function.
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Merge tag 'samsung-drivers-5.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers
Samsung soc drivers changes for v5.5
1. Minor fixes to Exynos Chipid driver.
2. Add Exynos Adaptive Supply Voltage driver allowing to adjust voltages
used during CPU frequency scaling based on revision of SoC. This
also pulls dependency from PM/OPP tree - driver uses newly added
dev_pm_opp_adjust_voltage() function.
* tag 'samsung-drivers-5.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: exynos-asv: Potential NULL dereference in exynos_asv_update_opps()
soc: samsung: chipid: Drop "syscon" compatible requirement
soc: samsung: Add Exynos Adaptive Supply Voltage driver
PM / OPP: Support adjusting OPP voltages at runtime
soc: samsung: chipid: Make exynos_chipid_early_init() static
Link: https://lore.kernel.org/r/20191104175902.12224-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
SOC revision on older imx8mq is not available in fuses so on anything
other than B1 current code just reports "unknown".
TF-A already handles this by parsing the ROM and exposes the value
through a SMC call. Call this instead of reimplementing the workaround
in the kernel itself.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adds wake event support on Tegra210, implements the NVMEM API for the
Tegra FUSE block and adds coupled regulators support for Tegra20 and
Tegra30.
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Merge tag 'tegra-for-5.5-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.5-rc1
Adds wake event support on Tegra210, implements the NVMEM API for the
Tegra FUSE block and adds coupled regulators support for Tegra20 and
Tegra30.
* tag 'tegra-for-5.5-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Remove unnecessary memory barrier
soc/tegra: pmc: Query PCLK clock rate at probe time
soc/tegra: regulators: Add regulators coupler for Tegra30
soc/tegra: regulators: Add regulators coupler for Tegra20
soc/tegra: pmc: Configure deep sleep control settings
soc/tegra: pmc: Configure core power request polarity
soc/tegra: pmc: Add wake event support on Tegra210
soc/tegra: pmc: Support wake events on more Tegra SoCs
soc/tegra: fuse: Register cell lookups for compatibility
soc/tegra: fuse: Add cell information
soc/tegra: fuse: Implement nvmem device
soc/tegra: fuse: Restore base on sysfs failure
soc/tegra: pmc: Fix crashes for hierarchical interrupts
soc/tegra: fuse: Add FUSE clock check in tegra_fuse_readl()
Link: https://lore.kernel.org/r/20191102144521.3863321-4-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
* 'for_5.5/driver-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
memory: emif: remove set but not used variables 'cs1_used' and 'custom_configs'
soc: ti: omap-prm: fix return value check in omap_prm_probe()
soc: ti: omap-prm: add omap5 PRM data
soc: ti: omap-prm: add am4 PRM data
soc: ti: omap-prm: add dra7 PRM data
soc: ti: omap-prm: add data for am33xx
soc: ti: omap-prm: add omap4 PRM data
soc: ti: omap-prm: add support for denying idle for reset clockdomain
soc: ti: omap-prm: poll for reset complete during de-assert
soc: ti: add initial PRM driver with reset control support
dt-bindings: omap: add new binding for PRM instances
Link: https://lore.kernel.org/r/1572372856-20598-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
The only slightly tricky merge conflict was the netdevsim because the
mutex locking fix overlapped a lot of driver reload reorganization.
The rest were (relatively) trivial in nature.
Signed-off-by: David S. Miller <davem@davemloft.net>
Add support for the power areas in the Renesas R-Car M3-W+ (R8A77961)
SoC to the R-Car System Controller driver.
R-Car M3-W+ (aka R-Car M3-W ES3.0) is very similar to R-Car
M3-W (R8A77960), which allows for both SoCs to share a driver:
- R-Car M3-W+ lacks the A2VC power area, so its area must be
nullified,
- The existing support for the SYSCEXTMASK register added in commit
9bd645af9d2a49ac ("soc: renesas: r8a7796-sysc: Fix power request
conflicts") applies to ES3.0 and later only.
As R-Car M3-W+ uses a different compatible value, differentiate
based on that, instead of on the ES version.
Based on a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-7-geert+renesas@glider.be
Add support for the Reset block in the R-Car M3-W+ (R8A77961) SoC to the
Renesas R-Car RST driver.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-6-geert+renesas@glider.be
Add support for identifying the R-Car M3-W+ (R8A77961) SoC, which shares
the Product ID Number with R-Car M3-W (R8A77960), but differs in CUT
Number (Ver. 3.0), and uses a different compatible value.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-5-geert+renesas@glider.be
Add CONFIG_ARCH_R8A77961 as a configuration symbol for the new Renesas
R-Car M3-W+ (R8A77961) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-4-geert+renesas@glider.be
Add CONFIG_ARCH_R8A77960 as a new config symbol for R-Car M3-W
(R8A77960), to replace CONFIG_ARCH_R8A7796, and avoid confusion with
R-Car M3-W+ (R8A77961), which will use CONFIG_ARCH_R8A77961.
Note that for now, CONFIG_ARCH_R8A7796 is retained, and just selects
CONFIG_ARCH_R8A77960. This relaxes dependencies of other subsystems on
the SoC configuration symbol, and provides a smooth transition path for
config files through "make oldconfig".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-3-geert+renesas@glider.be
Rename CONFIG_SYSC_R8A7796 for R-Car M3-W (R8A77960) to
CONFIG_SYSC_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961),
which will use CONFIG_SYSC_R8A77961.
Rename r8a7796_sysc_info and r8a7796_sysc_init for consistency.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-2-geert+renesas@glider.be
If the DTB for a device with an RZ/A2 SoC lacks a device node for the
BSID register, the ID validation code falls back to using a register at
address 0x0, which leads to undefined behavior (e.g. reading back a
random value).
This could be fixed by letting fam_rza2.reg point to the actual BSID
register. However, the hardcoded fallbacks were meant for backwards
compatibility with old DTBs only, not for new SoCs. Hence fix this by
validating renesas_family.reg before using it.
Fixes: 175f435f44 ("soc: renesas: identify RZ/A2")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191016143306.28995-1-geert+renesas@glider.be
Before this change, unbinding the QMan portals did not trigger a
corresponding unbinding of the dpaa_eth making use of it; the first
QMan portal related operation issued afterwards crashed the kernel.
The device link ensures the dpaa_eth dependency upon the qman portal
used is honoured at the QMan portal removal.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Introduce the API required to make sure that the devices that use
the QMan portal are unbound when the portal is unbound.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The dev_pm_opp_get_opp_table() returns error pointers if it's disabled
in the config and it returns NULL if there is an error. This code only
checks for error pointers so it could lead to an Oops inside the
dev_pm_opp_put_opp_table() function.
Fixes: 5ea428595c ("soc: samsung: Add Exynos Adaptive Supply Voltage driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
In case of error, the function devm_ioremap_resource() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check should
be replaced with IS_ERR().
Fixes: 3e99cb214f ("soc: ti: add initial PRM driver with reset control support")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The removed barrier isn't needed because writes/reads are strictly ordered
and even if PMC had separate ports for writes, it wouldn't matter since
the hardware logic takes into effect after triggering CPU's power-gating
and at that point all CPU accesses are guaranteed to be completed. That
barrier was copied from the old arch/ code during transition to the soc/
PMC driver and even that the code structure was different back then, the
barrier didn't have a real useful purpose from the start. Lastly, the
tegra_pmc_writel() naturally inserts wmb() because it uses writel(),
and thus this change doesn't actually make any difference in terms of
interacting with hardware. Hence let's remove the barrier to clean up
code a tad.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
It is possible to get a lockup if kernel decides to enter LP2 cpuidle
from some clk-notifier, in that case CCF's "prepare" mutex is kept locked
and thus clk_get_rate(pclk) blocks on the same mutex with interrupts being
disabled, hanging machine.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Turned out that WFI doesn't work reliably on Tegra30 as a trigger for
the power-gating, it causes CPU hang under some circumstances like having
memory controller running of PLLP. The TRM doc states that WFI should be
used for the Big-Little "Cluster Switch", while WFE for the power-gating.
Hence let's use the WFE for CPU0 power-gating, like it is done for the
power-gating of a secondary cores. This fixes CPU hang after entering LP2
with memory running off PLLP.
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add regulators coupler for Tegra30 SoCs that performs voltage balancing
of a coupled regulators and thus provides voltage scaling functionality.
There are 2 coupled regulators on all Tegra30 SoCs: CORE and CPU. The
coupled regulator voltages shall be in a range of 300mV from each other
and CORE voltage shall be higher than the CPU by N mV, where N depends
on the CPU voltage.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add regulators coupler for Tegra20 SoCs that performs voltage balancing
of a coupled regulators and thus provides voltage scaling functionality.
There are 3 coupled regulators on all Tegra20 SoCs: CORE, RTC and CPU.
The CORE and RTC voltages shall be in range of 170mV from each other and
they both shall be higher than the CPU voltage by at least 120mV. This
sounds like it could be handle by a generic voltage balancer, but the CORE
voltage scaling isn't implemented in any of the upstream drivers yet.
It will take quite some time and effort to hook up voltage scaling for
all of the drivers, hence we will use a custom coupler that will manage
the CPU voltage scaling for the starter.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 and prior Tegra chips have deep sleep entry and wakeup related
timings which are platform specific that should be configured before
entering into deep sleep.
Below are the timing specific configurations for deep sleep entry and
wakeup.
- Core rail power-on stabilization timer
- OSC clock stabilization timer after SOC rail power is stabilized.
- Core power off time is the minimum wake delay to keep the system
in deep sleep state irrespective of any quick wake event.
These values depends on the discharge time of regulators and turn OFF
time of the PMIC to allow the complete system to finish entering into
deep sleep state.
These values vary based on the platform design and are specified
through the device tree.
This patch has implementation to configure these timings which are must
to have for proper deep sleep and wakeup operations.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch configures polarity of the core power request signal
in PMC control register based on the device tree property.
PMC asserts and de-asserts power request signal based on it polarity
when it need to power-up and power-down the core rail during SC7.
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch implements PMC wakeup sequence for Tegra210 and defines the
commonly used RTC alarm wake event.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch allows to create separate irq_set_wake and irq_set_type
implementations for different Tegra designs PMC that has different
wake models which require difference wake registers and different
programming sequence.
AOWAKE model support is available for Tegra186 and Tegra194 only
and it resides within PMC and supports tiered wake architecture.
Tegra210 and prior Tegra designs uses PMC directly to receive wake
events and coordinate the wake sequence.
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
As we dropped the requirement of "syscon" compatible in the chipid
nodes rework code acquiring the regmap to use device_node_to_regmap()
rather than syscon_node_to_regmap().
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
