This reverts commit 7c1abbfe2a.
Will fixes by aosp commit "mmc: block: fix ABI regression of mmc_blk_ioctl"
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Modify the 594MHz parameter for higher VCO freq to reduce the jitter.
Change-Id: I78784210b69d6895758192c84724b982fcc9e72d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Add binding documentation for the power domains
found on Rockchip RK3399 SoCs
Change-Id: I51d70a08c86b5361ac5d51151711e07ffa3046ef
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.7-armsoc/drivers commit e6e270aecb)
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.
Change-Id: Ie2a79aab6e1e073157c06d44252ef327caee5261
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[restructured error handling in subdomain-addition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.7-armsoc/drivers commit 6be05b5ec1)
On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a (shared) parent-
domain.
So allow such types of domains. For them, we can determine their
state (on/off) by checking the inverse idle-state instead.
There exist one special case if both idle as well power handling
were set as not present, but as the domain-data is defined in the
code itself, we can expect the reasonable developer to define them
in a correct way, without adding more checks.
Change-Id: Ic82cb387565a39043d5d52e62a94910de10d4bbd
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.7-armsoc/drivers commit 1fe767a56c)
Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.
Change-Id: I46d869e1de9e03ec0664518effbcf2642053391e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.7-armsoc/drivers commit 6aa841c809)
selecting utmi interface signals from utmi interface of usb20
host0 controller to usb2phy, when phy is resumed.
Change-Id: I487e836b89177cd8bc2dc56400f4dc277c8d2bf0
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
We don't need to reference the pmugrf/grf in the clock driver any more.
Change-Id: Ibda203163c84ab4004e1225e5868267024069199
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
These are not gating default when the SoC startup, so we don't need
to re-enable them.
Change-Id: I956a31345fe7f24b973db6c9e49d87a2988ac7d6
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
A virtual device like "drm" call iommu_attach_device may fail.
Current only judge if a device has "group", this is not enough,
"group->iommu_data" is needed
Change-Id: I1a66d6016dfef867d83aa4cccaf223ced4e07161
Signed-off-by: Simon <xxm@rock-chips.com>
As the rk3399 SoCs requires initial configuration for tsadc clock
frequency. The tsadc can be specified in a device tree node through
assigned-clocks.
The tsadc clock needs 500KHz~800KHz frequency to work on rk3399 SoCs.
We can add the assigned-clock to prevent the firmware
or loader has *not* set the division frequency from the source clock.
Change-Id: Ieb4cd5aad7d299baab20a9fb9d39211fe00896ff
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This patch adds the rockchip,grf to match the driver.
Change-Id: If477634fd38f1ebc539ade6c620a63d0cfee9111
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This adds the grf property to handle the tsadc power sequence on
rk3399 SoCs.
The rk3399 tsadc can work with this patch on now.
while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp;sleep .5; done
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41666
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
Change-Id: I0155826bddf0017ea4985920268b333a20278bbe
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
there is a time window between __mmc_send_status() and time_afer(),
on some eMMC chip, the timeout_ms is only 10ms, if this thread was
scheduled out during this period, then, even card has already changes
to transfer state by the result of CMD13, this part of code also treat
it to timeout error.
So, need calculate timeout first, then call __mmc_send_status(), if
already timeout and card still in programing state, then treat it to
the real timeout error.
Change-Id: I7499d3d41711ea5abe6baec780d2988dc60dfc5b
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 3bbb0deea6)
Normally the timeout clock frequency is read from the capabilities
register. It is also possible to set the value prior to calling
sdhci_add_host() in which case that value will override the
capabilities register value. However that was being done after
calculating max_busy_timeout so that max_busy_timeout was being
calculated using the wrong value of timeout_clk.
Fix that by moving the override before max_busy_timeout is
calculated.
The result is that the max_busy_timeout and max_discard
increase for BSW devices so that, for example, the time for
mkfs.ext4 on a 64GB eMMC drops from about 1 minute 40 seconds
to about 20 seconds.
Note, in the future, the capabilities setting will be tidied up
and this override won't be used anymore. However this fix is
needed for stable.
Change-Id: Ifd327b7c534a346f3537432d7bce7d8f1aebef3f
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org # v3.18+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 9951362479)
This patch fixes the incorrect conversion table.
The Code to Temperature mapping is updated based on sillcon results.
Change-Id: If8ae3f5fb59786a8db8bf79276ecea44ab92ffc9
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Set dwc3_0 in peripheral only mode until Type-C function is
ready, and then we can set dwc3_0 in drd mode.
Change-Id: I0ccb92db97244d7a34dd17c58757fc5aa1b11dac
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
This reverts commit 0b622df349.
arm pmu driver do not support PPI in two
cluster well. So drop it.
Change-Id: I69f43ad1703589805c7e86749badda8bf802d51a
When rk_iommu_attach_device or rk_iommu_detach_device be called, the second
parameter "dev" represent the device who own the iommu, so it is not resonable
using "dev" for devm_request_irq's first parameter. To avoid potential error,
we must use iommu device itself "iommu->dev" instead, the same as devm_free_irq.
Change-Id: Id9f4097d6f1b916308475854dcf75ce86d9494fc
Signed-off-by: Simon <xxm@rock-chips.com>
