The gt9xx touchscreen should be used by rk3399 evb board.
The rk3399-monkey.dtsi and rk3399-chrome.dtsi just run the different OS.
So... we should move the touchscreen node into the rk3399-tb.dtsi.
Change-Id: Ida8203e045e0fc0eb49e8a37e4ad609c230e040f
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
The gru/kevin board works the iodomain with gpio regulator.
That's useful for rk3399 kevin/gru board.
Change-Id: I70b6185e3a21a038347b9f8ccd679908817184dd
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Technically emerging the kernel with USE=kgdb is supposed to get most of
this. ...and the kernel command line is supposed to come from
elsewhere. Until we get that happier, maybe this CL is useful.
Change-Id: Idd0100b623eb88b4a4a26922754b71f5cbcd602a
Signed-off-by: Douglas Anderson <dianders@chromium.org>
It's useful. Might be something we can leave on even in a real kernel.
We'll have to see. We have common clock debugging...
Change-Id: I3c1cb55b067a4c54bb425d23664c5f1474016c92
Signed-off-by: Douglas Anderson <dianders@chromium.org>
This initial patch adds to support the gru/kevin board for rk3399 SoCs.
It builds at least:
make -j32 ARCH=arm64 CROSS_COMPILE=aarch64-cros-linux-gnu- dtbs
Change-Id: I7f3841513da130c107aca0d6b393b2bf269a5396
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This patch like below:
----
commit 3860aa1ccf
Author: Heiko Stuebner <heiko@sntech.de>
Date: Sat Jan 9 03:18:51 2016 +0100
ARM: dts: rockchip: swap i2s clock ordering on rk3036
For sound setups using the simple-card mechanism, the main clock
(sysclk) is expected to be the first element. For the i2s-driver
itself it doesn't matter, as it uses named clocks, so we can just
swap them.
----
If we set HCLK_I2Sx at first, rockchip_i2s_set_sysclk will set the
HCLK_I2S freq (from example is 100MHz) to set the i2s_div, it is
incorrect.
Change-Id: Iab69d541c47d1293a784ebffc23f6c1ceaf9c0b1
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This patch like below:
----
commit 3860aa1ccf
Author: Heiko Stuebner <heiko@sntech.de>
Date: Sat Jan 9 03:18:51 2016 +0100
ARM: dts: rockchip: swap i2s clock ordering on rk3036
For sound setups using the simple-card mechanism, the main clock
(sysclk) is expected to be the first element. For the i2s-driver
itself it doesn't matter, as it uses named clocks, so we can just
swap them.
----
If we set HCLK_I2Sx at first, rockchip_i2s_set_sysclk will set the
HCLK_I2S freq (from example is 100MHz) to set the i2s_div, it is
incorrect.
Change-Id: I2b424ded3845b8ccd3ef233e43c5f9f915544547
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Add vpu and rkvdec resource node to enable video codec
supporting for rk3399 android.
Change-Id: I1689955858355b6061957dc43eea17f9b8d71096
Signed-off-by: alpha.lin <alpha.lin@rock-chips.com>
We don't need to reference the pmugrf/grf in the clock driver any more.
Change-Id: Ibda203163c84ab4004e1225e5868267024069199
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
As the rk3399 SoCs requires initial configuration for tsadc clock
frequency. The tsadc can be specified in a device tree node through
assigned-clocks.
The tsadc clock needs 500KHz~800KHz frequency to work on rk3399 SoCs.
We can add the assigned-clock to prevent the firmware
or loader has *not* set the division frequency from the source clock.
Change-Id: Ieb4cd5aad7d299baab20a9fb9d39211fe00896ff
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This patch adds the rockchip,grf to match the driver.
Change-Id: If477634fd38f1ebc539ade6c620a63d0cfee9111
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Set dwc3_0 in peripheral only mode until Type-C function is
ready, and then we can set dwc3_0 in drd mode.
Change-Id: I0ccb92db97244d7a34dd17c58757fc5aa1b11dac
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
This reverts commit 0b622df349.
arm pmu driver do not support PPI in two
cluster well. So drop it.
Change-Id: I69f43ad1703589805c7e86749badda8bf802d51a
RK3399 dwc3 has some hardware properties, which is platform
dependent, including the following properties:
1. Set PHYIF to 1 to use 16-bit UTMI+ interface;
2. Clear ENBLSLPM to 0 to disable sleep and l1 suspend;
3. Clear U2_FREECLK_EXITSTS to 0;
4. Clear DEV_FORCE_20_CLK_FOR_30_CLK to 0;
5. Clear DELAYP1TRANS to 0;
Change-Id: I85de326e3c2177c66966f1239bcab838df01492d
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
In order to lower the temperature, lower the voltage.
Change-Id: Iae2d103c88ab5b72c3d003c1f84f74e1694c7e1e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
* linux-linaro-lsk-v4.4-android: (477 commits)
arm64: vdso: Mark vDSO code as read-only
ARM/vdso: Mark the vDSO code read-only after init
x86/vdso: Mark the vDSO code read-only after init
lkdtm: Verify that '__ro_after_init' works correctly
arch: Introduce post-init read-only memory
x86/mm: Always enable CONFIG_DEBUG_RODATA and remove the Kconfig option
mm/init: Add 'rodata=off' boot cmdline parameter to disable read-only kernel mappings
asm-generic: Consolidate mark_rodata_ro()
Linux 4.4.6
ld-version: Fix awk regex compile failure
target: Drop incorrect ABORT_TASK put for completed commands
block: don't optimize for non-cloned bio in bio_get_last_bvec()
MIPS: smp.c: Fix uninitialised temp_foreign_map
MIPS: Fix build error when SMP is used without GIC
ovl: fix getcwd() failure after unsuccessful rmdir
ovl: copy new uid/gid into overlayfs runtime inode
userfaultfd: don't block on the last VM updates at exit time
powerpc/powernv: Fix OPAL_CONSOLE_FLUSH prototype and usages
powerpc/powernv: Add a kmsg_dumper that flushes console output on panic
powerpc: Fix dedotify for binutils >= 2.26
...
set clk_cpul:816M clk_cpub:1008M when clk tree init
Change-Id: I8f493ce8479fc670aa05d651db5be354d6870c98
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
With this defconfig which inherits from rockchip_defconfig,
ChromeOS boots up to command line.
Change-Id: I646fea9b26d9c235da16d0d2b559290ee5029a12
Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
