RK3399 and RK3288 shared the same eDP IP controller, so this time we
just need to append the RK3399 compatible name to analogix_dp documentation
and driver code.
Change-Id: I3fee6893c56698ee2948b9df2f3ffb7729fe75ef
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Add binding documentation for the power domains
found on Rockchip RK3399 SoCs
Change-Id: I51d70a08c86b5361ac5d51151711e07ffa3046ef
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.7-armsoc/drivers commit e6e270aecb)
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether delay PHY power change from P0
to P1/P2/P3 when link state changing from U0 to U1/U2/U3
respectively.
Change-Id: I23e33f8b13001d6f86d6473ad43a261d9bda8f79
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Add snps,phyif_utmi_16_bits devicetree property. USB2 phy
interface is hardware property, and it's platform dependent,
so we need to configure it in devicetree to set the core to
support a UTMI+ PHY with an 8- or 16-bit interface.
And according to dwc3 databook, the GUSB2PHYCFG.USBTRDTIM
must set to the required values for the usb2 phy interface.
Change-Id: If1c636edc6be3c9a79b4b0b89737a925d8dd3abe
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.
Change-Id: I84ea6eeccb9fc2ea6d13ef586f1166d5fa132606
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
* linux-linaro-lsk-v4.4-android: (477 commits)
arm64: vdso: Mark vDSO code as read-only
ARM/vdso: Mark the vDSO code read-only after init
x86/vdso: Mark the vDSO code read-only after init
lkdtm: Verify that '__ro_after_init' works correctly
arch: Introduce post-init read-only memory
x86/mm: Always enable CONFIG_DEBUG_RODATA and remove the Kconfig option
mm/init: Add 'rodata=off' boot cmdline parameter to disable read-only kernel mappings
asm-generic: Consolidate mark_rodata_ro()
Linux 4.4.6
ld-version: Fix awk regex compile failure
target: Drop incorrect ABORT_TASK put for completed commands
block: don't optimize for non-cloned bio in bio_get_last_bvec()
MIPS: smp.c: Fix uninitialised temp_foreign_map
MIPS: Fix build error when SMP is used without GIC
ovl: fix getcwd() failure after unsuccessful rmdir
ovl: copy new uid/gid into overlayfs runtime inode
userfaultfd: don't block on the last VM updates at exit time
powerpc/powernv: Fix OPAL_CONSOLE_FLUSH prototype and usages
powerpc/powernv: Add a kmsg_dumper that flushes console output on panic
powerpc: Fix dedotify for binutils >= 2.26
...
1. Compatible "rockchip,rk3399-usb-phy" support to RK3399;
2. Add host_drv_gpio optional property for usb2.0 vbus control.
Change-Id: Idfc6898ca2c519c46dae66d396f501b38e8d73bd
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Rockchip USB3.0 core wrapper consist of USB3.0 IP from Synopsys
(SNPS) and HS, SS PHY's control and configuration registers.
Change-Id: I116b66c3b417cfecc968414db9912813a0ef2c5d
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.
(am from https://patchwork.kernel.org/patch/8313081/)
Change-Id: If99d29936aafd996c98568d6e184aee6d9c8bc47
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Rockchip DP driver is a helper driver of analogix_dp coder driver,
so most of the DT property should be descriped in analogix_dp document.
(am from https://patchwork.kernel.org/patch/8312841/)
Change-Id: If7a422554ac09cd3ed40eac8191369df532c58bf
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
(am from https://patchwork.kernel.org/patch/8312811/)
Change-Id: Ia1d47783b735868a4f56231660d8309cf9c75923
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
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Merge tag 'v4.4.5' into linux-linaro-lsk-v4.4
This is the 4.4.5 stable release
# gpg: Signature made Wed 09 Mar 2016 23:36:03 GMT using RSA key ID 6092693E
# gpg: Good signature from "Greg Kroah-Hartman (Linux kernel stable release signing key) <greg@kroah.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 647F 2865 4894 E3BD 4571 99BE 38DB BDC8 6092 693E
- new method to caculate i2c timings for rk3399:
There was an timing issue about "repeated start" time at the I2C
controller of version0, controller appears to drop SDA at .875x (7/8)
programmed clk high. On version 1 of the controller, the rule(.875x)
isn't enough to meet tSU;STA
requirements on 100k's Standard-mode. To resolve this issue,
sda_update_config, start_setup_config and stop_setup_config for I2C
timing information are added, new rules are designed to calculate
the timing information at new v1.
- pclk and function clk are separated at rk3399.
- support i2c highspeed mode: 1.7MHz for rk3399
Change-Id: I413455cf94fe7486c40694059e2f0931433992bb
Signed-off-by: David Wu <david.wu@rock-chips.com>
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Change-Id: Ie6774d527475889a6eab587e66eda607d1ea2c8b
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
(cherry picked from commit a20d86e7f9)
The BOE TV080WUM-NL0 is an 8.0", 1200x1920 (WUXGA) TFT-LCD panel
connected using four DSI lanes.
Change-Id: I963cf860315f86ca64249c8f2064acbba62276b5
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit 86b81f3e17)
BOE Technology Group Co., Ltd. is a supplier of semiconductor display
technologies, products and services.
Change-Id: Id9a81512f6174770fc1d1282579da902fcdc89b0
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
[treding@nvidia.com: add commit message, fixup subject]
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit 27d23b30a5)
commit d2aa1acad2 upstream.
It may be useful to debug writes to the readonly sections of memory,
so provide a cmdline "rodata=off" to allow for this. This can be
expanded in the future to support "log" and "write" modes, but that
will need to be architecture-specific.
This also makes KDB software breakpoints more usable, as read-only
mappings can now be disabled on any kernel.
Suggested-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: David Brown <david.brown@linaro.org>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Emese Revfy <re.emese@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mathias Krause <minipli@googlemail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: PaX Team <pageexec@freemail.hu>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kernel-hardening@lists.openwall.com
Cc: linux-arch <linux-arch@vger.kernel.org>
Link: http://lkml.kernel.org/r/1455748879-21872-3-git-send-email-keescook@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: David Brown <david.brown@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
commit 844a5fe219 upstream.
Yes, all of these are needed. :) This is admittedly a bit odd, but
kvm-unit-tests access.flat tests this if you run it with "-cpu host"
and of course ept=0.
KVM runs the guest with CR0.WP=1, so it must handle supervisor writes
specially when pte.u=1/pte.w=0/CR0.WP=0. Such writes cause a fault
when U=1 and W=0 in the SPTE, but they must succeed because CR0.WP=0.
When KVM gets the fault, it sets U=0 and W=1 in the shadow PTE and
restarts execution. This will still cause a user write to fault, while
supervisor writes will succeed. User reads will fault spuriously now,
and KVM will then flip U and W again in the SPTE (U=1, W=0). User reads
will be enabled and supervisor writes disabled, going back to the
originary situation where supervisor writes fault spuriously.
When SMEP is in effect, however, U=0 will enable kernel execution of
this page. To avoid this, KVM also sets NX=1 in the shadow PTE together
with U=0. If the guest has not enabled NX, the result is a continuous
stream of page faults due to the NX bit being reserved.
The fix is to force EFER.NX=1 even if the CPU is taking care of the EFER
switch. (All machines with SMEP have the CPU_LOAD_IA32_EFER vm-entry
control, so they do not use user-return notifiers for EFER---if they did,
EFER.NX would be forced to the same value as the host).
There is another bug in the reserved bit check, which I've split to a
separate patch for easier application to stable kernels.
Cc: Andy Lutomirski <luto@amacapital.net>
Reviewed-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Fixes: f6577a5fa1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 2e18f5a1bc upstream.
Introduce a dt property, ti,no-idle, that prevents an IP to idle at any
point. This is to handle Errata i877, which tells that GMAC clocks
cannot be disabled.
Acked-by: Roger Quadros <rogerq@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch rename "reg" property to "reg_offset".
We rename it to fix the compile issue on ARM64 platform:
(reg_format): "reg" property in /phy has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 2)
This's because "reg" is very special one which should keep the
*-cells with its parent node and can't be overwrited even if we
do that explicitly. On 32-bit plafform, the default *-cells
fit for what we assign to "reg". But that's not correct for 64-bit
platform. So we can see two possible solutions to fix this problem:
A) make phy-rockchip-emmc as a child phy node and overwrite its
parent's #address-cells and #size-cells.
B) avoid using this special property.
we use it just for passing on a offset for different Socs, and there's
no requirement to change the code to make phy-rockchip-emmc as a child
node. so choose option B) is sane.
Change-Id: Ib6a10cb8c3629ec3983854f1bfb7c2426edf79d2
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Compatible "rockchip,rk336x-usb-phy" support to RK3368 & RK3366.
Change-Id: I435ecd0a9f1c2a50836f7e3c44b6089ba49d728a
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Add devicetree bindings for Rockchip rk3399 spi which found on
Rockchip rk3399 SoCs.
Change-Id: Ib43ec4ce8970359f660311fce35017843f8998df
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/spi.git for-next
commit 9b7a562215)
this patch add compatible for rk3366/rk3368/rk3399 spdif,
these three spdifs share the same type.
Change-Id: Iac533f3481962556e3ca2b0c4b685b64aec6786a
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
add device tree bindings document for reboot-mode driver
Change-Id: I280e24e8c09e688e4f6dc51b7a1a658347f05db5
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This patch adds phys and phy-names for sdhci-of-arasan as required
properties for arasan,sdhci-5.1, and details the example as well.
Change-Id: Ia3fc9c6284fc6f557b90fa880c9f2e8d01a4d3c2
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk3399 platform.
Change-Id: Ieefafab5f0e9650271e823659e2bec1556c4a9bc
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
commit ed8b0de5a3 upstream.
"rm -rf" is bricking some peoples' laptops because of variables being
used to store non-reinitializable firmware driver data that's required
to POST the hardware.
These are 100% bugs, and they need to be fixed, but in the mean time it
shouldn't be easy to *accidentally* brick machines.
We have to have delete working, and picking which variables do and don't
work for deletion is quite intractable, so instead make everything
immutable by default (except for a whitelist), and make tools that
aren't quite so broad-spectrum unset the immutable flag.
Signed-off-by: Peter Jones <pjones@redhat.com>
Tested-by: Lee, Chun-Yi <jlee@suse.com>
Acked-by: Matthew Garrett <mjg59@coreos.com>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The drive strength control of rk3366 is very different from others'.
RK3366 soc adds N and P channel drive strength control, and we assume
they are the same value.
Change-Id: I45896f1483cb0a7550789df3bf84a0460cb21527
Signed-off-by: David Wu <david.wu@rock-chips.com>
This patch adds a binding that describes the Rockchip eMMC PHYs
found on Rockchip SoCs eMMC interface.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from git.kernel.org kishon/linux-phy next
commit c9a1ddcac5b95a9dbf3d3f71d3be8b157239cce5)
Change-Id: I6913babddbc70c1ad3ea2234d8afac79190852a4
The USB phys on Rockchip SoCs contain their own internal PLLs to create
the 480MHz needed. Additionally this PLL output is also fed back into the
core clock-controller as possible source for clocks like the GPU or others.
Until now this was modelled incorrectly with a "virtual" factor clock in
the clock controller. The one big caveat is that if we turn off the usb phy
via the siddq signal, all analog components get turned off, including the
PLLs. It is therefore possible that a source clock gets disabled without
the clock driver ever knowing, possibly making the system hang.
Therefore register the phy-plls as real clocks that the clock driver can
then reference again normally, making the clock hirarchy finally reflect
the actual hardware.
The phy-ops get converted to simply turning that new clock on and off
which in turn controls the siddq signal of the phy.
Through this the driver gains handling for platform-specific data, to
handle the phy->clock name association.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit b74fe7c761)
Change-Id: Ie05464a9523af86b602d4801cb9b842f65d08670
We need custom handling for these two socs in the driver shortly,
so add the necessary compatible values to binding and driver.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit c2bfc3b888)
Change-Id: I63cf61e12b1f3bb56856accc38949c6cd8c0ce8e
Modify binding documentation for the power domains
found on Rockchip RK3366 SoCs.
Change-Id: Ib9cd07971303b1205f501a06430811e877870212
Signed-off-by: Xiao Feng <xf@rock-chips.com>
enable/disable master clock when codec is active or not.
Change-Id: Ia876abde08138c4f23ed5a1a684f6637c42d5e34
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
