Commit Graph

4 Commits

Author SHA1 Message Date
Wolfram Sang
8a19c5aa2f mailbox: exynos: drop superfluous mbox setting per channel
The core initializes the 'mbox' field exactly like this, so don't
duplicate it in the driver.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Tested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2026-03-29 10:56:12 -05:00
André Draszik
6b0eadf69b mailbox: exynos: drop unneeded runtime pointer (pclk)
pclk is not needed past probe(), just drop it. This saves a little bit
of runtime memory.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2026-01-24 18:42:39 -06:00
Chen Ni
1ec12fd31e mailbox: Remove unneeded semicolon
Remove unnecessary semicolons reported by Coccinelle/coccicheck and the
semantic patch at scripts/coccinelle/misc/semicolon.cocci.

Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-03-26 20:58:26 -05:00
Tudor Ambarus
fbf7e5ce40 mailbox: add Samsung Exynos driver
The Samsung Exynos mailbox controller, used on Google GS101 SoC, has 16
flag bits for hardware interrupt generation and a shared register for
passing mailbox messages. When the controller is used by the
ACPM interface the shared register is ignored and the mailbox controller
acts as a doorbell. The controller just raises the interrupt to APM
after the ACPM interface has written the message to SRAM.

Add support for the Samsung Exynos mailbox controller.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-01-18 16:18:48 -06:00