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209 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Arnd Bergmann
|
a66cc657ef |
Qualcomm driver updates for v7.1
Add ECS LIVA QC710, Glymur CRD, Mahua CRD, Purwa IoT EVK, and Asus Vivobook to the QSEECOM allow-list, to enable UEFI variable access through uefisecapp. Register the Gunyah watchdog device if the SCM driver finds itself running under Gunyah. Clean up some locking using guards. Handle possible cases where AOSS cooling state is given a non-boolean state. Replace LLCC per-slice activation bitmap with reference counting. Also add SDM670 support. Improve probe deferral handling in the OCMEM driver. Add Milos, QCS615, Eliza, Glymur, and Mahua support to the pd-mapper. Add support for SoCCP-based pmic-glink, as found in Glymur and Kaanapali. Add common QMI service ids to the main qmi headerfile, to avoid spreading these constants in various drivers. Add support for version 2 of SMP2P and implement the irqchip state reading support. Add CQ7790, SA8650P, SM7450, SM7450P, and IPQ5210 SoC and the PM7550BA PMIC identifiers to the socinfo driver. Add Eliza and Mahua support to the UBWC driver, introduce helpers for drivers to read out min_acc length and other programmable values, and disable bank swizzling for Glymur. Simplify the logic related to allocation of NV download request in the WCNSS control driver. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmnMQNQACgkQCx85Pw2Z rcWpmA//QDo8m9t4GgAdqJLSyH40Hcw0Uotv4DhzquUe1hYXTQb4NwNoJ+JZVPvO 70BDuJTOQcnQCKeagW1Zq5ycJtA11khRL9ZWwzJB3fq3UTHI+n0EfHDmshAxz37Y h8x71dWKcI3NnEHWBFglRyYbv/eKFxcc2CFP0HrAB3UOxPClqsOVB5iNNM/JA3Jp eppYK6473VAF89q+q7+F3kEhz2p4sgyI9G2Sm/vFqXV3CLY0WV98FjQAHi1nXuNV pCz4oPkccBAcu7FQffMIydbtoIBPZDoI7pueJ4GlgewkkunuiJew/Rq0GEKnyzsN SqzfnBnbfsbQPOtZTBNY6tDgnSMQV2fMtgyBqkmgnSCs6A1AU6XVPFq4wWDpr6t/ +y9QpA/Jfb1txeHp7xY/9bOAl2/vorZDLp9O8CR828z6Ptg/CGO8Gws/X0g4QWvZ 6+UjRHTB5BnJENjzJGoxhrO59gyASUExoM02b6pQmz4ayw9q1PHGMVdSAPCygrDH r9+yMcTO8kfUAYtliJrygDTDlhwxMDfd2z82BOZGpSbAbR8zfFKKJmIaSQGNHCjl u3G9Kb5L7QlAVBGVcRYaArp1MQWD6oP+IU1W9YMra5cySwt/nXtSsQZRdhoP5Qp6 YO8YMdldkf37DNar/+wrN012yaYSWj/k9x/f0phAn106oq1o8+0= =1zur -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmnO3XkACgkQmmx57+YA GNlXDRAAkXYODhxU+T1AyT5OgDBzKgfVBte2vne+NOuirAX6+4U6v+0lCVx+fs4z kTfeveRoXtWlSSF3Vyv+rw1fZvpUOwZ9Y+u405fgveAxtDUkjzJGsnlrfMGIWD4a Q99WFz9L+kTcaf03uNLhrg9UAx0SpkfQQm2riY+ueHVY/0dOTsNzjv71A9sJrmvq oSEH3xquCOgd8diR3evE+2KhD4yQkzMmVeBuujDhWwIJmY8aSpZFIJIXYL5sRo+V l1bd5EwPH2Ku0bXaKh5mLDS/MvdKk7EPKru7ST0+IVfBXBnZf6KefAqljCvVuR66 RRNDN2kcWU+aoih2vuVI+y3w1XGMX9AbFlviaGZWCY1mL2FTFvWfrQ4vLTz2bRlB 8gFPmxMtVZQxu5hBOxAprnYrValRddYamh8cPQcpu9BGIG/ZIqx8cSOXZsQTiARk 9DPRBQsQmaGXXl1YxbcYibQn1TL3ozmqQn0dhZ2Ojkxv0cyD3ymvdv68QKXPf7dm j2LU6BgNiK5IGZ2VUk5mk3hp5Kc+6qpmMqg7l/HIf1zUULCCFWu6l/IobuaX7ynj b5EU0feXMCJ9B17G1lgdFsZ0oI3RhkROjCi2huklNh1fA/xThwTsZsZQ9NmEKQHw TDCcavPXh64fSVtv4qePd9HV+KcHeBeA18m+6njdqByT36qMeC0= =nCjL -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v7.1 Add ECS LIVA QC710, Glymur CRD, Mahua CRD, Purwa IoT EVK, and Asus Vivobook to the QSEECOM allow-list, to enable UEFI variable access through uefisecapp. Register the Gunyah watchdog device if the SCM driver finds itself running under Gunyah. Clean up some locking using guards. Handle possible cases where AOSS cooling state is given a non-boolean state. Replace LLCC per-slice activation bitmap with reference counting. Also add SDM670 support. Improve probe deferral handling in the OCMEM driver. Add Milos, QCS615, Eliza, Glymur, and Mahua support to the pd-mapper. Add support for SoCCP-based pmic-glink, as found in Glymur and Kaanapali. Add common QMI service ids to the main qmi headerfile, to avoid spreading these constants in various drivers. Add support for version 2 of SMP2P and implement the irqchip state reading support. Add CQ7790, SA8650P, SM7450, SM7450P, and IPQ5210 SoC and the PM7550BA PMIC identifiers to the socinfo driver. Add Eliza and Mahua support to the UBWC driver, introduce helpers for drivers to read out min_acc length and other programmable values, and disable bank swizzling for Glymur. Simplify the logic related to allocation of NV download request in the WCNSS control driver. * tag 'qcom-drivers-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits) soc: qcom: ubwc: add helpers to get programmable values soc: qcom: ubwc: add helper to get min_acc length firmware: qcom: scm: Register gunyah watchdog device soc: qcom: socinfo: Add SoC ID for SA8650P dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P firmware: qcom: scm: Allow QSEECOM on Mahua CRD soc: qcom: wcnss: simplify allocation of req soc: qcom: pd-mapper: Add support for Eliza soc: qcom: aoss: compare against normalized cooling state soc: qcom: llcc: fix v1 SB syndrome register offset dt-bindings: firmware: qcom,scm: Document ipq9650 SCM soc: qcom: ubwc: Add support for Mahua soc: qcom: pd-mapper: Add support for Glymur and Mahua soc: qcom: ubwc: Add configuration Eliza SoC soc: qcom: ubwc: Remove redundant x1e80100_data dt-bindings: firmware: qcom,scm: document Eliza SCM Firmware Interface soc: qcom: ocmem: return -EPROBE_DEFER is ocmem is not available soc: qcom: ocmem: register reasons for probe deferrals soc: qcom: ocmem: make the core clock optional soc: qcom: ubwc: disable bank swizzling for Glymur platform ... Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
720d813b53 |
Arm SCMI updates for v7.1
This batch mainly improves SCMI robustness on systems where the SCP does
not generate completion interrupts, and includes two small follow-up
cleanups in the SCMI core.
The main functional change adds support for the new DT property
'arm,no-completion-irq'. When present for mailbox/shared-memory based
SCMI implementations, the driver forces SCMI operations into polling
mode so affected platforms can continue to operate even with broken
firmware interrupt behavior.
In addition, it
- replaces open-coded size rounding in the base protocol path with
round_up() for clarity, with no functional change
- updates the SCMI quirk snippet macro implementation so quirk handlers
can use break and continue directly when invoked inside loop contexts
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Merge tag 'scmi-updates-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates for v7.1
This batch mainly improves SCMI robustness on systems where the SCP does
not generate completion interrupts, and includes two small follow-up
cleanups in the SCMI core.
The main functional change adds support for the new DT property
'arm,no-completion-irq'. When present for mailbox/shared-memory based
SCMI implementations, the driver forces SCMI operations into polling
mode so affected platforms can continue to operate even with broken
firmware interrupt behavior.
In addition, it
- replaces open-coded size rounding in the base protocol path with
round_up() for clarity, with no functional change
- updates the SCMI quirk snippet macro implementation so quirk handlers
can use break and continue directly when invoked inside loop contexts
* tag 'scmi-updates-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: Support loop control in quirk code snippets
firmware: arm_scmi: Use round_up() for base protocol list size calculation
firmware: arm_scmi: Implement arm,no-completion-irq property
dt-bindings: firmware: arm,scmi: Document arm,no-completion-irq property
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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Kathiravan Thirumoorthy
|
dc67808832 |
dt-bindings: firmware: qcom,scm: Document ipq9650 SCM
Document the scm compatible for ipq9650 SoC. Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-ipq9650_scm-v1-1-ad6a3fe53f38@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Abel Vesa
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b4d4a4f6e2 |
dt-bindings: firmware: qcom,scm: document Eliza SCM Firmware Interface
Document the SCM Firmware Interface on the Eliza SoC. Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260311-eliza-bindings-scm-v2-1-b2d2e69068e3@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Kathiravan Thirumoorthy
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e3f45d3266 |
dt-bindings: firmware: qcom,scm: Document ipq5210 SCM
Document the scm compatible for ipq5210 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260318-ipq5210_boot_to_shell-v2-4-a87e27c37070@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Marek Vasut
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0c5453bf84 |
dt-bindings: firmware: arm,scmi: Document arm,no-completion-irq property
Document new property arm,no-completion-irq . This optional property is intended for hardware that does not generate completion interrupts and can be used to unconditionally enable forced polling mode of operation. With this property set, such implementations which do not generate interrupts can be interacted with, until they are fixed to generate interrupts properly. Note that, because the original base protocol exchange also requires some sort of completion mechanism, it is not possible to query SCMI itself for this property and it must be described in DT. While this does look a bit like policy, the SCMI provider is part of the hardware, hence DT. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Message-Id: <20260117010241.186685-1-marek.vasut+renesas@mailbox.org> Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org> |
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André Draszik
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f2e83070fe |
dt-bindings: firmware: google,gs101-acpm-ipc: add S2MPG11 secondary PMIC
In a typical system using the Samsung S2MPG10 PMIC, an S2MPG11 is used as a sub-PMIC. The interface for both is the ACPM firmware protocol, so update the binding to allow the relevant node and update the example here to describe the connection for both PMICs. Since we have two PMICs here, but can not use the 'reg' property (as the addressing is based on software, i.e. the ACPM firmware), the node names reflect that with their respective suffix. The existing 'pmic' therefore becomes deprecated in favour of 'pmic-1'. While at it, update the example. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260210-s2mpg1x-regulators-v8-1-c429d709c0e0@linaro.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> |
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Linus Torvalds
|
098b6e44cb |
Devicetree updates for v7.0:
DT core:
- Sync dtc/libfdt with upstream v1.7.2-62-ga26ef6400bd8
- Add a for_each_compatible_node_scoped() loop and convert users in
cpufreq, dmaengine, clk, cdx, powerpc and Arm
- Simplify of/platform.c with scoped loop helpers
- Add fw_devlink tracking for "mmc-pwrseq"
- Optimize fw_devlink callback code size for pinctrl-N properties
- Replace strcmp_suffix() with strends()
DT bindings:
- Support building single binding targets
- Convert google,goldfish-fb, cznic,turris-mox-rwtm, ti,prm-inst
- Add bindings for Freescale AVIC, Realtek RTD1xxx system controllers,
Microchip 25AA010A EEPROM, OnSemi FIN3385, IEI WT61P803 PUZZLE, Delta
Electronics DPS-800-AB power supply, Infineon IR35221 Digital
Multi-phase Controller, Infineon PXE1610 Digital Dual Output 6+1
VR12.5 & VR13 CPU Controller, socionext,uniphier-smpctrl, and
xlnx,zynqmp-firmware
- Lots of trivial binding fixes to address warnings in DTS files. These
are mostly for arm64 platforms which is getting closer to be warning
free. Some public shaming has helped.
- Fix I2C bus node names in examples
- Drop obsolete brcm,vulcan-soc binding
- Drop unreferenced binding headers
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Merge tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Sync dtc/libfdt with upstream v1.7.2-62-ga26ef6400bd8
- Add a for_each_compatible_node_scoped() loop and convert users in
cpufreq, dmaengine, clk, cdx, powerpc and Arm
- Simplify of/platform.c with scoped loop helpers
- Add fw_devlink tracking for "mmc-pwrseq"
- Optimize fw_devlink callback code size for pinctrl-N properties
- Replace strcmp_suffix() with strends()
DT bindings:
- Support building single binding targets
- Convert google,goldfish-fb, cznic,turris-mox-rwtm, ti,prm-inst
- Add bindings for Freescale AVIC, Realtek RTD1xxx system
controllers, Microchip 25AA010A EEPROM, OnSemi FIN3385, IEI
WT61P803 PUZZLE, Delta Electronics DPS-800-AB power supply,
Infineon IR35221 Digital Multi-phase Controller, Infineon PXE1610
Digital Dual Output 6+1 VR12.5 & VR13 CPU Controller,
socionext,uniphier-smpctrl, and xlnx,zynqmp-firmware
- Lots of trivial binding fixes to address warnings in DTS files.
These are mostly for arm64 platforms which is getting closer to be
warning free. Some public shaming has helped.
- Fix I2C bus node names in examples
- Drop obsolete brcm,vulcan-soc binding
- Drop unreferenced binding headers"
* tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (60 commits)
dt-bindings: interrupt-controller: Add compatiblie string fsl,imx(1|25|27|31|35)-avic
dt-bindings: soc: imx: add fsl,aips and fsl,emi compatible strings
dt-bindings: display: bridge: lt8912b: Drop reset gpio requirement
dt-bindings: firmware: fsl,scu: Mark multi-channel MU layouts as deprecated
cpufreq: s5pv210: Simplify with scoped for each OF child loop
dmaengine: fsl_raid: Simplify with scoped for each OF child loop
clk: imx: imx31: Simplify with scoped for each OF child loop
clk: imx: imx27: Simplify with scoped for each OF child loop
cdx: Use mutex guard to simplify error handling
cdx: Simplify with scoped for each OF child loop
powerpc/wii: Simplify with scoped for each OF child loop
powerpc/fsp2: Simplify with scoped for each OF child loop
ARM: exynos: Simplify with scoped for each OF child loop
ARM: at91: Simplify with scoped for each OF child loop
of: Add for_each_compatible_node_scoped() helper
dt-bindings: Fix emails with spaces or missing brackets
scripts/dtc: Update to upstream version v1.7.2-62-ga26ef6400bd8
dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs
dt-bindings: crypto: inside-secure,safexcel: Add SoC compatibles
of: reserved_mem: Fix placement of __free() annotation
...
|
||
|
Linus Torvalds
|
f6c42489fe |
regulator: Updates for v7.0
There's a bunch of new drivers here, plus a lot of hardening for the
supply resolution code which allow us to support systems where we have
two PMICs each of which has regulators supplied by the other. This did
work a long time ago but got broken as part of improved integration with
the device model, it's fairly rare so nobody noticed.
- Improvements for supply handling from André Draszik to allow systems
with two PMICs with supply/consumer relationships in both
directions to instantiate.
- New drivers for Maxim MAX776750, Realtek RT8902, Samsung S2MPG11,
Texas Instuments TPS65185.
This have also pulls in some MFD updates which are build dependencies
for the Samsung S2MPG11 support.
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Merge tag 'regulator-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"There's a bunch of new drivers here, plus a lot of hardening for the
supply resolution code which allow us to support systems where we have
two PMICs each of which has regulators supplied by the other. This did
work a long time ago but got broken as part of improved integration
with the device model, it's fairly rare so nobody noticed.
- Improvements for supply handling from André Draszik to allow
systems with two PMICs with supply/consumer relationships in both
directions to instantiate.
- New drivers for Maxim MAX776750, Realtek RT8902, Samsung S2MPG11,
Texas Instuments TPS65185.
This have also pulls in some MFD updates which are build dependencies
for the Samsung S2MPG11 support"
* tag 'regulator-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (42 commits)
regulator: s2mps11: more descriptive gpio consumer name
regulator: s2mps11: add S2MPG11 regulator
regulator: s2mps11: refactor S2MPG10 regulator macros for S2MPG11 reuse
regulator: s2mps11: refactor S2MPG10 ::set_voltage_time() for S2MPG11 reuse
regulator: s2mps11: add S2MPG10 regulator
regulator: s2mps11: refactor handling of external rail control
regulator: s2mps11: update node parsing (allow -supply properties)
regulator: s2mps11: place constants on right side of comparison tests
regulator: s2mps11: use dev_err_probe() where appropriate
regulator: s2mps11: drop two needless variable initialisations
regulator: add REGULATOR_LINEAR_VRANGE macro
regulator: dt-bindings: add s2mpg11-pmic regulators
regulator: dt-bindings: add s2mpg10-pmic regulators
dt-bindings: firmware: google,gs101-acpm-ipc: convert regulators to lowercase
mfd: sec: Add support for S2MPG11 PMIC via ACPM
mfd: sec: s2mpg10: Reorder regulators for better probe performance
dt-bindings: mfd: Add samsung,s2mpg11-pmic
dt-bindings: mfd: samsung,s2mpg10-pmic: Link to its regulators
dt-bindings: mfd: samsung,s2mps11: Split s2mpg10-pmic into separate file
mfd: sec: Drop now unused struct sec_pmic_dev::irq_data
...
|
||
|
Linus Torvalds
|
08df88fa14 |
This update includes the following changes:
API:
- Fix race condition in hwrng core by using RCU.
Algorithms:
- Allow authenc(sha224,rfc3686) in fips mode.
- Add test vectors for authenc(hmac(sha384),cbc(aes)).
- Add test vectors for authenc(hmac(sha224),cbc(aes)).
- Add test vectors for authenc(hmac(md5),cbc(des3_ede)).
- Add lz4 support in hisi_zip.
- Only allow clear key use during self-test in s390/{phmac,paes}.
Drivers:
- Set rng quality to 900 in airoha.
- Add gcm(aes) support for AMD/Xilinx Versal device.
- Allow tfms to share device in hisilicon/trng.
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Merge tag 'v7.0-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto update from Herbert Xu:
"API:
- Fix race condition in hwrng core by using RCU
Algorithms:
- Allow authenc(sha224,rfc3686) in fips mode
- Add test vectors for authenc(hmac(sha384),cbc(aes))
- Add test vectors for authenc(hmac(sha224),cbc(aes))
- Add test vectors for authenc(hmac(md5),cbc(des3_ede))
- Add lz4 support in hisi_zip
- Only allow clear key use during self-test in s390/{phmac,paes}
Drivers:
- Set rng quality to 900 in airoha
- Add gcm(aes) support for AMD/Xilinx Versal device
- Allow tfms to share device in hisilicon/trng"
* tag 'v7.0-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (100 commits)
crypto: img-hash - Use unregister_ahashes in img_{un}register_algs
crypto: testmgr - Add test vectors for authenc(hmac(md5),cbc(des3_ede))
crypto: cesa - Simplify return statement in mv_cesa_dequeue_req_locked
crypto: testmgr - Add test vectors for authenc(hmac(sha224),cbc(aes))
crypto: testmgr - Add test vectors for authenc(hmac(sha384),cbc(aes))
hwrng: core - use RCU and work_struct to fix race condition
crypto: starfive - Fix memory leak in starfive_aes_aead_do_one_req()
crypto: xilinx - Fix inconsistant indentation
crypto: rng - Use unregister_rngs in register_rngs
crypto: atmel - Use unregister_{aeads,ahashes,skciphers}
hwrng: optee - simplify OP-TEE context match
crypto: ccp - Add sysfs attribute for boot integrity
dt-bindings: crypto: atmel,at91sam9g46-sha: add microchip,lan9691-sha
dt-bindings: crypto: atmel,at91sam9g46-aes: add microchip,lan9691-aes
dt-bindings: crypto: qcom,inline-crypto-engine: document the Milos ICE
crypto: caam - fix netdev memory leak in dpaa2_caam_probe
crypto: hisilicon/qm - increase wait time for mailbox
crypto: hisilicon/qm - obtain the mailbox configuration at one time
crypto: hisilicon/qm - remove unnecessary code in qm_mb_write()
crypto: hisilicon/qm - move the barrier before writing to the mailbox register
...
|
||
|
Mark Brown
|
914809c666
|
Samsung S2MPG10 regulator and S2MPG11 PMIC drivers
Merge series from André Draszik <andre.draszik@linaro.org>: This series extends the existing S2MPG10 PMIC driver to add support for the regulators, and adds new S2MPG11 core and regulator drivers. The patches are kept together in one series, due to S2MPG11 and its regulators being very similar to S2MPG10. The Samsung S2MPG11 PMIC is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, and additional GPIO interfaces. It typically complements an S2MPG10 PMIC in a main/sub configuration as the sub-PMIC and both are used on the Google Pixel 6 and 6 Pro (oriole / raven). A DT update for Oriole / Raven to enable these is required which I will send out separately. |
||
|
André Draszik
|
e4691f356b
|
dt-bindings: firmware: google,gs101-acpm-ipc: convert regulators to lowercase
Using lowercase for the buck and ldo nodenames is preferred, as evidenced e.g. in [1]. Convert the example here to lowercase before we add any bindings describing the s2mpg1x regulators that will enforce the spelling. Link: https://lore.kernel.org/all/20250223-mysterious-infrared-civet-e5bcbf@krzk-bin/ [1] Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-1-3b1f9831fffd@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
Peng Fan
|
39451ebcf7 |
dt-bindings: firmware: fsl,scu: Mark multi-channel MU layouts as deprecated
The SCU MU driver has already supported the simple and efficient single-TX and single-RX channel layout since 2021. The older multi-channel MU configurations (tx0..tx3 and rx0..rx3) are less efficient in practice and not needed. Mark these legacy mbox-names and mboxes tuple layouts as deprecated in the binding schema. The driver continues to support them for backward compatibility in case firmware publishes the legacy properties. The example section is updated accordingly to demonstrate the recommended layout. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260127-scu-v2-1-03f3aaa56e1b@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
||
|
Rob Herring (Arm)
|
62fedca4ff |
dt-bindings: firmware: Convert cznic,turris-mox-rwtm to DT schema
Convert the CZ.NIC Turris Mox rWTM firmware binding to DT schema format. Add the "marvell,armada-3700-rwtm-firmware" compatible which was not documented. Link: https://patch.msgid.link/20251215212545.3318816-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
||
|
Ronak Jain
|
26dfe3a6d9 |
dt-bindings: firmware: xilinx: Add conditional pinctrl schema
Updates the Device Tree bindings for Xilinx firmware by introducing conditional schema references for the pinctrl node. Previously, the pinctrl node directly referenced xlnx,zynqmp-pinctrl.yaml. However, this patch modifies the schema to conditionally apply the correct pinctrl schema based on the compatible property. Specifically: - If compatible contains "xlnx,zynqmp-pinctrl", reference xlnx,zynqmp-pinctrl.yaml. - If compatible contains "xlnx,versal-pinctrl", reference xlnx,versal-pinctrl.yaml. Additionally, an example entry for "xlnx,versal-pinctrl" has been added under the examples section. Signed-off-by: Ronak Jain <ronak.jain@amd.com> Link: https://patch.msgid.link/20251212100542.2756757-3-ronak.jain@amd.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
||
|
Ronak Jain
|
93fb82ec34 |
dt-bindings: firmware: xilinx: Add xlnx,zynqmp-firmware compatible
The absence of a compatible property caused dt_binding_check to skip the zynqmp_firmware node. To address this, add "xlnx,zynqmp-firmware" to the compatible property in the example section for the zynqmp_firmware node. Signed-off-by: Ronak Jain <ronak.jain@amd.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251212100542.2756757-2-ronak.jain@amd.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
||
|
Harsh Jain
|
2de468529f |
dt-bindings: crypto: Mark zynqmp-aes as Deprecated
zynqmp-aes-gcm updated to self discover, corresponding dt binding can be mark deprecated. Signed-off-by: Harsh Jain <h.jain@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
||
|
Linus Walleij
|
54de247a0e |
dt-bindings: Updates Linus Walleij's mail address
My name is stamped into maintainership for a big slew of DT bindings. Now that it is changing, switch it over to my kernel.org mail address, which will hopefully be stable for the rest of my life. Signed-off-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20251216-maintainers-dt-v1-1-0b5ab102c9bb@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
||
|
Linus Torvalds
|
208eed95fc |
soc: driver updates for 6.19
This is the first half of the driver changes:
- A treewide interface change to the "syscore" operations for
power management, as a preparation for future Tegra specific
changes.
- Reset controller updates with added drivers for LAN969x, eic770
and RZ/G3S SoCs.
- Protection of system controller registers on Renesas and Google SoCs,
to prevent trivially triggering a system crash from e.g. debugfs
access.
- soc_device identification updates on Nvidia, Exynos and Mediatek
- debugfs support in the ST STM32 firewall driver
- Minor updates for SoC drivers on AMD/Xilinx, Renesas, Allwinner, TI
- Cleanups for memory controller support on Nvidia and Renesas
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Merge tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"This is the first half of the driver changes:
- A treewide interface change to the "syscore" operations for power
management, as a preparation for future Tegra specific changes
- Reset controller updates with added drivers for LAN969x, eic770 and
RZ/G3S SoCs
- Protection of system controller registers on Renesas and Google
SoCs, to prevent trivially triggering a system crash from e.g.
debugfs access
- soc_device identification updates on Nvidia, Exynos and Mediatek
- debugfs support in the ST STM32 firewall driver
- Minor updates for SoC drivers on AMD/Xilinx, Renesas, Allwinner, TI
- Cleanups for memory controller support on Nvidia and Renesas"
* tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (114 commits)
memory: tegra186-emc: Fix missing put_bpmp
Documentation: reset: Remove reset_controller_add_lookup()
reset: fix BIT macro reference
reset: rzg2l-usbphy-ctrl: Fix a NULL vs IS_ERR() bug in probe
reset: th1520: Support reset controllers in more subsystems
reset: th1520: Prepare for supporting multiple controllers
dt-bindings: reset: thead,th1520-reset: Add controllers for more subsys
dt-bindings: reset: thead,th1520-reset: Remove non-VO-subsystem resets
reset: remove legacy reset lookup code
clk: davinci: psc: drop unused reset lookup
reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC
reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY
dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support
reset: eswin: Add eic7700 reset driver
dt-bindings: reset: eswin: Documentation for eic7700 SoC
reset: sparx5: add LAN969x support
dt-bindings: reset: microchip: Add LAN969x support
soc: rockchip: grf: Add select correct PWM implementation on RK3368
soc/tegra: pmc: Add USB wake events for Tegra234
amba: tegra-ahb: Fix device leak on SMMU enable
...
|
||
|
Linus Torvalds
|
0cac5ce06e |
soc: devicetree updates for 6.19
Three new SoCs got added in existing arm64 chip families:
- Renesas R-Car X5H (R8A78000) is a new generation of automotive SoCs,
based on 16 Cortex-A720 (Armv9.2) cores, which makes the the currently
highest-perforance embedded SoC.
- TI AM62L is a new variant of the AM62 family of industrial SoCs, this
one comes without a GPU.
- Qualcomm MSM8937 (Snapdragon 430) is an older mobile phone chip based
on Cortex-A53, and closely related to MSM8917 (Snapdragn 425), which we
already support.
In addition, there are a good number of newly supported machines
across SoC families:
- Two Aspeed AST2600 (Cortex-A7) based BMC setups for large servers
- Mobile Phones and tables based on Mediatek MT6582, Nvidia Tegra124,
Qualcomm MSM8937 and Qualcomm MSM8939,
- Two Laptops based on Qualcomm SoCs: one using the older sdm850, the
other using x1p42100.
- One Router based on Rockchips RK3568
- 24 variants of the Enclustra Mercury system-on-module, all based on
32-bit Intel/Altera SocFPGA chips, plus two boards using 64-bit
SocFPGA Agilex chips..
- 30 industrial/embedded boards and single-board computers, using
various chips from NXP, Rockchips, Mediatek, TI, Amlogic, Qualcomm,
Spacemit, and Starfive.
In total there are 783 commits here, the majority of these improving
hardware support and cleaning up devicetree files across the tree, with
the majority of the changes going into the Qualcomm, NXP, Renesas and
Rockchips platforms.
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Merge tag 'soc-dt-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"Three new SoCs got added in existing arm64 chip families:
- Renesas R-Car X5H (R8A78000) is a new generation of automotive
SoCs, based on 16 Cortex-A720 (Armv9.2) cores, which makes the the
currently highest-perforance embedded SoC.
- TI AM62L is a new variant of the AM62 family of industrial SoCs,
this one comes without a GPU.
- Qualcomm MSM8937 (Snapdragon 430) is an older mobile phone chip
based on Cortex-A53, and closely related to MSM8917 (Snapdragn
425), which we already support.
In addition, there are a good number of newly supported machines
across SoC families:
- Two Aspeed AST2600 (Cortex-A7) based BMC setups for large servers
- Mobile Phones and tables based on Mediatek MT6582, Nvidia Tegra124,
Qualcomm MSM8937 and Qualcomm MSM8939,
- Two Laptops based on Qualcomm SoCs: one using the older sdm850, the
other using x1p42100.
- One Router based on Rockchips RK3568
- 24 variants of the Enclustra Mercury system-on-module, all based on
32-bit Intel/Altera SocFPGA chips, plus two boards using 64-bit
SocFPGA Agilex chips..
- 30 industrial/embedded boards and single-board computers, using
various chips from NXP, Rockchips, Mediatek, TI, Amlogic, Qualcomm,
Spacemit, and Starfive.
In total there are 783 commits here, the majority of these improving
hardware support and cleaning up devicetree files across the tree,
with the majority of the changes going into the Qualcomm, NXP, Renesas
and Rockchips platforms"
* tag 'soc-dt-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (782 commits)
arm64: dts: mediatek: mt8195: Fix address range for JPEG decoder core 1
ARM: dts: samsung: exynos4412-midas: turn off SDIO WLAN chip during system suspend
ARM: dts: samsung: exynos4210-trats: turn off SDIO WLAN chip during system suspend
ARM: dts: samsung: exynos4210-i9100: turn off SDIO WLAN chip during system suspend
ARM: dts: samsung: universal_c210: turn off SDIO WLAN chip during system suspend
arm64: dts: amlogic: meson-g12b: Fix L2 cache reference for S922X CPUs
arm64: dts: Add gpio_intc node for Amlogic S7D SoCs
arm64: dts: Add gpio_intc node for Amlogic S7 SoCs
arm64: dts: Add gpio_intc node for Amlogic S6 SoCs
arm64: dts: amlogic: s7d: add ao secure node
arm64: dts: amlogic: s7: add ao secure node
arm64: dts: amlogic: s6: add ao secure node
arm64: dts: amlogic: Fix the register name of the 'DBI' region
dts: arm64: amlogic: add a5 pinctrl node
arm64: dts: amlogic: s7d: add power domain controller node
arm64: dts: amlogic: s7: add power domain controller node
arm64: dts: amlogic: s6: add power domain controller node
dts: arm64: amlogic: Add ISP related nodes for C3
arm64: dts: meson: add initial device-tree for Tanix TX9 Pro
dt-bindings: arm: amlogic: add support for Tanix TX9 Pro
...
|
||
|
Arnd Bergmann
|
c7cdc91603 |
SoCFPGA DTS updates for v6.19
- Add 4-bit SPI bus width(n5x, stratix10, agilex and agilex5) - Agilex5 updates: - Add GMAC0 for NAND daughter card - Add SMMU support - Add VGIC maintenance interrupt - Add L2 and L3 cache - Add support for the 013b board - Add I3C support - Add support for the Enclustra Mercury+ SA1 SoM based on Cyclone5 - Add support for Agilex3 board(a variant of the Agilex5 board) - dt-bindings update: - Document iommu in cdns,hp-nfc, snps,dw-axi-dmac and Agilex5 - Document Enclustra Mercury SA1 and AA1 boards - Document Agilex5 013b board - Document Agilex3 board - Fix dtbs_check warnings: - stratix10-swvp - Agilex(NAND and Clock manager) - Move sdmmc-ecc to base DTSI file(Stratix10) -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmkbEaAACgkQGZQEC4Gj KPSl2BAAqGkAuKu0YyY91YuEDWnkqGEt5HGnhuTfemfCr2kBNAVMDrqroYB1Ou2W m1PHVwrl4U8U9mH1PFsozbbQU5MN+RhDo4GlydxfLlheW6nTlbmEOQWfoUArEgol 5ZHNvFw1j01Fhri+Zpa+L7ySrRXNVzftbFQaj9Hfr6QPLRU6cTATD3y32nYCj3e7 a2ttykSjG8u+T1DytCU1mvK3sXDTt1+E+gV9+YWbG81so45PsNybYobhNqTwGHcU bYY2FCqiB+Rn2tLOJrx1HzMxZ8b14dNxMire+2Lpi5/Zm8CIo+dP77szbE9LfyKp oIm6uzP3qtQINmeUUrCjn4KHUzh4KZnBUs1t0ayutC/Rh/79sa3cnD2+hq3jmU40 MgNQfMmwwmMIe7ZJo12HoAB9dy8p4huF17PznGn5LJxcgtVzB0wF9R2yeg8cxjVz Jlq6SN8c253iEyKYkOa1DC0zkHH+uHDSeXKlyVKe8vNNgcCLkoIZEXw2U6VGTRy9 aMvtfNwli3Lzm3JO7CV/BJ09bSbrDmn9halBizp4n1dA4NgLaDa2rBAj1S1vM9JT 7c3cwXGLlO1GR56hYEIVkD6DJHgZxETFtrgPnSPfgb9AEHg9BCQ6nkTKFQZz0e15 DTlDZf4pF2MnapxzDW9CiuEEfkHAZZK+x2IUYmoOrRwdEtG1yC8= =RGfQ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgj8IACgkQmmx57+YA GNnHghAAnfd19hyn4ZLP+3f7jv8AiYXoPwnRQxkpYqhHFcopkOyKYzYWpxGgMhvj ex2RRwv56a6VXy7D27J66WgH3zXrFMKZ1dthpUZ8j86HzZUW0XCutl2OSrXd440Q E8elSyH7Ewe8nxqV0o6Uoel0BxblHpYSV3/Pt+yYvg1IzZZwrTCditncI7kSdFPQ lrpNLxzRviobnVP4C+ee7jqmjpY6vM2KfACO0bFvgdSj+pt7efbVu6HKQtV6Orxz 42u6GiJLRXGXRYtXGWPzmTom5oSLRFlFbLtjDMgJoiyUVS13wmJVyb1OqVYgUxM1 5AVIn5ovMOTSPoVqoUJUCe0sctNvmzKV2gHc4EUtUhLInhJSRgJEDGBkDDUGhAg8 2OjRRwVRviQRzh7ANAoBciJbEzaU1vql+TXXw7ujj0qyfED6gPop33PnJuQ6IWdC 1M5JTi/Scvyjst7Aduth8JeEY4OOLjnuHnB32EsT90VPxVYSEwplUT+V04821keo teIwDjDTVUEkU5PzaFCz18pDRyxcsbqVbNnp70TJ5axAAPAJ+JiRbrwfM9QSZm25 jDASEXNuQ4LTKPplJiNKeYYgzCh69UQsT+rVTh+OFyL6VdpoIlYqmpzRQTaKvLZp UBiavYugBby57d2UkfW9mp3SpawI5lZub92KcRkROTSbZcL86+k= =pOrf -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_updates_for_v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt SoCFPGA DTS updates for v6.19 - Add 4-bit SPI bus width(n5x, stratix10, agilex and agilex5) - Agilex5 updates: - Add GMAC0 for NAND daughter card - Add SMMU support - Add VGIC maintenance interrupt - Add L2 and L3 cache - Add support for the 013b board - Add I3C support - Add support for the Enclustra Mercury+ SA1 SoM based on Cyclone5 - Add support for Agilex3 board(a variant of the Agilex5 board) - dt-bindings update: - Document iommu in cdns,hp-nfc, snps,dw-axi-dmac and Agilex5 - Document Enclustra Mercury SA1 and AA1 boards - Document Agilex5 013b board - Document Agilex3 board - Fix dtbs_check warnings: - stratix10-swvp - Agilex(NAND and Clock manager) - Move sdmmc-ecc to base DTSI file(Stratix10) * tag 'socfpga_dts_updates_for_v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: (35 commits) arm64: dts: socfpga: agilex5: update qspi partitions for 013b board arm64: dts: socfpga: add Agilex3 board dt-bindings: intel: Add Agilex3 SoCFPGA board arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers arm64: dts: socfpga: Add Agilex5 SVC node with memory region dt-bindings: firmware: svc: Add IOMMU support for Agilex5 arm64: dts: socfpga: agilex5: Add SMMU-V3-PMCG nodes arm64: dts: socfpga: agilex5: Add L2 and L3 cache arm64: dts: socfpga: agilex5: fix CHECK_DTBS warning for NAND arm64: dts: socfpga: agilex5: add support for 013b board dt-bindings: intel: Add Agilex5 SoCFPGA 013b board arm64: dts: socfpga: agilex5: add VGIC maintenance interrupt arm64: dts: socfpga: agilex: fix dtbs_check warning for NAND arm64: dts: socfpga: agilex: fix dtbs_check warning for clock manager arm64: dts: socfpga: stratix10-swvp: fix dtbs_check warnings swvp arm64: dts: socfpga: move sdmmc-ecc to the base DTSI file ARM: dts: socfpga: add Enclustra SoM dts files dt-bindings: altera: removal of generic PE1 dts ARM: dts: socfpga: removal of generic PE1 dts dt-bindings: altera: add Mercury AA1 variants ... Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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|
Rob Herring (Arm)
|
0b2333183a |
dt-bindings: Remove extra blank lines
Generally at most 1 blank line is the standard style for DT schema files. Remove the few cases with more than 1 so that the yamllint check for this can be enabled. Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc Acked-by: Georgi Djakov <djakov@kernel.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Andi Shyti <andi.shyti@kernel.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
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Khairul Anuar Romli
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dd94481408 |
dt-bindings: firmware: svc: Add IOMMU support for Agilex5
In Agilex5, the TBU (Translation Buffer Unit) can now operate in non-secure mode, enabling Linux to utilize it through the IOMMU framework. This allows improved memory management capabilities in non-secure environments. With Agilex5 lifting this restriction, we are now extending the device tree bindings to support IOMMU for the Agilex5 SVC. Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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Jingyi Wang
|
682921ab33 |
dt-bindings: firmware: qcom,scm: Document SCM on Kaanapali SOC
Document SCM compatible for the Qualcomm Kaanapali SoC. Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251102-knp-soc-binding-v3-2-11255ec4a535@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Pankaj Patil
|
6d49c6ede8 |
dt-bindings: firmware: qcom,scm: Document Glymur scm
Document the SCM compatible for Qualcomm Glymur SoC. Secure Channel Manager(SCM) is used to communicate with secure firmware. Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250918141738.2524269-1-pankaj.patil@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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Tudor Ambarus
|
83c4e3c39b |
dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks
The firmware exposes clocks that can be controlled via the Alive Clock and Power Manager (ACPM) interface. Make the ACPM node a clock provider by adding the mandatory "#clock-cells" property, which allows devices to reference its clock outputs. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Tested-by: Peter Griffin <peter.griffin@linaro.org> # on gs101-oriole Link: https://patch.msgid.link/20251010-acpm-clk-v6-1-321ee8826fd4@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Linus Torvalds
|
38057e3236 |
soc: driver updates for 6.18
Lots of platform specific updates for Qualcomm SoCs, including a new TEE subsystem driver for the Qualcomm QTEE firmware interface. Added support for the Apple A11 SoC in drivers that are shared with the M1/M2 series, among more updates for those. Smaller platform specific driver updates for Renesas, ASpeed, Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale SoCs. Driver updates in the cache controller, memory controller and reset controller subsystems. SCMI firmware updates to add more features and improve robustness. This includes support for having multiple SCMI providers in a single system. TEE subsystem support for protected DMA-bufs, allowing hardware to access memory areas that managed by the kernel but remain inaccessible from the CPU in EL1/EL0. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmjdpaoACgkQmmx57+YA GNnBXA//QgmFXYGG7QfB825mt0orKZxpfpLcwvqO7hkWgbXtl7Gokw2lGYN6bwLu zvY4MQ/bVoZ8R5uTVmuaSHBRsttSen8mBf+V0vzsBM/DRRVxvIN/7TESrY3J7Dtx J5syHKIBiUtdkDebWWC6jIElczIBItsd03Ln4Xjjt8Vas5YOO4n44zFrPo+FwlN/ I6D2K86AiNZTtUCDMtB6VfJ6YtjYBWcWnJm7FXw/vE8FAXdZUnNWnZ8hbdQ5GaME JZGepUhONaOMUoGNZNaDGw511RdPhYzPjj9rCsIx2qdsRO9/4tJ8ccpW2aUMYh8c nA6w8Hj8jCwco6aYYrDUDV9uRtURDrmyJgTJBNLU05e/L+MuJ3IZNlzHFWlsxIAE vhyTdmg/P04ClQyixCl67IH/66F/0smX9C+1761LrD7GTdfR92KPl5W6q+DPBg/x yf+s2p3+f7ItV5XobKOrbf3w0xazeDb5o/EK8BufMx9vSe9bpzJ0gOf0CmNXEpyZ owAhbh6wXX1YwPcyA9LHv6gthyJwc/3fLu49ggMZP2rU01ccKOYn9H0cr7C8NVmy wEpJR0lp5aSw2oRkPkxB6sFmUohcpr8/OXGGJuvCXkYsUY1BEup4lewvbIWK4WoE c84kbbaHsjgFhe3IRlQw3G4KLYQT3jRtF7fH+gPx556BcI6K+lg= =mcZR -----END PGP SIGNATURE----- Merge tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "Lots of platform specific updates for Qualcomm SoCs, including a new TEE subsystem driver for the Qualcomm QTEE firmware interface. Added support for the Apple A11 SoC in drivers that are shared with the M1/M2 series, among more updates for those. Smaller platform specific driver updates for Renesas, ASpeed, Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale SoCs. Driver updates in the cache controller, memory controller and reset controller subsystems. SCMI firmware updates to add more features and improve robustness. This includes support for having multiple SCMI providers in a single system. TEE subsystem support for protected DMA-bufs, allowing hardware to access memory areas that managed by the kernel but remain inaccessible from the CPU in EL1/EL0" * tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (139 commits) soc/fsl/qbman: Use for_each_online_cpu() instead of for_each_cpu() soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver soc: fsl: qe: Change GPIO driver to a proper platform driver tee: fix register_shm_helper() pmdomain: apple: Add "apple,t8103-pmgr-pwrstate" dt-bindings: spmi: Add Apple A11 and T2 compatible serial: qcom-geni: Load UART qup Firmware from linux side spi: geni-qcom: Load spi qup Firmware from linux side i2c: qcom-geni: Load i2c qup Firmware from linux side soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem soc: qcom: geni-se: Cleanup register defines and update copyright dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus Documentation: tee: Add Qualcomm TEE driver tee: qcom: enable TEE_IOC_SHM_ALLOC ioctl tee: qcom: add primordial object tee: add Qualcomm TEE driver tee: increase TEE_MAX_ARG_SIZE to 4096 tee: add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF tee: add TEE_IOCTL_PARAM_ATTR_TYPE_UBUF tee: add close_context to TEE driver operation ... |
||
|
Arnd Bergmann
|
bc43efa137 |
Arm SCMI updates/fixes for v6.18
These SCMI changes bring a mix of improvements, fixes, and cleanups:
1. Device Tree bindings - allow multiple SCMI instances by suffixing
node names (Nikunj Kela).
2. Code hardening - constify both scmi_{transport,voltage_proto}_ops
so they reside in read-only memory (Christophe JAILLET).
3. VirtIO transport initialization - set DRIVER_OK before SCMI probing
to prevent potential stalls; while recent rework removes the practical
risk, this ensures correctness (Junnan Wu).
4. Quirk handling - fix a critical bug by preventing writes to string
constants, avoiding faults in read-only memory (Johan Hovold).
5. i.MX SCMI MISC protocol - extend support to discover board info,
retrieve configuration and build data, and document the new
MISC_BOARD_INFO command; all handled gracefully if unsupported (Peng Fan).
6. Logging cleanup - simplify device tree node name logging by using
the %pOF format to print full paths (Krzysztof Kozlowski).
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Merge tag 'scmi-updates-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates/fixes for v6.18
These SCMI changes bring a mix of improvements, fixes, and cleanups:
1. Device Tree bindings - allow multiple SCMI instances by suffixing
node names (Nikunj Kela).
2. Code hardening - constify both scmi_{transport,voltage_proto}_ops
so they reside in read-only memory (Christophe JAILLET).
3. VirtIO transport initialization - set DRIVER_OK before SCMI probing
to prevent potential stalls; while recent rework removes the practical
risk, this ensures correctness (Junnan Wu).
4. Quirk handling - fix a critical bug by preventing writes to string
constants, avoiding faults in read-only memory (Johan Hovold).
5. i.MX SCMI MISC protocol - extend support to discover board info,
retrieve configuration and build data, and document the new
MISC_BOARD_INFO command; all handled gracefully if unsupported (Peng Fan).
6. Logging cleanup - simplify device tree node name logging by using
the %pOF format to print full paths (Krzysztof Kozlowski).
* tag 'scmi-updates-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: Simplify printks with pOF format
firmware: arm_scmi: imx: Discover MISC board info from the system manager
firmware: arm_scmi: imx: Support retrieving MISC protocol configuration info
firmware: arm_scmi: imx: Discover MISC build info from the system manager
firmware: arm_scmi: imx: Add documentation for MISC_BOARD_INFO
firmware: arm_scmi: quirk: Prevent writes to string constants
firmware: arm_scmi: Fix function name typo in scmi_perf_proto_ops struct
firmware: arm_scmi: Mark VirtIO ready before registering scmi_virtio_driver
firmware: arm_scmi: Constify struct scmi_transport_ops
firmware: arm_scmi: Constify struct scmi_voltage_proto_ops
dt-bindings: firmware: arm,scmi: Allow multiple instances
Link: https://lore.kernel.org/r/20250915101341.2987516-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Alexander Stein
|
2f572b0def |
dt-bindings: firmware: imx95-scmi: Allow linux,code for protocol@81
BBM protocol supports a single power button, supported by driver imx-sm-bbm-key.c. By default this is KEY_POWER, but can also be overwritten using linux,code. Add a reference to this schema and add linux,code as a supported property. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
||
|
Barnabás Czémán
|
cf13bed78c |
dt-bindings: firmware: qcom,scm: Add MSM8937
Add compatible for MSM8937. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20250903-msm8937-v9-3-a097c91c5801@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
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|
Nikunj Kela
|
a4d5f63d43 |
dt-bindings: firmware: arm,scmi: Allow multiple instances
Enable multiple SCMI instances by appending an instance-number suffix to the 'scmi' node name. The SCMI spec assumes a single SCMI platform, but in practice its responsibilities may be split across several SCMI platform/server instances. However, only one instance can serve as the system-wide (true) SCMI platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> Signed-off-by: Deepti Jaggi <quic_djaggi@quicinc.com> Message-Id: <20250730-8255-scmi-v6-1-a7d8ba19aded@quicinc.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
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|
Linus Torvalds
|
0f46f50845 |
soc: driver updates for 6.17
Changes are all over the place, but very little sticks out as noteworthy. There is a new misc driver for the Raspberry Pi 5's RP1 multifunction I/O chip, along with hooking it up to the pinctrl and clk frameworks. The reset controller and memory subsystems have mainly small updates, but there are two new reset drivers for the K230 and VC1800B SoCs, and new memory driver support for Tegra264. The ARM SMCCC and SCMI firmware drivers gain a few more features that should help them be supported across more environments. Similarly, the SoC specific firmware on Tegra and Qualcomm get minor enhancements and chip support. In the drivers/soc/ directory, the ASPEED LPC snoop driver gets an overhaul for code robustness, the Tegra and Qualcomm and NXP drivers grow to support more chips, while the Hisilicon, Mediatek and Renesas drivers see mostly janitorial fixes. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmiEmIcACgkQmmx57+YA GNkE4g/6A2OKti+qtIsLt10zS7paGP38ftu9ad27WC54AOGgVk4ZXt8mVGRmqOf+ BICIM+wc4gehdvRJTRnq3gZg3e1puuYdcMuBOh4qsghRMjdYUKfNairtn/iX7d+f e5auzz5/gV7MWNM7jiQNydCqZSeV6u2/cqD5iRCrRgaB5FOG4yY1BkAsah1UzZjk MycudqjkK4IX5zp5oqXB/PoesULAbB2unjvfw194LATYSqmcRLQRWFdv4aM0R6ba TDP5x0d95nhMTNWif3495zc2WxdSYzbD4lNv44RPpKDywqBj+qFBI/EpMFkxQ5Hy cqv60Dm+/tx+DBO/Ma0zJzsV4ChRIEBNkTUh36OxmYxq70x1T4FEynZ6IT8a8dXD ltjHwOcTHp1M0OpNj+PIFBD+ohWFWKOo+T9GRtTInLjUGBlJA6LK9i4Lb0DaIyRt DmmvbZCwh0PI/nZiyQzw7rsXWwqDcqeF8FScw+9ooBk7Z7Jr1gMc52ya0qrRWQ8w Tr3D+lNE0aDfErnx4RrNsjD8lpX4nOfRFvuWSTlWqkBjGhoDP/tnNi2RCWmbXo2Z PDDWLnECo6o1aIxYO/tHjbFKVJB38p4e/LLP89htu8dFxSZKnVzxosnOvEVWS8+Y a0oZb9j1tAOYHmMWDm+zaQ7BlK9CMURNTdUcnqNqIvZpHnHz9M8= =7T40 -----END PGP SIGNATURE----- Merge tag 'soc-drivers-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "Changes are all over the place, but very little sticks out as noteworthy. There is a new misc driver for the Raspberry Pi 5's RP1 multifunction I/O chip, along with hooking it up to the pinctrl and clk frameworks. The reset controller and memory subsystems have mainly small updates, but there are two new reset drivers for the K230 and VC1800B SoCs, and new memory driver support for Tegra264. The ARM SMCCC and SCMI firmware drivers gain a few more features that should help them be supported across more environments. Similarly, the SoC specific firmware on Tegra and Qualcomm get minor enhancements and chip support. In the drivers/soc/ directory, the ASPEED LPC snoop driver gets an overhaul for code robustness, the Tegra and Qualcomm and NXP drivers grow to support more chips, while the Hisilicon, Mediatek and Renesas drivers see mostly janitorial fixes" * tag 'soc-drivers-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (100 commits) bus: del unnecessary init var soc: fsl: qe: convert set_multiple() to returning an integer pinctrl: rp1: use new GPIO line value setter callbacks soc: hisilicon: kunpeng_hccs: Fix incorrect log information dt-bindings: soc: qcom: qcom,pmic-glink: document Milos compatible dt-bindings: soc: qcom,aoss-qmp: document the Milos Always-On Subsystem side channel dt-bindings: firmware: qcom,scm: document Milos SCM Firmware Interface soc: qcom: socinfo: Add support to retrieve APPSBL build details soc: qcom: pmic_glink: fix OF node leak soc: qcom: spmi-pmic: add more PMIC SUBTYPE IDs soc: qcom: socinfo: Add PM7550 & PMIV0108 PMICs soc: qcom: socinfo: Add SoC IDs for SM7635 family dt-bindings: arm: qcom,ids: Add SoC IDs for SM7635 family firmware: qcom: scm: request the waitqueue irq *after* initializing SCM firmware: qcom: scm: initialize tzmem before marking SCM as available firmware: qcom: scm: take struct device as argument in SHM bridge enable firmware: qcom: scm: remove unused arguments from SHM bridge routines soc: qcom: rpmh-rsc: Add RSC version 4 support memory: tegra: Add Tegra264 MC and EMC support firmware: tegra: bpmp: Fix build failure for tegra264-only config ... |
||
|
Linus Torvalds
|
115e74a29b |
soc: dt changes for 6.17
There are a few new variants of existing chips:
- mt6572 is an older mobile phone chip from mediatek that was
extremely popular a decade ago but never got upstreamed until now.
- exynos2200 is a recent high-end mobile phone chip used in a
few Samsung phones like the Galaxy S22
- Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
(R8A779H0) and used in automotive applications
- Tegra264 is a new chip from NVIDIA, but support is fairly minimal
for now, and not much information is public about it.
There are five more chips in a separate branch, as those are new
chip families that I merged along with the necessary infrastructure.
New board support is not that exciting, with a total of 33 newly
added machines here:
- Evaluation platforms for the chips above, plus TI am62d2 and
Sophgo sg2042.
- Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
imx95.
- Two newly added ASPEED BMC based motherboards, and one that got
removed
- Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
msm8976 SoCs
- Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1
- A set-top box based on Amlogic meson-gxm.
Updates for existing machines are spread over all the above families.
One notable change here is support for the RP1 I/O chip used in
Raspberry Pi 5.
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Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There are a few new variants of existing chips:
- mt6572 is an older mobile phone chip from mediatek that was
extremely popular a decade ago but never got upstreamed until now
- exynos2200 is a recent high-end mobile phone chip used in a few
Samsung phones like the Galaxy S22
- Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
(R8A779H0) and used in automotive applications
- Tegra264 is a new chip from NVIDIA, but support is fairly minimal
for now, and not much information is public about it
There are five more chips in a separate branch, as those are new chip
families that I merged along with the necessary infrastructure.
New board support is not that exciting, with a total of 33 newly added
machines here:
- Evaluation platforms for the chips above, plus TI am62d2 and Sophgo
sg2042
- Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
imx95
- Two newly added ASPEED BMC based motherboards, and one that got
removed
- Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
msm8976 SoCs
- Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1
- A set-top box based on Amlogic meson-gxm
Updates for existing machines are spread over all the above families.
One notable change here is support for the RP1 I/O chip used in
Raspberry Pi 5"
* tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits)
riscv: dts: sophgo: fix mdio node name for CV180X
riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device
riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree
riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree
dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings
riscv: dts: sophgo: add ethernet GMAC device for sg2042
riscv: dts: sophgo: Enable ethernet device for Huashan Pi
riscv: dts: sophgo: Add mdio multiplexer device for cv18xx
riscv: dts: sophgo: Add ethernet device for cv18xx
riscv: dts: sophgo: sg2044: add pmu configuration
riscv: dts: sophgo: sg2044: add ziccrse extension
riscv: dts: sophgo: add zfh for sg2042
riscv: dts: sophgo: add ziccrse for sg2042
riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree
riscv: dts: sophgo: sg2044: add PCIe device support for SG2044
riscv: dts: sophgo: sg2044: add MSI device support for SG2044
riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC
riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC
dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000
riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property
...
|
||
|
Krzysztof Kozlowski
|
0121898ec0 |
dt-bindings: Correct indentation and style in DTS example
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Acked-by: Lee Jones <lee@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas Link: https://lore.kernel.org/r/20250107131456.247610-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250725100241.120106-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
||
|
Arnd Bergmann
|
1037b300df |
Allwinner device tree changes for 6.17
This branch includes a change shared with the clk tree for adding the missing PPU0 reset on the A523. The PM domain DT binding immutable branch is also included, which brings in v6.16-rc2, as well as PM domain bindings for other platforms. Other changes include: - RGB666 LCD pin definitions for the V3s PE pins and V3 PD pins - node order fixes for the A523 dtsi - UART1 pin definitions for A523 - Allwinner board DT binding cleanup - EMAC support on A100/A133 - Enabled on the Liontron H-A133L board - SID efuse, power controllers and GPU added for A523 - A523 GPU enabled on all existing boards New boards: - Xunlong OrangePi 4A with the Allwinner T527 SoC. -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmh2jp0OHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDBDIQ/8C/vnF+mjoNj/Gci0AUMbtVVvI4G28x8bsGVP jy3Z2dBuEQvU4eGvOKGyM9oJ5WfQBlpRS9nlRf/NHu/tASc7gXGHb7OJOlAocIUr ny3MpO2un0nx6HbtR6RtciSSLoasB6HtAKBscxmapJ3TiZBbjDtI7Z5l+Vxx75z8 Fo6xxQ9n+Iyxo3X6wZi9vp/d15Xz4LVy2iarN/JY+jywGtKZOcpsqEKqIV7m6Lcf 6pL2/ZaX38JzOdCY4lNsHUA827Ep/0waXirmUg0rvi8BpI4s1Cysh6XIbyrlQjaK xbqRvWWg0ZEaC3j2rcUTLaXREMsl5OFkX/5ywCysh0K76kKwxDvnPnDYUq3yOlwL qBO7PUEdCywqfSaaNFR+d8JqnALFT/h5P1KJhx7L2PpNpl3vH/TFy2EIVZgy+A2W p2+hkmqB211uJpzWdQ98ED0aIRErDM1vq0pi3KLqFGATmgp/ZQ53UbtrWDwI1NEN TUJK80ZztmyqGWlMTsSIHajgt7OAPI+Gc/gIv8fFLbciHoYV68HBAO3t6ljDKbOe grwLFhPLe3OELGkKsoOsrSsDJ39ijYpXMw4ssuDQY+TDdEtCrMC1F/NPdS05NQx1 igjLrUHOD6dMo4azw4uOPNosXir9+Rjywuqeuj/CBJfJkCqWDCh9OJFhWkaFMi01 ATqMzjY= =CwjI -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/7HUACgkQmmx57+YA GNkiWA//XXWjj5W1dEf8xWJFwL5YwJVkX0s+5XPWnAJ8YtLuuttt64bO/dCr74SL P6HeEsLLgW7+/LCCd0owkCz+GW+xGTQ5h/NfWgI6tAH73LV4DZ3XGztts06gUuZ1 DXzWJpRiV3CBUgN52eXdxvjsM4wgDwShck5DH21SbhQf3NpCB7YAtXi3eelqgHrh zrsR4UzfF2b/efKMeJP6vORLT4KkumS+IJsMS6cMErIXFeu/kOY7q5f8jvF6FftL 117kyEl55OiFV5E0S15zdnSGxiNPYWnwi00BUd2HDfxAer0/ow0lbW0bUwlAUd4V a7mTxi74Wv8QBgIw/tn+o5Fi24wz86c+Lks85rRC6YlkuQrExaNK2bC7Vzxc7imS PakQQnQMnIWA7kf/log2PdIX89gNYe7Lh5x7SKjvd0UmIvsgbwMX51e18P52it0a /81ntWhwhYoE7A+qVKZYleb2dG12/893hdW1lxKGnjiBsEkL15U9fsIKFAzgjKCb UHrr/dcPEcCedytSnTkOqiws1bscv9zHbc7qN0VEPtSbRwsVUHyDRcw3XFcWRSgK JlfiCuYvr+aOKegKihXauxLGDXwK1Q1GK61hMcwJGRocswENT2LA/vcIYDR0e8hR CYkc0IilHKyf/14HF+qBj5roPZkufJYS9T0xLs1tEsKRxMbeomI= =v3GV -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner device tree changes for 6.17 This branch includes a change shared with the clk tree for adding the missing PPU0 reset on the A523. The PM domain DT binding immutable branch is also included, which brings in v6.16-rc2, as well as PM domain bindings for other platforms. Other changes include: - RGB666 LCD pin definitions for the V3s PE pins and V3 PD pins - node order fixes for the A523 dtsi - UART1 pin definitions for A523 - Allwinner board DT binding cleanup - EMAC support on A100/A133 - Enabled on the Liontron H-A133L board - SID efuse, power controllers and GPU added for A523 - A523 GPU enabled on all existing boards New boards: - Xunlong OrangePi 4A with the Allwinner T527 SoC. * tag 'sunxi-dt-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits) arm64: dts: allwinner: a523: enable Mali GPU for all boards arm64: dts: allwinner: a523: add Mali GPU node arm64: dts: allwinner: a523: Add power controller device nodes dt-bindings: power: Add A523 PPU and PCK600 power controllers arm64: dts: allwinner: A523: Add SID controller node arm64: dts: allwinner: a133-liontron-h-a133l: Add Ethernet support arm64: dts: allwinner: a100: Add EMAC support arm64: dts: allwinner: a100: Add pin definitions for RGMII/RMII dt-bindings: arm: sunxi: Combine board variants into enums dt-bindings: power: qcom,rpmpd: document the Milos RPMh Power Domains arm64: dts: allwinner: t527: Add OrangePi 4A board arm64: dts: allwinner: a523: Add UART1 pins arm64: dts: allwinner: a523: Move rgmii0 pins to correct location arm64: dts: allwinner: a523: Move mmc nodes to correct position dt-bindings: arm: sunxi: Add Xunlong OrangePi 4A board ARM: dts: sun8i: v3: Add RGB666 LCD PD pins definition ARM: dts: sun8i: v3s: Add RGB666 LCD PE pins definition dt-bindings: reset: sun55i-a523-r-ccu: Add missing PPU0 reset dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen dt-bindings: rockchip: pmu: Add compatible for RK3528 ... Link: https://lore.kernel.org/r/aHaQFe3Lr8Qzyb1M@wens.tw Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Luca Weiss
|
4405f3f7b4 |
dt-bindings: firmware: qcom,scm: document Milos SCM Firmware Interface
Document the SCM Firmware Interface on the Milos SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250713-sm7635-fp6-initial-v2-4-e8f9a789505b@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |
||
|
Thierry Reding
|
52f117f8a7 |
dt-bindings: firmware: Document Tegra264 BPMP
While the BPMP found on Tegra264 is similar to the versions found on previous chips and should be backwards-compatible, some changes could eventually be needed. Anticipate such changes and introduce a chip- specific compatible string. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506133118.1011777-5-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
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Michal Wilczynski
|
7226b28ac7 |
dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen
Extend the TH1520 AON to describe the GPU clkgen reset line, required for proper GPU clock and reset sequencing. The T-HEAD TH1520 GPU requires coordinated management of two clocks (core and sys) and two resets (GPU core reset and GPU clkgen reset). Only the clkgen reset is exposed at the AON level, to support SoC specific initialization handled through a dedicated auxiliary power sequencing driver. The GPU core reset remains described in the GPU device node, as from the GPU driver's perspective, there is only a single reset line [1]. This follows upstream maintainers' recommendations [2] to abstract SoC specific details into the PM domain layer rather than exposing them to drivers directly. Link: https://lore.kernel.org/all/816db99d-7088-4c1a-af03-b9a825ac09dc@imgtec.com/ - [1] Link: https://lore.kernel.org/all/38d9650fc11a674c8b689d6bab937acf@kernel.org/ - [2] Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Drew Fustini <drew@pdp7.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://lore.kernel.org/r/20250623-apr_14_for_sending-v6-2-6583ce0f6c25@samsung.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
||
|
Linus Torvalds
|
ec71f661a5 |
soc: devicetree updates for 6.16
There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straig reuses of the existing
chip in a new package:
- RK3562 is a new chip based on the old Cortex-A53 core, apparently
a low-cost version of the Cortex-A55 based RK3568/RK3566.
- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.
- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2 family
- Amlogic S6/S7/S7D
- Samsung Exynos7870 is an older chip similar to Exynos7885
- WonderMedia wm8950 is a minor variation on the wm8850 chip
- Amlogic s805y is almost idential to s805x
- Allwinner A523 is similar to A527 and T527
- Qualcomm MSM8926 is a variant of MSM8226
- Qualcomm Snapdragon X1P42100 is related to R1E80100
There are also 65 boards, including reference designs for the chips
above, this includes
- 12 new boards based on TI K3 series chips, most of them from
Toradex
- 10 devices using Rockchips RK35xx and PX30 chips
- 2 phones and 2 laptops based on Qualcomm Snapdragon designs
- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses
- 3 Samsung Galaxy phones based on Exynos7870
- 5 Allwinner based boards using a variety of ARMv8 chips
- 9 32-bit machines, each based on a different SoC family
Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets.
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Merge tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straight reuses of the existing chip
in a new package:
- RK3562 is a new chip based on the old Cortex-A53 core, apparently a
low-cost version of the Cortex-A55 based RK3568/RK3566.
- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.
- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2
family
- Amlogic S6/S7/S7D
- Samsung Exynos7870 is an older chip similar to Exynos7885
- WonderMedia wm8950 is a minor variation on the wm8850 chip
- Amlogic s805y is almost idential to s805x
- Allwinner A523 is similar to A527 and T527
- Qualcomm MSM8926 is a variant of MSM8226
- Qualcomm Snapdragon X1P42100 is related to R1E80100
There are also 65 boards, including reference designs for the chips
above, this includes
- 12 new boards based on TI K3 series chips, most of them from
Toradex
- 10 devices using Rockchips RK35xx and PX30 chips
- 2 phones and 2 laptops based on Qualcomm Snapdragon designs
- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses
- 3 Samsung Galaxy phones based on Exynos7870
- 5 Allwinner based boards using a variety of ARMv8 chips
- 9 32-bit machines, each based on a different SoC family
Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets"
* tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (956 commits)
MAINTAINERS, mailmap: update Sven Peter's email address
arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency
arm64: dts: nuvoton: Add pinctrl
ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
arm64: dts: blaize-blzp1600: Enable GPIO support
dt-bindings: clock: socfpga: convert to yaml
arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3562 pcie unit addresses
arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node
arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi
arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3576 pcie unit addresses
arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
arm64: dts: rockchip: Add missing SFC power-domains to rk3576
Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"
arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes
arm64: dts: mt6359: Rename RTC node to match binding expectations
arm64: dts: mt8365-evk: Add goodix touchscreen support
arm64: dts: mediatek: mt8188: Add missing #reset-cells property
arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board
...
|
||
|
Arnd Bergmann
|
4e61c011b0 |
Arm SCMI updates for v6.16
1. Quirk framework to handle buggy firmware
With SCMI gaining broader adoption across arm64 platforms, it's
increasingly important to address how we consistently manage out-of-spec
SCMI firmware already deployed in the field. This change introduces a
lightweight quirk framework built around static_keys, enabling developers to:
- Define quirks and their match criteria, which can include:
o A list of compatibles ({ comp, comp2, NULL })
o Vendor ID / Sub-Vendor ID
o Firmware implementation version ranges ([Min_Vers, Max_Vers])
Matching proceeds from the most specific (longest match) to the least
specific. NULL entries are treated as wildcards (i.e., match any value).
This flexibility allows matching very specific combinations or just a
general compatible string.
The quirk code blocks/snippets implementing the workaround are placed near
their intended usage and guarded by a static_key that's tied to the quirk.
Once the SCMI core stack is initialized and retrieves platform info via the
base protocol, any matching quirks will have their associated static_keys
enabled.
2. Quirk for Qualcomm X1E platforms
On some Qualcomm X1E platforms, such as the Lenovo ThinkPad T14s, the
SCMI firmware fails to set the FastChannel support bit for PERF_LEVEL_GET,
yet it crashes when the driver attempts to fall back to standard messaging
which is clearly out-of-spec behavior.
To work around this, the new SCMI quirk framework is used to
unconditionally enable FC initialization for this firmware version.
In the future, once the fixed firmware version is identified, an upper
version bound can be added to the quirk match criteria. Alternatively,
matching can be further restricted using a SoC-specific compatible string
if always enabling FC proves problematic elsewhere.
3. Support for NXP i.MX LMM/CPU vendor protocol extensions
The i.MX95 System Manager (SM) implements Logical Machine Management (LMM)
and a CPU protocol to manage Logical Machines (LM) and CPUs (e.g., M7).
These changes integrate the vendor-specific protocol extensions
implementing the LMM and CPU protocols for the i.MX95, facilitating
standardized communication between the operating system and the platform's
firmware, which will be used by remoteproc drivers. The changes also
include the necessary device tree bindings.
4. Miscellaneous cleanups/changes
These mainly include polling support in SCMI raw mode. The cleanups
centralize error logging for SCMI device creation into a single helper
function, consolidate the device matching logic into a single function, and
ensure that devices must have a name for registration—removing support for
unnamed devices when matching drivers and devices for probing. Transport
devices are now excluded from bus matching, and the correct assignment of
the parent device for the arm-scmi platform device is ensured in the
transport drivers.
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Merge tag 'scmi-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates for v6.16
1. Quirk framework to handle buggy firmware
With SCMI gaining broader adoption across arm64 platforms, it's
increasingly important to address how we consistently manage out-of-spec
SCMI firmware already deployed in the field. This change introduces a
lightweight quirk framework built around static_keys, enabling developers to:
- Define quirks and their match criteria, which can include:
o A list of compatibles ({ comp, comp2, NULL })
o Vendor ID / Sub-Vendor ID
o Firmware implementation version ranges ([Min_Vers, Max_Vers])
Matching proceeds from the most specific (longest match) to the least
specific. NULL entries are treated as wildcards (i.e., match any value).
This flexibility allows matching very specific combinations or just a
general compatible string.
The quirk code blocks/snippets implementing the workaround are placed near
their intended usage and guarded by a static_key that's tied to the quirk.
Once the SCMI core stack is initialized and retrieves platform info via the
base protocol, any matching quirks will have their associated static_keys
enabled.
2. Quirk for Qualcomm X1E platforms
On some Qualcomm X1E platforms, such as the Lenovo ThinkPad T14s, the
SCMI firmware fails to set the FastChannel support bit for PERF_LEVEL_GET,
yet it crashes when the driver attempts to fall back to standard messaging
which is clearly out-of-spec behavior.
To work around this, the new SCMI quirk framework is used to
unconditionally enable FC initialization for this firmware version.
In the future, once the fixed firmware version is identified, an upper
version bound can be added to the quirk match criteria. Alternatively,
matching can be further restricted using a SoC-specific compatible string
if always enabling FC proves problematic elsewhere.
3. Support for NXP i.MX LMM/CPU vendor protocol extensions
The i.MX95 System Manager (SM) implements Logical Machine Management (LMM)
and a CPU protocol to manage Logical Machines (LM) and CPUs (e.g., M7).
These changes integrate the vendor-specific protocol extensions
implementing the LMM and CPU protocols for the i.MX95, facilitating
standardized communication between the operating system and the platform's
firmware, which will be used by remoteproc drivers. The changes also
include the necessary device tree bindings.
4. Miscellaneous cleanups/changes
These mainly include polling support in SCMI raw mode. The cleanups
centralize error logging for SCMI device creation into a single helper
function, consolidate the device matching logic into a single function, and
ensure that devices must have a name for registration—removing support for
unnamed devices when matching drivers and devices for probing. Transport
devices are now excluded from bus matching, and the correct assignment of
the parent device for the arm-scmi platform device is ensured in the
transport drivers.
* tag 'scmi-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: quirk: Force perf level get fastchannel
firmware: arm_scmi: quirk: Fix CLOCK_DESCRIBE_RATES triplet
firmware: arm_scmi: Add common framework to handle firmware quirks
firmware: arm_scmi: Ensure that the message-id supports fastchannel
MAINTAINERS: add entry for i.MX SCMI extensions
firmware: imx: Add i.MX95 SCMI CPU driver
firmware: imx: Add i.MX95 SCMI LMM driver
firmware: arm_scmi: imx: Add i.MX95 CPU Protocol
firmware: arm_scmi: imx: Add i.MX95 LMM protocol
dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocol
firmware: arm_scmi: imx: Add LMM and CPU documentation
firmware: arm_scmi: Add polling support to raw mode
firmware: arm_scmi: Exclude transport devices from bus matching
firmware: arm_scmi: Assign correct parent to arm-scmi platform device
firmware: arm_scmi: Refactor error logging from SCMI device creation to single helper
firmware: arm_scmi: Refactor device matching logic to eliminate duplication
firmware: arm_scmi: Ensure scmi_devices are always matched by name as well
Link: https://lore.kernel.org/r/20250507134713.49039-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
0d57ac1f92 |
SoCFPGA DTS updates for v6.15
- Updates to dt-bindings
- Document Agilex5 NAND daughter board
- Convert Stratix10 FPGA Manager to json-schema
- Convert Stratix10 Service Layer to json-schema
- Add document for Terasic's DE10-nano board
- Add support for Agilex5 NAND daughter board
- Add basic support for Terasic's DE10-nano board
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Merge tag 'socfpga_dts_updates_for_v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt
SoCFPGA DTS updates for v6.15
- Updates to dt-bindings
- Document Agilex5 NAND daughter board
- Convert Stratix10 FPGA Manager to json-schema
- Convert Stratix10 Service Layer to json-schema
- Add document for Terasic's DE10-nano board
- Add support for Agilex5 NAND daughter board
- Add basic support for Terasic's DE10-nano board
* tag 'socfpga_dts_updates_for_v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: socfpga: agilex: Add dma channel id for spi
arm64: dts: socfpga: agilex5: add led and memory nodes
arm64: dts: intel: socfpga_agilex: add frequencies to internal oscillators
ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
dt-bindings: altera: Add compatible for Terasic's DE10-nano
arm64: dts: socfpga: agilex5: add qspi flash node
dt-bindings: firmware: stratix10: Convert to json-schema
dt-bindings: fpga: stratix10: Convert to json-schema
arm64: dts: socfpga: agilex5: fix gpio0 address
arm64: dts: socfpga: agilex5: add NAND daughter board
dt-bindings: intel: document Agilex5 NAND daughter board
Link: https://lore.kernel.org/r/20250326121152.1739873-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Peng Fan
|
73b7a51b74 |
dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocol
Add i.MX SCMI Extension protocols bindings for: - Logic Machine Management(LMM) Protocol intended for boot, shutdown, and reset of other logical machines (LM). It is usually used to allow one LM to manager another used as an offload or accelerator engine.. - CPU Protocol. allows an agent to start or stop a CPU. It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an AP cluster). Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-Id: <20250408-imx-lmm-cpu-v4-2-4c5f4a456e49@nxp.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
||
|
André Draszik
|
935e5bd95d |
dt-bindings: firmware: google,gs101-acpm-ipc: add PMIC child node
The PMIC is supposed to be a child of ACPM, add it here to describe the connection. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20250409-s2mpg10-v4-3-d66d5f39b6bf@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Linus Torvalds
|
a9fc230497 |
soc: driver updates for 6.15, part 1
These are the updates for SoC specific drivers and related subsystems:
- Firmware driver updates for SCMI, FF-A and SMCCC firmware interfaces,
adding support for additional firmware features including SoC
identification and FF-A SRI callbacks as well as various bugfixes
- Memory controller updates for Nvidia and Mediatek
- Reset controller support for microchip sam9x7 and imx8qxp/imx8qm
- New hardware support for multiple Mediatek, Renesas and Samsung Exynos chips
- Minor updates on Zynq, Qualcomm, Amlogic, TI, Samsung, Nvidia and Apple chips
There will be a follow up with a few more driver updates that are still
causing build regressions at the moment.
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Merge tag 'soc-drivers-6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"These are the updates for SoC specific drivers and related subsystems:
- Firmware driver updates for SCMI, FF-A and SMCCC firmware
interfaces, adding support for additional firmware features
including SoC identification and FF-A SRI callbacks as well as
various bugfixes
- Memory controller updates for Nvidia and Mediatek
- Reset controller support for microchip sam9x7 and imx8qxp/imx8qm
- New hardware support for multiple Mediatek, Renesas and Samsung
Exynos chips
- Minor updates on Zynq, Qualcomm, Amlogic, TI, Samsung, Nvidia and
Apple chips
There will be a follow up with a few more driver updates that are
still causing build regressions at the moment"
* tag 'soc-drivers-6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (97 commits)
irqchip: Add support for Amlogic A4 and A5 SoCs
dt-bindings: interrupt-controller: Add support for Amlogic A4 and A5 SoCs
reset: imx: fix incorrect module device table
dt-bindings: power: qcom,kpss-acc-v2: add qcom,msm8916-acc compatible
bus: qcom-ssc-block-bus: Fix the error handling path of qcom_ssc_block_bus_probe()
bus: qcom-ssc-block-bus: Remove some duplicated iounmap() calls
soc: qcom: pd-mapper: Add support for SDM630/636
reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QM
dt-bindings: firmware: imx: add property reset-controller
dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7
memory: mtk-smi: Add ostd setting for mt8192
dt-bindings: soc: samsung: exynos-usi: Drop unnecessary status from example
firmware: tegra: bpmp: Fix typo in bpmp-abi.h
soc/tegra: pmc: Use str_enable_disable-like helpers
soc: samsung: include linux/array_size.h where needed
firmware: arm_scmi: use ioread64() instead of ioread64_hi_lo()
soc: mediatek: mtk-socinfo: Add extra entry for MT8395AV/ZA Genio 1200
soc: mediatek: mt8188-mmsys: Add support for DSC on VDO0
soc: mediatek: mmsys: Migrate all tables to MMSYS_ROUTE() macro
soc: mediatek: mt8365-mmsys: Fix routing table masks and values
...
|
||
|
Mahesh Rao
|
fbfb649870 |
dt-bindings: firmware: stratix10: Convert to json-schema
Convert intel,stratix10-svc service layer devicetree binding file from freeform format to json-schema. Also added DT binding for optional stratix10-soc FPGA manager child node. Signed-off-by: Mahesh Rao <mahesh.rao@intel.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
||
|
Arnd Bergmann
|
29759d2729 |
Reset controller updates for v6.15
* Add missing microchip,sam9x7-rstc compatible to device tree binding documentation. * Add SCU reset driver for i.MX8QXP and i.MX8QM. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCZ9RbMRcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwHn0AP9GbWMXwwnx+DKAMYMjeErygVLD q4bAm8h+pqNylxCqngD9HrqzJ5/gbbqMnLJifaBtCutXf4aR2iDzH/uGa1tnewA= =LC08 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmfbPIwACgkQYKtH/8kJ UicNug//cJx5XBsSAzRGDhQhQXBZnw28LS5EceuoAgIZFCTMOU8SafTCjSwj26xv nL6vNqtPGTZc8RrvM2XC457ptDuxKOoNEL8xYYxyIgRu1ZxVzTKS8eo76dY0FiIX kphglhHMR8IPLYsiJIwNYkniqeE58O0jjtMHueSpWcJ6b3MD9wxSeRBA3iSn6j5/ lgQolkHfUZ3+mAyAUdVM1eVtQKGRK97h5et7Q3/Jtk6RyAfu2xtke7ARMudmOfXc DuCRv851pe7zB6trwvAxbldO+62ip6fQ9LKPWA5Mx8MMOH9aLS7kE5jHwEGHdFdv VMcyktyDagzHKtug7KZRjUnhnbTQR+KmoVgU1UbK0AcZC5P9ujmzD9pia5B7Cl1F norarbymUyLs/QJDfnChWRm3VOsKDsO/Tz0yKDgJ9P2uvZwteb6BREHPxgF9oCEC QK7poFnIVvQC+Bjc+P+R10jna37PA3uD+88E8QxKeqGjGrYIfZuIyn/MYdjIM/CI +hOCKqnqOOlDV2+OSdzAccGvEyHpnGLlcHw8jYIk2gjZ8MjWm6llcWS22UPi6Ze2 xtUD2JxaWc4dNK0Ea8wwXcQk01HpS7xZxAVD2p6OCSKWjVSDsd8JDjdJL1UI5e7m MJ0+Y0mm2nxld/zCKH8DRtYTAz8mde7aAKLnLLQ6VTF8q/cVQ8o= =KKCI -----END PGP SIGNATURE----- Merge tag 'reset-for-v6.15' of git://git.pengutronix.de/pza/linux into soc/drivers Reset controller updates for v6.15 * Add missing microchip,sam9x7-rstc compatible to device tree binding documentation. * Add SCU reset driver for i.MX8QXP and i.MX8QM. * tag 'reset-for-v6.15' of git://git.pengutronix.de/pza/linux: reset: imx: fix incorrect module device table reset: imx: Add SCU reset driver for i.MX8QXP and i.MX8QM dt-bindings: firmware: imx: add property reset-controller dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7 Link: https://lore.kernel.org/r/20250314164406.744117-1-p.zabel@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Michal Wilczynski
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fe59b03954 |
dt-bindings: firmware: thead,th1520: Add support for firmware node
The kernel communicates with the E902 core through the mailbox transport using AON firmware protocol. Add dt-bindings to document it the dt node. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Acked-by: Drew Fustini <drew@pdp7.com> Link: https://lore.kernel.org/r/20250311171900.1549916-2-m.wilczynski@samsung.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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Frank Li
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778752759b |
dt-bindings: firmware: imx: add property reset-controller
System Controller Firmware(SCU) reset some peripherals, such as CSI. So add reset-controller for it. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250210-8qxp_camera-v3-1-324f5105accc@nxp.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Tudor Ambarus
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97b9ee2972 |
dt-bindings: firmware: add google,gs101-acpm-ipc
Add bindings for the Samsung Exynos ACPM mailbox protocol. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250213-gs101-acpm-v9-1-8b0281b93c8b@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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Manikanta Mylavarapu
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6cf5e9a6d2 |
dt-bindings: firmware: qcom,scm: Document ipq5424 SCM
Document the scm compatible for ipq5424 SoC. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241204133627.1341760-2-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> |