dt-bindings: soc: ti,omap-dmm: Convert to DT schema

Convert the TI OMAP Dynamic Memory Manager (DMM) dt binding
from text format to DT schema.

During conversion following changes were made:
- Move file from /bindings/arm/omap to /bindings/soc/ti/
- Make the 'ti,hwmods' property optional and mark it deprecated as it is
  no longer used, it is kept to support legacy dtbs.
- Add the missing required property 'interrupts' to example node.

Signed-off-by: Bhargav Joshi <j.bhargav.u@gmail.com>
Link: https://patch.msgid.link/20260605-ti-omap-dmm-v2-1-1b460742ec83@gmail.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
This commit is contained in:
Bhargav Joshi 2026-06-05 09:07:26 +05:30 committed by Rob Herring (Arm)
parent e1686ca81d
commit ffda432eb1
2 changed files with 53 additions and 22 deletions

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OMAP Dynamic Memory Manager (DMM) bindings
The dynamic memory manager (DMM) is a module located immediately in front of the
SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
accesses such as priority generation amongst initiators, configuration of SDRAM
interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
translation for initiators which need contiguous dma bus addresses.
Required properties:
- compatible: Should contain "ti,omap4-dmm" for OMAP4 family
Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
- reg: Contains DMM register address range (base address and length)
- interrupts: Should contain an interrupt-specifier for DMM_IRQ.
- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm"
Example:
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
ti,hwmods = "dmm";
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/ti/ti,omap-dmm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: OMAP Dynamic Memory Manager (DMM)
maintainers:
- Bhargav Joshi <j.bhargav.u@gmail.com>
description:
The dynamic memory manager (DMM) is a module located immediately in front of
the SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of
memory accesses such as priority generation amongst initiators, configuration
of SDRAM interleaving, optimizing transfer of 2D block objects, and provide
MMU-like page translation for initiators which need contiguous dma bus
addresses.
properties:
compatible:
enum:
- ti,omap4-dmm
- ti,omap5-dmm
reg:
maxItems: 1
interrupts:
maxItems: 1
ti,hwmods:
$ref: /schemas/types.yaml#/definitions/string
description: Name of the hwmod associated to DMM, which is typically "dmm"
deprecated: true
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "dmm";
};