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riscv: dts: microchip: add can resets to mpfs

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The can IP on PolarFire SoC requires the use of the blocks reset
during normal operation, and the property is therefore required by the
binding, causing a warning on the m100pfsevp board where it is default
enabled:
mpfs-m100pfsevp.dtb: can@2010c000 (microchip,mpfs-can): 'resets' is a required property
Add the reset to both can nodes.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Conor Dooley 2026-01-28 20:50:33 +00:00
parent 5a741f8cc6
commit ff4b6bf7ee
1 changed files with 2 additions and 0 deletions
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2
arch/riscv/boot/dts/microchip/mpfs.dtsi
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@ -425,6 +425,7 @@ can0: can@2010c000 {
clocks = <&clkcfg CLK_CAN0>, <&clkcfg CLK_MSSPLL3>;
interrupt-parent = <&plic>;
interrupts = <56>;
resets = <&mss_top_sysreg CLK_CAN0>;
status = "disabled";
};
@ -434,6 +435,7 @@ can1: can@2010d000 {
clocks = <&clkcfg CLK_CAN1>, <&clkcfg CLK_MSSPLL3>;
interrupt-parent = <&plic>;
interrupts = <57>;
resets = <&mss_top_sysreg CLK_CAN1>;
status = "disabled";
};