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net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP
MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU frames (further restricted by PCR_MATRIX). Currently the driver sets the first CPU port as the single port in this bit mask, which works fine regardless of whether the device tree defines port 5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's logic of picking the first CPU port as the CPU port that all user ports are affine to, by default. An upcoming change would like to influence DSA's selection of the default CPU port to no longer be the first one, and in that case, this logic needs adaptation. Since there is no observed leakage or duplication of frames if all CPU ports are defined in this bit mask, simply include them all. Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk> Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1010,6 +1010,13 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port)
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if (priv->id == ID_MT7621)
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mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
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/* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
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* the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
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* is affine to the inbound user port.
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*/
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if (priv->id == ID_MT7531 || priv->id == ID_MT7988)
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mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));
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/* CPU port gets connected to all user ports of
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* the switch.
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*/
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@ -2352,15 +2359,9 @@ static int
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mt7531_setup_common(struct dsa_switch *ds)
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{
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struct mt7530_priv *priv = ds->priv;
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struct dsa_port *cpu_dp;
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int ret, i;
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/* BPDU to CPU port */
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dsa_switch_for_each_cpu_port(cpu_dp, ds) {
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mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
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BIT(cpu_dp->index));
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break;
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}
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/* Trap BPDUs to the CPU port(s) */
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mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK,
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MT753X_BPDU_CPU_ONLY);
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@ -54,6 +54,7 @@ enum mt753x_id {
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#define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK)
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#define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16)
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#define MT7531_CPU_PMAP_MASK GENMASK(7, 0)
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#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x)
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#define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \
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MT7531_CFC : MT7530_MFC)
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