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soc: qcom: geni-se: Update Tx and Rx fifo depth based on QUP HW version

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From QUP HW Version 3.10 and above the Tx and Rx
fifo depth bits are increased to 23:16 bits from
21:16 bits in SE_HW_PARAM registers accomodating
256bytes of fifo depth.

Updated geni_se_get_tx_fifo_depth and
geni_se_get_rx_fifo_depth to retrieve right fifo
depth based on QUP HW version.

Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230215050528.9507-1-quic_vtanuku@quicinc.com
This commit is contained in:
Visweswara Tanuku 2023-02-14 21:05:28 -08:00 committed by Bjorn Andersson
parent 112d96fd29
commit fe8aa1ba07
1 changed files with 36 additions and 6 deletions
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42
include/linux/soc/qcom/geni-se.h
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@ -245,12 +245,22 @@ struct geni_se {
/* SE_HW_PARAM_0 fields */
#define TX_FIFO_WIDTH_MSK GENMASK(29, 24)
#define TX_FIFO_WIDTH_SHFT 24
/*
* For QUP HW Version >= 3.10 Tx fifo depth support is increased
* to 256bytes and corresponding bits are 16 to 23
*/
#define TX_FIFO_DEPTH_MSK_256_BYTES GENMASK(23, 16)
#define TX_FIFO_DEPTH_MSK GENMASK(21, 16)
#define TX_FIFO_DEPTH_SHFT 16
/* SE_HW_PARAM_1 fields */
#define RX_FIFO_WIDTH_MSK GENMASK(29, 24)
#define RX_FIFO_WIDTH_SHFT 24
/*
* For QUP HW Version >= 3.10 Rx fifo depth support is increased
* to 256bytes and corresponding bits are 16 to 23
*/
#define RX_FIFO_DEPTH_MSK_256_BYTES GENMASK(23, 16)
#define RX_FIFO_DEPTH_MSK GENMASK(21, 16)
#define RX_FIFO_DEPTH_SHFT 16
@ -391,7 +401,8 @@ static inline void geni_se_abort_s_cmd(struct geni_se *se)
/**
* geni_se_get_tx_fifo_depth() - Get the TX fifo depth of the serial engine
* @se: Pointer to the concerned serial engine.
* based on QUP HW version
* @se: Pointer to the concerned serial engine.
*
* This function is used to get the depth i.e. number of elements in the
* TX fifo of the serial engine.
@ -400,11 +411,20 @@ static inline void geni_se_abort_s_cmd(struct geni_se *se)
*/
static inline u32 geni_se_get_tx_fifo_depth(struct geni_se *se)
{
u32 val;
u32 val, hw_version, hw_major, hw_minor, tx_fifo_depth_mask;
hw_version = geni_se_get_qup_hw_version(se);
hw_major = GENI_SE_VERSION_MAJOR(hw_version);
hw_minor = GENI_SE_VERSION_MINOR(hw_version);
if ((hw_major == 3 && hw_minor >= 10) || hw_major > 3)
tx_fifo_depth_mask = TX_FIFO_DEPTH_MSK_256_BYTES;
else
tx_fifo_depth_mask = TX_FIFO_DEPTH_MSK;
val = readl_relaxed(se->base + SE_HW_PARAM_0);
return (val & TX_FIFO_DEPTH_MSK) >> TX_FIFO_DEPTH_SHFT;
return (val & tx_fifo_depth_mask) >> TX_FIFO_DEPTH_SHFT;
}
/**
@ -427,7 +447,8 @@ static inline u32 geni_se_get_tx_fifo_width(struct geni_se *se)
/**
* geni_se_get_rx_fifo_depth() - Get the RX fifo depth of the serial engine
* @se: Pointer to the concerned serial engine.
* based on QUP HW version
* @se: Pointer to the concerned serial engine.
*
* This function is used to get the depth i.e. number of elements in the
* RX fifo of the serial engine.
@ -436,11 +457,20 @@ static inline u32 geni_se_get_tx_fifo_width(struct geni_se *se)
*/
static inline u32 geni_se_get_rx_fifo_depth(struct geni_se *se)
{
u32 val;
u32 val, hw_version, hw_major, hw_minor, rx_fifo_depth_mask;
hw_version = geni_se_get_qup_hw_version(se);
hw_major = GENI_SE_VERSION_MAJOR(hw_version);
hw_minor = GENI_SE_VERSION_MINOR(hw_version);
if ((hw_major == 3 && hw_minor >= 10) || hw_major > 3)
rx_fifo_depth_mask = RX_FIFO_DEPTH_MSK_256_BYTES;
else
rx_fifo_depth_mask = RX_FIFO_DEPTH_MSK;
val = readl_relaxed(se->base + SE_HW_PARAM_1);
return (val & RX_FIFO_DEPTH_MSK) >> RX_FIFO_DEPTH_SHFT;
return (val & rx_fifo_depth_mask) >> RX_FIFO_DEPTH_SHFT;
}
void geni_se_init(struct geni_se *se, u32 rx_wm, u32 rx_rfr);