From e46da64f333ede33adc3a1903821a73ed6c018a6 Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:40 +0530 Subject: [PATCH 1/9] ASoC: SOF: amd: remove else condition in resume sequence Else condition is not required after break/return statement. Remove else condition in resume callback. Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-2-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index 7c6d647fa253..30c03a221513 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -637,9 +637,9 @@ int amd_sof_acp_resume(struct snd_sof_dev *sdev) return ret; } return acp_memory_init(sdev); - } else { - return acp_dsp_reset(sdev); } + + return acp_dsp_reset(sdev); } EXPORT_SYMBOL_NS(amd_sof_acp_resume, "SND_SOC_SOF_AMD_COMMON"); From 7c2bad7b95db5b4b978853cd4dd042ae3ec83e63 Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:41 +0530 Subject: [PATCH 2/9] ASoC: SOF: amd: add missing acp descriptor field Add missing acp descriptor field acp_error_stat for ACP7.0 platform. Fixes: 490be7ba2a01 ("ASoC: SOF: amd: add support for acp7.0 based platform") Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-3-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/pci-acp70.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/sof/amd/pci-acp70.c b/sound/soc/sof/amd/pci-acp70.c index 8fa1170a2161..9108f1139ff2 100644 --- a/sound/soc/sof/amd/pci-acp70.c +++ b/sound/soc/sof/amd/pci-acp70.c @@ -33,6 +33,7 @@ static const struct sof_amd_acp_desc acp70_chip_info = { .ext_intr_cntl = ACP70_EXTERNAL_INTR_CNTL, .ext_intr_stat = ACP70_EXT_INTR_STAT, .ext_intr_stat1 = ACP70_EXT_INTR_STAT1, + .acp_error_stat = ACP70_ERROR_STATUS, .dsp_intr_base = ACP70_DSP_SW_INTR_BASE, .acp_sw0_i2s_err_reason = ACP7X_SW0_I2S_ERROR_REASON, .sram_pte_offset = ACP70_SRAM_PTE_OFFSET, From 451bd0e7b91c83f817b741557c9be0f133d3836d Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:42 +0530 Subject: [PATCH 3/9] ASoC: SOF: amd: add ACP7.1 platform support Add SOF support for ACP7.1 platform. Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-4-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/Kconfig | 6 +++--- sound/soc/sof/amd/acp.c | 10 +++++++++- sound/soc/sof/amd/acp.h | 1 + sound/soc/sof/amd/pci-acp70.c | 7 ++++++- 4 files changed, 19 insertions(+), 5 deletions(-) diff --git a/sound/soc/sof/amd/Kconfig b/sound/soc/sof/amd/Kconfig index 3ea82fa72e35..984132f32a21 100644 --- a/sound/soc/sof/amd/Kconfig +++ b/sound/soc/sof/amd/Kconfig @@ -94,13 +94,13 @@ config SND_SOC_SOF_AMD_ACP63 If unsure select "N". config SND_SOC_SOF_AMD_ACP70 - tristate "SOF support for ACP7.0 platform" + tristate "SOF support for ACP7.0/ACP7.1 platforms" depends on SND_SOC_SOF_PCI depends on AMD_NODE select SND_SOC_SOF_AMD_COMMON help Select this option for SOF support on - AMD ACP7.0 version based platforms. - Say Y if you want to enable SOF on ACP7.0 based platform. + AMD ACP7.0/ACP7.1 version based platforms. + Say Y if you want to enable SOF on ACP7.0/ACP7.1 based platforms. endif diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index 30c03a221513..ead31aee5e6f 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -58,6 +58,7 @@ static void init_dma_descriptor(struct acp_dev_data *adata) switch (acp_data->pci_rev) { case ACP70_PCI_ID: + case ACP71_PCI_ID: acp_dma_desc_base_addr = ACP70_DMA_DESC_BASE_ADDR; acp_dma_desc_max_num_dscr = ACP70_DMA_DESC_MAX_NUM_DSCR; break; @@ -97,6 +98,7 @@ static int config_dma_channel(struct acp_dev_data *adata, unsigned int ch, switch (acp_data->pci_rev) { case ACP70_PCI_ID: + case ACP71_PCI_ID: acp_dma_cntl_0 = ACP70_DMA_CNTL_0; acp_dma_ch_rst_sts = ACP70_DMA_CH_RST_STS; acp_dma_dscr_err_sts_0 = ACP70_DMA_ERR_STS_0; @@ -336,6 +338,7 @@ int acp_dma_status(struct acp_dev_data *adata, unsigned char ch) switch (adata->pci_rev) { case ACP70_PCI_ID: + case ACP71_PCI_ID: acp_dma_ch_sts = ACP70_DMA_CH_STS; break; default: @@ -486,6 +489,7 @@ static int acp_power_on(struct snd_sof_dev *sdev) acp_pgfsm_cntl_mask = ACP6X_PGFSM_CNTL_POWER_ON_MASK; break; case ACP70_PCI_ID: + case ACP71_PCI_ID: acp_pgfsm_status_mask = ACP70_PGFSM_STATUS_MASK; acp_pgfsm_cntl_mask = ACP70_PGFSM_CNTL_POWER_ON_MASK; break; @@ -616,8 +620,12 @@ int amd_sof_acp_suspend(struct snd_sof_dev *sdev, u32 target_state) dev_err(sdev->dev, "ACP Reset failed\n"); return ret; } - if (acp_data->pci_rev == ACP70_PCI_ID) + switch (acp_data->pci_rev) { + case ACP70_PCI_ID: + case ACP71_PCI_ID: enable = true; + break; + } snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, enable); return 0; diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index d084db34eed8..86acd43f707e 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -74,6 +74,7 @@ #define ACP_RMB_PCI_ID 0x6F #define ACP63_PCI_ID 0x63 #define ACP70_PCI_ID 0x70 +#define ACP71_PCI_ID 0x71 #define HOST_BRIDGE_CZN 0x1630 #define HOST_BRIDGE_VGH 0x1645 diff --git a/sound/soc/sof/amd/pci-acp70.c b/sound/soc/sof/amd/pci-acp70.c index 9108f1139ff2..8816c323d69e 100644 --- a/sound/soc/sof/amd/pci-acp70.c +++ b/sound/soc/sof/amd/pci-acp70.c @@ -71,8 +71,13 @@ static int acp70_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_ { unsigned int flag; - if (pci->revision != ACP70_PCI_ID) + switch (pci->revision) { + case ACP70_PCI_ID: + case ACP71_PCI_ID: + break; + default: return -ENODEV; + } flag = snd_amd_acp_find_config(pci); if (flag != FLAG_AMD_SOF && flag != FLAG_AMD_SOF_ONLY_DMIC) From 8cc69ecbf195aaf90e8bd5f364ed10ec0bdecb5f Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:43 +0530 Subject: [PATCH 4/9] ASoC: SOF: amd: update soundwire specific acp descriptor fields Update SoundWire specific acp descriptor structure fields for ACP7.0 & ACP7.1 platforms. Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-5-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp.h | 2 ++ sound/soc/sof/amd/pci-acp70.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 86acd43f707e..097454f2b48b 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -110,9 +110,11 @@ #define ACP_SDW0_IRQ_MASK BIT(21) #define ACP_SDW1_IRQ_MASK BIT(2) #define SDW_ACPI_ADDR_ACP63 5 +#define SDW_ACPI_ADDR_ACP70 SDW_ACPI_ADDR_ACP63 #define ACP_DEFAULT_SRAM_LENGTH 0x00080000 #define ACP_SRAM_PAGE_COUNT 128 #define ACP6X_SDW_MAX_MANAGER_COUNT 2 +#define ACP70_SDW_MAX_MANAGER_COUNT ACP6X_SDW_MAX_MANAGER_COUNT enum clock_source { ACP_CLOCK_96M = 0, diff --git a/sound/soc/sof/amd/pci-acp70.c b/sound/soc/sof/amd/pci-acp70.c index 8816c323d69e..c4db21668252 100644 --- a/sound/soc/sof/amd/pci-acp70.c +++ b/sound/soc/sof/amd/pci-acp70.c @@ -40,6 +40,8 @@ static const struct sof_amd_acp_desc acp70_chip_info = { .hw_semaphore_offset = ACP70_AXI2DAGB_SEM_0, .fusion_dsp_offset = ACP70_DSP_FUSION_RUNSTALL, .probe_reg_offset = ACP70_FUTURE_REG_ACLK_0, + .sdw_max_link_count = ACP70_SDW_MAX_MANAGER_COUNT, + .sdw_acpi_dev_addr = SDW_ACPI_ADDR_ACP70, .reg_start_addr = ACP70_REG_START, .reg_end_addr = ACP70_REG_END, }; From cc489cced17b2e32170ee87a3b64aaa3c7c6fddb Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:44 +0530 Subject: [PATCH 5/9] ASoC: SOF: amd: enable ACP_PME_EN register for ACP7.0 & ACP7.1 platforms As per design flow for ACP7.0 & ACP7.1 platforms, enable ACP_PME_EN register for below scenarios. 1. During acp init sequence 2. During resume sequence for SoundWire ClockStop power mode. Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-6-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp-dsp-offset.h | 1 + sound/soc/sof/amd/acp.c | 19 ++++++++++++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/sound/soc/sof/amd/acp-dsp-offset.h b/sound/soc/sof/amd/acp-dsp-offset.h index ecdcae07ace7..414151187b44 100644 --- a/sound/soc/sof/amd/acp-dsp-offset.h +++ b/sound/soc/sof/amd/acp-dsp-offset.h @@ -130,4 +130,5 @@ #define ACP_SW0_EN 0x3000 #define ACP_SW1_EN 0x3C00 +#define ACP70_PME_EN 0x1400 #endif diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index ead31aee5e6f..615ed7ff3846 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -570,9 +570,11 @@ static int acp_dsp_reset(struct snd_sof_dev *sdev) static int acp_init(struct snd_sof_dev *sdev) { + struct acp_dev_data *acp_data; int ret; /* power on */ + acp_data = sdev->pdata->hw_pdata; ret = acp_power_on(sdev); if (ret) { dev_err(sdev->dev, "ACP power on failed\n"); @@ -581,7 +583,16 @@ static int acp_init(struct snd_sof_dev *sdev) snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, 0x01); /* Reset */ - return acp_reset(sdev); + ret = acp_reset(sdev); + if (ret) + return ret; + switch (acp_data->pci_rev) { + case ACP70_PCI_ID: + case ACP71_PCI_ID: + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP70_PME_EN, 1); + break; + } + return 0; } static bool check_acp_sdw_enable_status(struct snd_sof_dev *sdev) @@ -646,6 +657,12 @@ int amd_sof_acp_resume(struct snd_sof_dev *sdev) } return acp_memory_init(sdev); } + switch (acp_data->pci_rev) { + case ACP70_PCI_ID: + case ACP71_PCI_ID: + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP70_PME_EN, 1); + break; + } return acp_dsp_reset(sdev); } From 169c5e444bb9cd4ae770f54157a04fdd8569508a Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:45 +0530 Subject: [PATCH 6/9] ASoC: SOF: amd: refactor acp reset sequence Below mentioned register sequence should be part of acp init sequence. 1) Set ACP clock mux selection register to ACP_ACLK clock source. 2) Enable ACP global interrupt enable register 3) Enable ACP error interrupt mask. ACP reset sequence should contain code related to asserting acp soft reset and release the soft reset. Move the rest of the registers programming to acp init sequence. Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-7-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index 615ed7ff3846..2ad5fbf43c8a 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -511,7 +511,6 @@ static int acp_power_on(struct snd_sof_dev *sdev) static int acp_reset(struct snd_sof_dev *sdev) { - const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); unsigned int val; int ret; @@ -532,14 +531,6 @@ static int acp_reset(struct snd_sof_dev *sdev) if (ret < 0) dev_err(sdev->dev, "timeout in releasing reset\n"); - if (desc->acp_clkmux_sel) - snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_clkmux_sel, ACP_CLOCK_ACLK); - - if (desc->ext_intr_enb) - snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_enb, 0x01); - - if (desc->ext_intr_cntl) - snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_cntl, ACP_ERROR_IRQ_MASK); return ret; } @@ -570,6 +561,7 @@ static int acp_dsp_reset(struct snd_sof_dev *sdev) static int acp_init(struct snd_sof_dev *sdev) { + const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); struct acp_dev_data *acp_data; int ret; @@ -586,6 +578,16 @@ static int acp_init(struct snd_sof_dev *sdev) ret = acp_reset(sdev); if (ret) return ret; + + if (desc->acp_clkmux_sel) + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_clkmux_sel, ACP_CLOCK_ACLK); + + if (desc->ext_intr_enb) + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_enb, 0x01); + + if (desc->ext_intr_cntl) + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_cntl, ACP_ERROR_IRQ_MASK); + switch (acp_data->pci_rev) { case ACP70_PCI_ID: case ACP71_PCI_ID: From a536f3c51edb63900b3340978d38da3aabc1fb2f Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:46 +0530 Subject: [PATCH 7/9] ASoC: SOF: amd: enable soundwire host wake irq mask Enable SoundWire host wake interrupt mask during acp init sequence based on wake enable checks for each SoundWire manager instance for ACP7.0 & ACP7.1 platforms. Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-8-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp-dsp-offset.h | 5 +++++ sound/soc/sof/amd/acp.c | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/sound/soc/sof/amd/acp-dsp-offset.h b/sound/soc/sof/amd/acp-dsp-offset.h index 414151187b44..e77554f74c20 100644 --- a/sound/soc/sof/amd/acp-dsp-offset.h +++ b/sound/soc/sof/amd/acp-dsp-offset.h @@ -131,4 +131,9 @@ #define ACP_SW0_EN 0x3000 #define ACP_SW1_EN 0x3C00 #define ACP70_PME_EN 0x1400 +#define ACP70_EXTERNAL_INTR_CNTL1 0x1A08 +#define ACP70_SW0_WAKE_EN 0x1458 +#define ACP70_SW1_WAKE_EN 0x1460 +#define ACP70_SDW_HOST_WAKE_MASK 0x0C00000 + #endif diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index 2ad5fbf43c8a..d62ba4f75e4f 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -563,6 +563,7 @@ static int acp_init(struct snd_sof_dev *sdev) { const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); struct acp_dev_data *acp_data; + unsigned int sdw0_wake_en, sdw1_wake_en; int ret; /* power on */ @@ -591,6 +592,12 @@ static int acp_init(struct snd_sof_dev *sdev) switch (acp_data->pci_rev) { case ACP70_PCI_ID: case ACP71_PCI_ID: + sdw0_wake_en = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP70_SW0_WAKE_EN); + sdw1_wake_en = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP70_SW1_WAKE_EN); + if (sdw0_wake_en || sdw1_wake_en) + snd_sof_dsp_update_bits(sdev, ACP_DSP_BAR, ACP70_EXTERNAL_INTR_CNTL1, + ACP70_SDW_HOST_WAKE_MASK, ACP70_SDW_HOST_WAKE_MASK); + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP70_PME_EN, 1); break; } From 1f41bf67bfe3721a4d4d36695302801cf70b5a70 Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:47 +0530 Subject: [PATCH 8/9] ASoC: SOF: amd: add soundwire wake irq handling Add SoundWire wake interrupt handling for ACP7.0 & ACP7.1 platforms. Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-9-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/acp-dsp-offset.h | 4 ++ sound/soc/sof/amd/acp.c | 73 +++++++++++++++++++++++++++++- sound/soc/sof/amd/acp.h | 4 ++ 3 files changed, 79 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/amd/acp-dsp-offset.h b/sound/soc/sof/amd/acp-dsp-offset.h index e77554f74c20..08583a91afbc 100644 --- a/sound/soc/sof/amd/acp-dsp-offset.h +++ b/sound/soc/sof/amd/acp-dsp-offset.h @@ -135,5 +135,9 @@ #define ACP70_SW0_WAKE_EN 0x1458 #define ACP70_SW1_WAKE_EN 0x1460 #define ACP70_SDW_HOST_WAKE_MASK 0x0C00000 +#define ACP70_SDW0_HOST_WAKE_STAT BIT(24) +#define ACP70_SDW1_HOST_WAKE_STAT BIT(25) +#define ACP70_SDW0_PME_STAT BIT(26) +#define ACP70_SDW1_PME_STAT BIT(27) #endif diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index d62ba4f75e4f..ec904482a294 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -386,6 +386,69 @@ static int acp_memory_init(struct snd_sof_dev *sdev) return 0; } +static void amd_sof_handle_acp70_sdw_wake_event(struct acp_dev_data *adata) +{ + struct amd_sdw_manager *amd_manager; + + if (adata->acp70_sdw0_wake_event) { + amd_manager = dev_get_drvdata(&adata->sdw->pdev[0]->dev); + if (amd_manager) + pm_request_resume(amd_manager->dev); + adata->acp70_sdw0_wake_event = 0; + } + + if (adata->acp70_sdw1_wake_event) { + amd_manager = dev_get_drvdata(&adata->sdw->pdev[1]->dev); + if (amd_manager) + pm_request_resume(amd_manager->dev); + adata->acp70_sdw1_wake_event = 0; + } +} + +static int amd_sof_check_and_handle_acp70_sdw_wake_irq(struct snd_sof_dev *sdev) +{ + const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); + struct acp_dev_data *adata = sdev->pdata->hw_pdata; + u32 ext_intr_stat1; + int irq_flag = 0; + bool sdw_wake_irq = false; + + ext_intr_stat1 = snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->ext_intr_stat1); + if (ext_intr_stat1 & ACP70_SDW0_HOST_WAKE_STAT) { + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat1, + ACP70_SDW0_HOST_WAKE_STAT); + adata->acp70_sdw0_wake_event = true; + sdw_wake_irq = true; + } + + if (ext_intr_stat1 & ACP70_SDW1_HOST_WAKE_STAT) { + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat1, + ACP70_SDW1_HOST_WAKE_STAT); + adata->acp70_sdw1_wake_event = true; + sdw_wake_irq = true; + } + + if (ext_intr_stat1 & ACP70_SDW0_PME_STAT) { + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP70_SW0_WAKE_EN, 0); + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat1, ACP70_SDW0_PME_STAT); + adata->acp70_sdw0_wake_event = true; + sdw_wake_irq = true; + } + + if (ext_intr_stat1 & ACP70_SDW1_PME_STAT) { + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP70_SW1_WAKE_EN, 0); + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat1, ACP70_SDW1_PME_STAT); + adata->acp70_sdw1_wake_event = true; + sdw_wake_irq = true; + } + + if (sdw_wake_irq) { + amd_sof_handle_acp70_sdw_wake_event(adata); + irq_flag = 1; + } + return irq_flag; +} + static irqreturn_t acp_irq_thread(int irq, void *context) { struct snd_sof_dev *sdev = context; @@ -418,7 +481,7 @@ static irqreturn_t acp_irq_handler(int irq, void *dev_id) struct acp_dev_data *adata = sdev->pdata->hw_pdata; unsigned int base = desc->dsp_intr_base; unsigned int val; - int irq_flag = 0; + int irq_flag = 0, wake_irq_flag = 0; val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, base + DSP_SW_INTR_STAT_OFFSET); if (val & ACP_DSP_TO_HOST_IRQ) { @@ -456,8 +519,14 @@ static irqreturn_t acp_irq_handler(int irq, void *dev_id) schedule_work(&amd_manager->amd_sdw_irq_thread); irq_flag = 1; } + switch (adata->pci_rev) { + case ACP70_PCI_ID: + case ACP71_PCI_ID: + wake_irq_flag = amd_sof_check_and_handle_acp70_sdw_wake_irq(sdev); + break; + } } - if (irq_flag) + if (irq_flag || wake_irq_flag) return IRQ_HANDLED; else return IRQ_NONE; diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 097454f2b48b..d3c5b2386cdf 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -263,6 +263,10 @@ struct acp_dev_data { bool is_dram_in_use; bool is_sram_in_use; bool sdw_en_stat; + /* acp70_sdw0_wake_event flag set to true when wake irq asserted for SW0 instance */ + bool acp70_sdw0_wake_event; + /* acp70_sdw1_wake_event flag set to true when wake irq asserted for SW1 instance */ + bool acp70_sdw1_wake_event; unsigned int pci_rev; }; From e68074c63fded9468c513f65734ffb4c80dc2a6d Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Fri, 2 May 2025 21:12:48 +0530 Subject: [PATCH 9/9] ASoC: SOF: amd: add build support for soundwire Add build support for SoundWire for ACP7.0/ACP7.1 platforms. Signed-off-by: Vijendar Mukunda Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Link: https://patch.msgid.link/20250502154445.3008598-10-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- sound/soc/sof/amd/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/sof/amd/Kconfig b/sound/soc/sof/amd/Kconfig index 984132f32a21..05faf1c6d6fc 100644 --- a/sound/soc/sof/amd/Kconfig +++ b/sound/soc/sof/amd/Kconfig @@ -98,6 +98,7 @@ config SND_SOC_SOF_AMD_ACP70 depends on SND_SOC_SOF_PCI depends on AMD_NODE select SND_SOC_SOF_AMD_COMMON + select SND_SOC_SOF_AMD_SOUNDWIRE_LINK_BASELINE help Select this option for SOF support on AMD ACP7.0/ACP7.1 version based platforms.