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igc: move TXDCTL and RXDCTL related macros

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Move and consolidate TXDCTL and RXDCTL macros in preparation for
upcoming TXDCTL changes. This improves organization and readability.

Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Faizal Rahim <faizal.abdul.rahim@linux.intel.com>
Tested-by: Mor Bar-Gabay <morx.bar.gabay@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Faizal Rahim 2025-05-19 03:19:05 -04:00 committed by Tony Nguyen
parent 0097c4195b
commit fe4d9e8394
2 changed files with 10 additions and 9 deletions
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11
drivers/net/ethernet/intel/igc/igc.h
View File

@ -487,10 +487,19 @@ static inline u32 igc_rss_type(const union igc_adv_rx_desc *rx_desc)
*/
#define IGC_RX_PTHRESH 8
#define IGC_RX_HTHRESH 8
#define IGC_RX_WTHRESH 4
/* Ena specific Rx Queue */
#define IGC_RXDCTL_QUEUE_ENABLE 0x02000000
/* Receive Software Flush */
#define IGC_RXDCTL_SWFLUSH 0x04000000
#define IGC_TX_PTHRESH 8
#define IGC_TX_HTHRESH 1
#define IGC_RX_WTHRESH 4
#define IGC_TX_WTHRESH 16
/* Ena specific Tx Queue */
#define IGC_TXDCTL_QUEUE_ENABLE 0x02000000
/* Transmit Software Flush */
#define IGC_TXDCTL_SWFLUSH 0x04000000
#define IGC_RX_DMA_ATTR \
(DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)

8
drivers/net/ethernet/intel/igc/igc_base.h
View File

@ -86,14 +86,6 @@ union igc_adv_rx_desc {
} wb; /* writeback */
};
/* Additional Transmit Descriptor Control definitions */
#define IGC_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */
#define IGC_TXDCTL_SWFLUSH 0x04000000 /* Transmit Software Flush */
/* Additional Receive Descriptor Control definitions */
#define IGC_RXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Rx Queue */
#define IGC_RXDCTL_SWFLUSH 0x04000000 /* Receive Software Flush */
/* SRRCTL bit definitions */
#define IGC_SRRCTL_BSIZEPKT_MASK GENMASK(6, 0)
#define IGC_SRRCTL_BSIZEPKT(x) FIELD_PREP(IGC_SRRCTL_BSIZEPKT_MASK, \