mirror of
https://github.com/torvalds/linux.git
synced 2026-05-24 23:22:31 +02:00
Merge patch series "scsi: pm8001: Bug fix and cleanup"
Damien Le Moal <dlemoal@kernel.org> says: The first patch of this series fixes an issue with IRQ setup which prevents the controller from resuming after a system suspend. The following patches are code cleanup without any functional changes. [mkp: The first patch went into v6.6-rc2 and thus this merge constitutes the remaining patches of the series] Link: https://lore.kernel.org/r/20230911232745.325149-1-dlemoal@kernel.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
commit
fe15880f31
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@ -6073,7 +6073,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport)
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|||
phba->hba_debugfs_root,
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phba,
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&lpfc_debugfs_op_multixripools);
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if (!phba->debug_multixri_pools) {
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if (IS_ERR(phba->debug_multixri_pools)) {
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lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
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"0527 Cannot create debugfs multixripools\n");
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goto debug_failed;
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|
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@ -6085,7 +6085,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport)
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debugfs_create_file(name, S_IFREG | 0644,
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phba->hba_debugfs_root,
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phba, &lpfc_cgn_buffer_op);
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if (!phba->debug_cgn_buffer) {
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if (IS_ERR(phba->debug_cgn_buffer)) {
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lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
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"6527 Cannot create debugfs "
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"cgn_buffer\n");
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|
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@ -6098,7 +6098,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport)
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debugfs_create_file(name, S_IFREG | 0644,
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phba->hba_debugfs_root,
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phba, &lpfc_rx_monitor_op);
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if (!phba->debug_rx_monitor) {
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if (IS_ERR(phba->debug_rx_monitor)) {
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lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
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"6528 Cannot create debugfs "
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"rx_monitor\n");
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@ -6111,7 +6111,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport)
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debugfs_create_file(name, 0644,
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phba->hba_debugfs_root,
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phba, &lpfc_debugfs_ras_log);
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if (!phba->debug_ras_log) {
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if (IS_ERR(phba->debug_ras_log)) {
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lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
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"6148 Cannot create debugfs"
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" ras_log\n");
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@ -6132,7 +6132,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport)
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debugfs_create_file(name, S_IFREG | 0644,
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phba->hba_debugfs_root,
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phba, &lpfc_debugfs_op_lockstat);
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if (!phba->debug_lockstat) {
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if (IS_ERR(phba->debug_lockstat)) {
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lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
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"4610 Can't create debugfs lockstat\n");
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goto debug_failed;
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@ -6358,7 +6358,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport)
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debugfs_create_file(name, 0644,
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vport->vport_debugfs_root,
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vport, &lpfc_debugfs_op_scsistat);
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if (!vport->debug_scsistat) {
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if (IS_ERR(vport->debug_scsistat)) {
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lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
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"4611 Cannot create debugfs scsistat\n");
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goto debug_failed;
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@ -6369,7 +6369,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport)
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debugfs_create_file(name, 0644,
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vport->vport_debugfs_root,
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vport, &lpfc_debugfs_op_ioktime);
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if (!vport->debug_ioktime) {
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if (IS_ERR(vport->debug_ioktime)) {
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lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
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"0815 Cannot create debugfs ioktime\n");
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goto debug_failed;
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@ -199,11 +199,12 @@ lpfc_dev_loss_tmo_callbk(struct fc_rport *rport)
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/* Only 1 thread can drop the initial node reference. If
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* another thread has set NLP_DROPPED, this thread is done.
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*/
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if (!(ndlp->nlp_flag & NLP_DROPPED)) {
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if (!(ndlp->fc4_xpt_flags & NVME_XPT_REGD) &&
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!(ndlp->nlp_flag & NLP_DROPPED)) {
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ndlp->nlp_flag |= NLP_DROPPED;
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spin_unlock_irqrestore(&ndlp->lock, iflags);
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lpfc_nlp_put(ndlp);
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spin_lock_irqsave(&ndlp->lock, iflags);
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return;
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}
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spin_unlock_irqrestore(&ndlp->lock, iflags);
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|
|
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@ -228,8 +228,7 @@ lpfc_nvme_remoteport_delete(struct nvme_fc_remote_port *remoteport)
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spin_unlock_irq(&ndlp->lock);
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/* On a devloss timeout event, one more put is executed provided the
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* NVME and SCSI rport unregister requests are complete. If the vport
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* is unloading, this extra put is executed by lpfc_drop_node.
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* NVME and SCSI rport unregister requests are complete.
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*/
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if (!(ndlp->fc4_xpt_flags & fc4_xpt_flags))
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lpfc_disc_state_machine(vport, ndlp, NULL, NLP_EVT_DEVICE_RM);
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@ -2567,11 +2566,7 @@ lpfc_nvme_rescan_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
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* nvme_transport perspective. Loss of an rport just means IO cannot
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* be sent and recovery is completely up to the initator.
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* For now, the driver just unbinds the DID and port_role so that
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* no further IO can be issued. Changes are planned for later.
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*
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* Notes - the ndlp reference count is not decremented here since
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* since there is no nvme_transport api for devloss. Node ref count
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* is only adjusted in driver unload.
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* no further IO can be issued.
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*/
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void
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lpfc_nvme_unregister_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
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@ -2646,6 +2641,21 @@ lpfc_nvme_unregister_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
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"6167 NVME unregister failed %d "
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"port_state x%x\n",
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ret, remoteport->port_state);
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if (vport->load_flag & FC_UNLOADING) {
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/* Only 1 thread can drop the initial node
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* reference. Check if another thread has set
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* NLP_DROPPED.
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*/
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spin_lock_irq(&ndlp->lock);
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if (!(ndlp->nlp_flag & NLP_DROPPED)) {
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ndlp->nlp_flag |= NLP_DROPPED;
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spin_unlock_irq(&ndlp->lock);
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lpfc_nlp_put(ndlp);
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return;
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}
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spin_unlock_irq(&ndlp->lock);
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}
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}
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}
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return;
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|
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@ -2332,7 +2332,7 @@ struct megasas_instance {
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u32 support_morethan256jbod; /* FW support for more than 256 PD/JBOD */
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bool use_seqnum_jbod_fp; /* Added for PD sequence */
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bool smp_affinity_enable;
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spinlock_t crashdump_lock;
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struct mutex crashdump_lock;
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struct megasas_register_set __iomem *reg_set;
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u32 __iomem *reply_post_host_index_addr[MR_MAX_MSIX_REG_ARRAY];
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|
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@ -3271,14 +3271,13 @@ fw_crash_buffer_store(struct device *cdev,
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struct megasas_instance *instance =
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(struct megasas_instance *) shost->hostdata;
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int val = 0;
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unsigned long flags;
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if (kstrtoint(buf, 0, &val) != 0)
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return -EINVAL;
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spin_lock_irqsave(&instance->crashdump_lock, flags);
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mutex_lock(&instance->crashdump_lock);
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instance->fw_crash_buffer_offset = val;
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spin_unlock_irqrestore(&instance->crashdump_lock, flags);
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mutex_unlock(&instance->crashdump_lock);
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return strlen(buf);
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}
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@ -3293,24 +3292,23 @@ fw_crash_buffer_show(struct device *cdev,
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unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
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unsigned long chunk_left_bytes;
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unsigned long src_addr;
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unsigned long flags;
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u32 buff_offset;
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spin_lock_irqsave(&instance->crashdump_lock, flags);
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mutex_lock(&instance->crashdump_lock);
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buff_offset = instance->fw_crash_buffer_offset;
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if (!instance->crash_dump_buf ||
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!((instance->fw_crash_state == AVAILABLE) ||
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(instance->fw_crash_state == COPYING))) {
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dev_err(&instance->pdev->dev,
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"Firmware crash dump is not available\n");
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spin_unlock_irqrestore(&instance->crashdump_lock, flags);
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mutex_unlock(&instance->crashdump_lock);
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return -EINVAL;
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}
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if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
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dev_err(&instance->pdev->dev,
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"Firmware crash dump offset is out of range\n");
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spin_unlock_irqrestore(&instance->crashdump_lock, flags);
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mutex_unlock(&instance->crashdump_lock);
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return 0;
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}
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@ -3322,7 +3320,7 @@ fw_crash_buffer_show(struct device *cdev,
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src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
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(buff_offset % dmachunk);
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memcpy(buf, (void *)src_addr, size);
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spin_unlock_irqrestore(&instance->crashdump_lock, flags);
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mutex_unlock(&instance->crashdump_lock);
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return size;
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}
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@ -3347,7 +3345,6 @@ fw_crash_state_store(struct device *cdev,
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struct megasas_instance *instance =
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(struct megasas_instance *) shost->hostdata;
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int val = 0;
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unsigned long flags;
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if (kstrtoint(buf, 0, &val) != 0)
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return -EINVAL;
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@ -3361,9 +3358,9 @@ fw_crash_state_store(struct device *cdev,
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instance->fw_crash_state = val;
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if ((val == COPIED) || (val == COPY_ERROR)) {
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spin_lock_irqsave(&instance->crashdump_lock, flags);
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mutex_lock(&instance->crashdump_lock);
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megasas_free_host_crash_buffer(instance);
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spin_unlock_irqrestore(&instance->crashdump_lock, flags);
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mutex_unlock(&instance->crashdump_lock);
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if (val == COPY_ERROR)
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dev_info(&instance->pdev->dev, "application failed to "
|
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"copy Firmware crash dump\n");
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|
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@ -7422,7 +7419,7 @@ static inline void megasas_init_ctrl_params(struct megasas_instance *instance)
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init_waitqueue_head(&instance->int_cmd_wait_q);
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init_waitqueue_head(&instance->abort_cmd_wait_q);
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|
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spin_lock_init(&instance->crashdump_lock);
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mutex_init(&instance->crashdump_lock);
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spin_lock_init(&instance->mfi_pool_lock);
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spin_lock_init(&instance->hba_lock);
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spin_lock_init(&instance->stream_lock);
|
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|
|
|
|||
|
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@ -1180,65 +1180,6 @@ void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha)
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}
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}
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|
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#ifndef PM8001_USE_MSIX
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/**
|
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* pm8001_chip_intx_interrupt_enable - enable PM8001 chip interrupt
|
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* @pm8001_ha: our hba card information
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*/
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static void
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pm8001_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL);
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);
|
||||
}
|
||||
|
||||
/**
|
||||
* pm8001_chip_intx_interrupt_disable - disable PM8001 chip interrupt
|
||||
* @pm8001_ha: our hba card information
|
||||
*/
|
||||
static void
|
||||
pm8001_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_MASK_ALL);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
/**
|
||||
* pm8001_chip_msix_interrupt_enable - enable PM8001 chip interrupt
|
||||
* @pm8001_ha: our hba card information
|
||||
* @int_vec_idx: interrupt number to enable
|
||||
*/
|
||||
static void
|
||||
pm8001_chip_msix_interrupt_enable(struct pm8001_hba_info *pm8001_ha,
|
||||
u32 int_vec_idx)
|
||||
{
|
||||
u32 msi_index;
|
||||
u32 value;
|
||||
msi_index = int_vec_idx * MSIX_TABLE_ELEMENT_SIZE;
|
||||
msi_index += MSIX_TABLE_BASE;
|
||||
pm8001_cw32(pm8001_ha, 0, msi_index, MSIX_INTERRUPT_ENABLE);
|
||||
value = (1 << int_vec_idx);
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, value);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* pm8001_chip_msix_interrupt_disable - disable PM8001 chip interrupt
|
||||
* @pm8001_ha: our hba card information
|
||||
* @int_vec_idx: interrupt number to disable
|
||||
*/
|
||||
static void
|
||||
pm8001_chip_msix_interrupt_disable(struct pm8001_hba_info *pm8001_ha,
|
||||
u32 int_vec_idx)
|
||||
{
|
||||
u32 msi_index;
|
||||
msi_index = int_vec_idx * MSIX_TABLE_ELEMENT_SIZE;
|
||||
msi_index += MSIX_TABLE_BASE;
|
||||
pm8001_cw32(pm8001_ha, 0, msi_index, MSIX_INTERRUPT_DISABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* pm8001_chip_interrupt_enable - enable PM8001 chip interrupt
|
||||
* @pm8001_ha: our hba card information
|
||||
|
|
@ -1247,11 +1188,14 @@ pm8001_chip_msix_interrupt_disable(struct pm8001_hba_info *pm8001_ha,
|
|||
static void
|
||||
pm8001_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
|
||||
{
|
||||
#ifdef PM8001_USE_MSIX
|
||||
pm8001_chip_msix_interrupt_enable(pm8001_ha, 0);
|
||||
#else
|
||||
pm8001_chip_intx_interrupt_enable(pm8001_ha);
|
||||
#endif
|
||||
if (pm8001_ha->use_msix) {
|
||||
pm8001_cw32(pm8001_ha, 0, MSIX_TABLE_BASE,
|
||||
MSIX_INTERRUPT_ENABLE);
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, 1);
|
||||
} else {
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL);
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -1262,11 +1206,11 @@ pm8001_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
|
|||
static void
|
||||
pm8001_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec)
|
||||
{
|
||||
#ifdef PM8001_USE_MSIX
|
||||
pm8001_chip_msix_interrupt_disable(pm8001_ha, 0);
|
||||
#else
|
||||
pm8001_chip_intx_interrupt_disable(pm8001_ha);
|
||||
#endif
|
||||
if (pm8001_ha->use_msix)
|
||||
pm8001_cw32(pm8001_ha, 0, MSIX_TABLE_BASE,
|
||||
MSIX_INTERRUPT_DISABLE);
|
||||
else
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_MASK_ALL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -4180,7 +4124,7 @@ pm8001_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id)
|
|||
payload.sas_identify.dev_type = SAS_END_DEVICE;
|
||||
payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL;
|
||||
memcpy(payload.sas_identify.sas_addr,
|
||||
pm8001_ha->sas_addr, SAS_ADDR_SIZE);
|
||||
&pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE);
|
||||
payload.sas_identify.phy_id = phy_id;
|
||||
|
||||
return pm8001_mpi_build_cmd(pm8001_ha, 0, opcode, &payload,
|
||||
|
|
@ -4309,16 +4253,15 @@ static int pm8001_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
|
|||
|
||||
static u32 pm8001_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
#ifdef PM8001_USE_MSIX
|
||||
return 1;
|
||||
#else
|
||||
u32 value;
|
||||
|
||||
if (pm8001_ha->use_msix)
|
||||
return 1;
|
||||
|
||||
value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
|
||||
if (value)
|
||||
return 1;
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -56,6 +56,18 @@ MODULE_PARM_DESC(link_rate, "Enable link rate.\n"
|
|||
" 4: Link rate 6.0G\n"
|
||||
" 8: Link rate 12.0G\n");
|
||||
|
||||
bool pm8001_use_msix = true;
|
||||
module_param_named(use_msix, pm8001_use_msix, bool, 0444);
|
||||
MODULE_PARM_DESC(zoned, "Use MSIX interrupts. Default: true");
|
||||
|
||||
static bool pm8001_use_tasklet = true;
|
||||
module_param_named(use_tasklet, pm8001_use_tasklet, bool, 0444);
|
||||
MODULE_PARM_DESC(zoned, "Use MSIX interrupts. Default: true");
|
||||
|
||||
static bool pm8001_read_wwn = true;
|
||||
module_param_named(read_wwn, pm8001_read_wwn, bool, 0444);
|
||||
MODULE_PARM_DESC(zoned, "Get WWN from the controller. Default: true");
|
||||
|
||||
static struct scsi_transport_template *pm8001_stt;
|
||||
static int pm8001_init_ccb_tag(struct pm8001_hba_info *);
|
||||
|
||||
|
|
@ -200,8 +212,6 @@ static void pm8001_free(struct pm8001_hba_info *pm8001_ha)
|
|||
kfree(pm8001_ha);
|
||||
}
|
||||
|
||||
#ifdef PM8001_USE_TASKLET
|
||||
|
||||
/**
|
||||
* pm8001_tasklet() - tasklet for 64 msi-x interrupt handler
|
||||
* @opaque: the passed general host adapter struct
|
||||
|
|
@ -209,16 +219,67 @@ static void pm8001_free(struct pm8001_hba_info *pm8001_ha)
|
|||
*/
|
||||
static void pm8001_tasklet(unsigned long opaque)
|
||||
{
|
||||
struct pm8001_hba_info *pm8001_ha;
|
||||
struct isr_param *irq_vector;
|
||||
struct isr_param *irq_vector = (struct isr_param *)opaque;
|
||||
struct pm8001_hba_info *pm8001_ha = irq_vector->drv_inst;
|
||||
|
||||
if (WARN_ON_ONCE(!pm8001_ha))
|
||||
return;
|
||||
|
||||
irq_vector = (struct isr_param *)opaque;
|
||||
pm8001_ha = irq_vector->drv_inst;
|
||||
if (unlikely(!pm8001_ha))
|
||||
BUG_ON(1);
|
||||
PM8001_CHIP_DISP->isr(pm8001_ha, irq_vector->irq_id);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void pm8001_init_tasklet(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!pm8001_use_tasklet)
|
||||
return;
|
||||
|
||||
/* Tasklet for non msi-x interrupt handler */
|
||||
if ((!pm8001_ha->pdev->msix_cap || !pci_msi_enabled()) ||
|
||||
(pm8001_ha->chip_id == chip_8001)) {
|
||||
tasklet_init(&pm8001_ha->tasklet[0], pm8001_tasklet,
|
||||
(unsigned long)&(pm8001_ha->irq_vector[0]));
|
||||
return;
|
||||
}
|
||||
for (i = 0; i < PM8001_MAX_MSIX_VEC; i++)
|
||||
tasklet_init(&pm8001_ha->tasklet[i], pm8001_tasklet,
|
||||
(unsigned long)&(pm8001_ha->irq_vector[i]));
|
||||
}
|
||||
|
||||
static void pm8001_kill_tasklet(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!pm8001_use_tasklet)
|
||||
return;
|
||||
|
||||
/* For non-msix and msix interrupts */
|
||||
if ((!pm8001_ha->pdev->msix_cap || !pci_msi_enabled()) ||
|
||||
(pm8001_ha->chip_id == chip_8001)) {
|
||||
tasklet_kill(&pm8001_ha->tasklet[0]);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < PM8001_MAX_MSIX_VEC; i++)
|
||||
tasklet_kill(&pm8001_ha->tasklet[i]);
|
||||
}
|
||||
|
||||
static irqreturn_t pm8001_handle_irq(struct pm8001_hba_info *pm8001_ha,
|
||||
int irq)
|
||||
{
|
||||
if (unlikely(!pm8001_ha))
|
||||
return IRQ_NONE;
|
||||
|
||||
if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha))
|
||||
return IRQ_NONE;
|
||||
|
||||
if (!pm8001_use_tasklet)
|
||||
return PM8001_CHIP_DISP->isr(pm8001_ha, irq);
|
||||
|
||||
tasklet_schedule(&pm8001_ha->tasklet[irq]);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/**
|
||||
* pm8001_interrupt_handler_msix - main MSIX interrupt handler.
|
||||
|
|
@ -230,22 +291,10 @@ static void pm8001_tasklet(unsigned long opaque)
|
|||
*/
|
||||
static irqreturn_t pm8001_interrupt_handler_msix(int irq, void *opaque)
|
||||
{
|
||||
struct isr_param *irq_vector;
|
||||
struct pm8001_hba_info *pm8001_ha;
|
||||
irqreturn_t ret = IRQ_HANDLED;
|
||||
irq_vector = (struct isr_param *)opaque;
|
||||
pm8001_ha = irq_vector->drv_inst;
|
||||
struct isr_param *irq_vector = (struct isr_param *)opaque;
|
||||
struct pm8001_hba_info *pm8001_ha = irq_vector->drv_inst;
|
||||
|
||||
if (unlikely(!pm8001_ha))
|
||||
return IRQ_NONE;
|
||||
if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha))
|
||||
return IRQ_NONE;
|
||||
#ifdef PM8001_USE_TASKLET
|
||||
tasklet_schedule(&pm8001_ha->tasklet[irq_vector->irq_id]);
|
||||
#else
|
||||
ret = PM8001_CHIP_DISP->isr(pm8001_ha, irq_vector->irq_id);
|
||||
#endif
|
||||
return ret;
|
||||
return pm8001_handle_irq(pm8001_ha, irq_vector->irq_id);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -256,25 +305,14 @@ static irqreturn_t pm8001_interrupt_handler_msix(int irq, void *opaque)
|
|||
|
||||
static irqreturn_t pm8001_interrupt_handler_intx(int irq, void *dev_id)
|
||||
{
|
||||
struct pm8001_hba_info *pm8001_ha;
|
||||
irqreturn_t ret = IRQ_HANDLED;
|
||||
struct sas_ha_struct *sha = dev_id;
|
||||
pm8001_ha = sha->lldd_ha;
|
||||
if (unlikely(!pm8001_ha))
|
||||
return IRQ_NONE;
|
||||
if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha))
|
||||
return IRQ_NONE;
|
||||
struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
|
||||
|
||||
#ifdef PM8001_USE_TASKLET
|
||||
tasklet_schedule(&pm8001_ha->tasklet[0]);
|
||||
#else
|
||||
ret = PM8001_CHIP_DISP->isr(pm8001_ha, 0);
|
||||
#endif
|
||||
return ret;
|
||||
return pm8001_handle_irq(pm8001_ha, 0);
|
||||
}
|
||||
|
||||
static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha);
|
||||
static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha);
|
||||
static void pm8001_free_irq(struct pm8001_hba_info *pm8001_ha);
|
||||
|
||||
/**
|
||||
* pm8001_alloc - initiate our hba structure and 6 DMAs area.
|
||||
|
|
@ -294,13 +332,6 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
|
|||
pm8001_dbg(pm8001_ha, INIT, "pm8001_alloc: PHY:%x\n",
|
||||
pm8001_ha->chip->n_phy);
|
||||
|
||||
/* Setup Interrupt */
|
||||
rc = pm8001_setup_irq(pm8001_ha);
|
||||
if (rc) {
|
||||
pm8001_dbg(pm8001_ha, FAIL,
|
||||
"pm8001_setup_irq failed [ret: %d]\n", rc);
|
||||
goto err_out;
|
||||
}
|
||||
/* Request Interrupt */
|
||||
rc = pm8001_request_irq(pm8001_ha);
|
||||
if (rc)
|
||||
|
|
@ -519,7 +550,6 @@ static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev,
|
|||
{
|
||||
struct pm8001_hba_info *pm8001_ha;
|
||||
struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
|
||||
int j;
|
||||
|
||||
pm8001_ha = sha->lldd_ha;
|
||||
if (!pm8001_ha)
|
||||
|
|
@ -550,17 +580,8 @@ static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev,
|
|||
else
|
||||
pm8001_ha->iomb_size = IOMB_SIZE_SPC;
|
||||
|
||||
#ifdef PM8001_USE_TASKLET
|
||||
/* Tasklet for non msi-x interrupt handler */
|
||||
if ((!pdev->msix_cap || !pci_msi_enabled())
|
||||
|| (pm8001_ha->chip_id == chip_8001))
|
||||
tasklet_init(&pm8001_ha->tasklet[0], pm8001_tasklet,
|
||||
(unsigned long)&(pm8001_ha->irq_vector[0]));
|
||||
else
|
||||
for (j = 0; j < PM8001_MAX_MSIX_VEC; j++)
|
||||
tasklet_init(&pm8001_ha->tasklet[j], pm8001_tasklet,
|
||||
(unsigned long)&(pm8001_ha->irq_vector[j]));
|
||||
#endif
|
||||
pm8001_init_tasklet(pm8001_ha);
|
||||
|
||||
if (pm8001_ioremap(pm8001_ha))
|
||||
goto failed_pci_alloc;
|
||||
if (!pm8001_alloc(pm8001_ha, ent))
|
||||
|
|
@ -666,19 +687,30 @@ static void pm8001_post_sas_ha_init(struct Scsi_Host *shost,
|
|||
*/
|
||||
static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
u8 i, j;
|
||||
u8 sas_add[8];
|
||||
#ifdef PM8001_READ_VPD
|
||||
/* For new SPC controllers WWN is stored in flash vpd
|
||||
* For SPC/SPCve controllers WWN is stored in EEPROM
|
||||
* For Older SPC WWN is stored in NVMD
|
||||
*/
|
||||
DECLARE_COMPLETION_ONSTACK(completion);
|
||||
struct pm8001_ioctl_payload payload;
|
||||
unsigned long time_remaining;
|
||||
u8 sas_add[8];
|
||||
u16 deviceid;
|
||||
int rc;
|
||||
unsigned long time_remaining;
|
||||
u8 i, j;
|
||||
|
||||
if (!pm8001_read_wwn) {
|
||||
__be64 dev_sas_addr = cpu_to_be64(0x50010c600047f9d0ULL);
|
||||
|
||||
for (i = 0; i < pm8001_ha->chip->n_phy; i++)
|
||||
memcpy(&pm8001_ha->phy[i].dev_sas_addr, &dev_sas_addr,
|
||||
SAS_ADDR_SIZE);
|
||||
memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
|
||||
SAS_ADDR_SIZE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* For new SPC controllers WWN is stored in flash vpd. For SPC/SPCve
|
||||
* controllers WWN is stored in EEPROM. And for Older SPC WWN is stored
|
||||
* in NVMD.
|
||||
*/
|
||||
if (PM8001_CHIP_DISP->fatal_errors(pm8001_ha)) {
|
||||
pm8001_dbg(pm8001_ha, FAIL, "controller is in fatal error state\n");
|
||||
return -EIO;
|
||||
|
|
@ -752,16 +784,7 @@ static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
|
|||
pm8001_ha->phy[i].dev_sas_addr);
|
||||
}
|
||||
kfree(payload.func_specific);
|
||||
#else
|
||||
for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
|
||||
pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
|
||||
pm8001_ha->phy[i].dev_sas_addr =
|
||||
cpu_to_be64((u64)
|
||||
(*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
|
||||
}
|
||||
memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
|
||||
SAS_ADDR_SIZE);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -771,13 +794,13 @@ static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
|
|||
*/
|
||||
static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
|
||||
#ifdef PM8001_READ_VPD
|
||||
/*OPTION ROM FLASH read for the SPC cards */
|
||||
DECLARE_COMPLETION_ONSTACK(completion);
|
||||
struct pm8001_ioctl_payload payload;
|
||||
int rc;
|
||||
|
||||
if (!pm8001_read_wwn)
|
||||
return 0;
|
||||
|
||||
pm8001_ha->nvmd_completion = &completion;
|
||||
/* SAS ADDRESS read from flash / EEPROM */
|
||||
payload.minor_function = 6;
|
||||
|
|
@ -796,7 +819,7 @@ static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
|
|||
wait_for_completion(&completion);
|
||||
pm8001_set_phy_profile(pm8001_ha, sizeof(u8), payload.func_specific);
|
||||
kfree(payload.func_specific);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -947,7 +970,6 @@ static int pm8001_configure_phy_settings(struct pm8001_hba_info *pm8001_ha)
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef PM8001_USE_MSIX
|
||||
/**
|
||||
* pm8001_setup_msix - enable MSI-X interrupt
|
||||
* @pm8001_ha: our ha struct.
|
||||
|
|
@ -1029,21 +1051,6 @@ static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha)
|
|||
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
||||
static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
|
||||
pdev = pm8001_ha->pdev;
|
||||
|
||||
#ifdef PM8001_USE_MSIX
|
||||
if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
|
||||
return pm8001_setup_msix(pm8001_ha);
|
||||
pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pm8001_request_irq - register interrupt
|
||||
|
|
@ -1051,27 +1058,59 @@ static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha)
|
|||
*/
|
||||
static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
struct pci_dev *pdev = pm8001_ha->pdev;
|
||||
int rc;
|
||||
|
||||
pdev = pm8001_ha->pdev;
|
||||
if (pm8001_use_msix && pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
|
||||
rc = pm8001_setup_msix(pm8001_ha);
|
||||
if (rc) {
|
||||
pm8001_dbg(pm8001_ha, FAIL,
|
||||
"pm8001_setup_irq failed [ret: %d]\n", rc);
|
||||
return rc;
|
||||
}
|
||||
|
||||
#ifdef PM8001_USE_MSIX
|
||||
if (pdev->msix_cap && pci_msi_enabled())
|
||||
return pm8001_request_msix(pm8001_ha);
|
||||
else {
|
||||
pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
|
||||
goto intx;
|
||||
if (!pdev->msix_cap || !pci_msi_enabled())
|
||||
goto use_intx;
|
||||
|
||||
rc = pm8001_request_msix(pm8001_ha);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
pm8001_ha->use_msix = true;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
intx:
|
||||
/* initialize the INT-X interrupt */
|
||||
use_intx:
|
||||
/* Initialize the INT-X interrupt */
|
||||
pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
|
||||
pm8001_ha->use_msix = false;
|
||||
pm8001_ha->irq_vector[0].irq_id = 0;
|
||||
pm8001_ha->irq_vector[0].drv_inst = pm8001_ha;
|
||||
rc = request_irq(pdev->irq, pm8001_interrupt_handler_intx, IRQF_SHARED,
|
||||
pm8001_ha->name, SHOST_TO_SAS_HA(pm8001_ha->shost));
|
||||
return rc;
|
||||
|
||||
return request_irq(pdev->irq, pm8001_interrupt_handler_intx,
|
||||
IRQF_SHARED, pm8001_ha->name,
|
||||
SHOST_TO_SAS_HA(pm8001_ha->shost));
|
||||
}
|
||||
|
||||
static void pm8001_free_irq(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
struct pci_dev *pdev = pm8001_ha->pdev;
|
||||
int i;
|
||||
|
||||
if (pm8001_ha->use_msix) {
|
||||
for (i = 0; i < pm8001_ha->number_of_intr; i++)
|
||||
synchronize_irq(pci_irq_vector(pdev, i));
|
||||
|
||||
for (i = 0; i < pm8001_ha->number_of_intr; i++)
|
||||
free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]);
|
||||
|
||||
pci_free_irq_vectors(pdev);
|
||||
return;
|
||||
}
|
||||
|
||||
/* INT-X */
|
||||
free_irq(pm8001_ha->irq, pm8001_ha->sas);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -1269,33 +1308,17 @@ static int pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha)
|
|||
static void pm8001_pci_remove(struct pci_dev *pdev)
|
||||
{
|
||||
struct sas_ha_struct *sha = pci_get_drvdata(pdev);
|
||||
struct pm8001_hba_info *pm8001_ha;
|
||||
int i, j;
|
||||
pm8001_ha = sha->lldd_ha;
|
||||
struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
|
||||
int i;
|
||||
|
||||
sas_unregister_ha(sha);
|
||||
sas_remove_host(pm8001_ha->shost);
|
||||
list_del(&pm8001_ha->list);
|
||||
PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
|
||||
PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
|
||||
|
||||
#ifdef PM8001_USE_MSIX
|
||||
for (i = 0; i < pm8001_ha->number_of_intr; i++)
|
||||
synchronize_irq(pci_irq_vector(pdev, i));
|
||||
for (i = 0; i < pm8001_ha->number_of_intr; i++)
|
||||
free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]);
|
||||
pci_free_irq_vectors(pdev);
|
||||
#else
|
||||
free_irq(pm8001_ha->irq, sha);
|
||||
#endif
|
||||
#ifdef PM8001_USE_TASKLET
|
||||
/* For non-msix and msix interrupts */
|
||||
if ((!pdev->msix_cap || !pci_msi_enabled()) ||
|
||||
(pm8001_ha->chip_id == chip_8001))
|
||||
tasklet_kill(&pm8001_ha->tasklet[0]);
|
||||
else
|
||||
for (j = 0; j < PM8001_MAX_MSIX_VEC; j++)
|
||||
tasklet_kill(&pm8001_ha->tasklet[j]);
|
||||
#endif
|
||||
pm8001_free_irq(pm8001_ha);
|
||||
pm8001_kill_tasklet(pm8001_ha);
|
||||
scsi_host_put(pm8001_ha->shost);
|
||||
|
||||
for (i = 0; i < pm8001_ha->ccb_count; i++) {
|
||||
|
|
@ -1326,7 +1349,7 @@ static int __maybe_unused pm8001_pci_suspend(struct device *dev)
|
|||
struct pci_dev *pdev = to_pci_dev(dev);
|
||||
struct sas_ha_struct *sha = pci_get_drvdata(pdev);
|
||||
struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
|
||||
int i, j;
|
||||
|
||||
sas_suspend_ha(sha);
|
||||
flush_workqueue(pm8001_wq);
|
||||
scsi_block_requests(pm8001_ha->shost);
|
||||
|
|
@ -1336,24 +1359,10 @@ static int __maybe_unused pm8001_pci_suspend(struct device *dev)
|
|||
}
|
||||
PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
|
||||
PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
|
||||
#ifdef PM8001_USE_MSIX
|
||||
for (i = 0; i < pm8001_ha->number_of_intr; i++)
|
||||
synchronize_irq(pci_irq_vector(pdev, i));
|
||||
for (i = 0; i < pm8001_ha->number_of_intr; i++)
|
||||
free_irq(pci_irq_vector(pdev, i), &pm8001_ha->irq_vector[i]);
|
||||
pci_free_irq_vectors(pdev);
|
||||
#else
|
||||
free_irq(pm8001_ha->irq, sha);
|
||||
#endif
|
||||
#ifdef PM8001_USE_TASKLET
|
||||
/* For non-msix and msix interrupts */
|
||||
if ((!pdev->msix_cap || !pci_msi_enabled()) ||
|
||||
(pm8001_ha->chip_id == chip_8001))
|
||||
tasklet_kill(&pm8001_ha->tasklet[0]);
|
||||
else
|
||||
for (j = 0; j < PM8001_MAX_MSIX_VEC; j++)
|
||||
tasklet_kill(&pm8001_ha->tasklet[j]);
|
||||
#endif
|
||||
|
||||
pm8001_free_irq(pm8001_ha);
|
||||
pm8001_kill_tasklet(pm8001_ha);
|
||||
|
||||
pm8001_info(pm8001_ha, "pdev=0x%p, slot=%s, entering "
|
||||
"suspended state\n", pdev,
|
||||
pm8001_ha->name);
|
||||
|
|
@ -1372,7 +1381,7 @@ static int __maybe_unused pm8001_pci_resume(struct device *dev)
|
|||
struct sas_ha_struct *sha = pci_get_drvdata(pdev);
|
||||
struct pm8001_hba_info *pm8001_ha;
|
||||
int rc;
|
||||
u8 i = 0, j;
|
||||
u8 i = 0;
|
||||
DECLARE_COMPLETION_ONSTACK(completion);
|
||||
|
||||
pm8001_ha = sha->lldd_ha;
|
||||
|
|
@ -1400,17 +1409,9 @@ static int __maybe_unused pm8001_pci_resume(struct device *dev)
|
|||
rc = pm8001_request_irq(pm8001_ha);
|
||||
if (rc)
|
||||
goto err_out_disable;
|
||||
#ifdef PM8001_USE_TASKLET
|
||||
/* Tasklet for non msi-x interrupt handler */
|
||||
if ((!pdev->msix_cap || !pci_msi_enabled()) ||
|
||||
(pm8001_ha->chip_id == chip_8001))
|
||||
tasklet_init(&pm8001_ha->tasklet[0], pm8001_tasklet,
|
||||
(unsigned long)&(pm8001_ha->irq_vector[0]));
|
||||
else
|
||||
for (j = 0; j < PM8001_MAX_MSIX_VEC; j++)
|
||||
tasklet_init(&pm8001_ha->tasklet[j], pm8001_tasklet,
|
||||
(unsigned long)&(pm8001_ha->irq_vector[j]));
|
||||
#endif
|
||||
|
||||
pm8001_init_tasklet(pm8001_ha);
|
||||
|
||||
PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
|
||||
if (pm8001_ha->chip_id != chip_8001) {
|
||||
for (i = 1; i < pm8001_ha->number_of_intr; i++)
|
||||
|
|
@ -1542,6 +1543,9 @@ static int __init pm8001_init(void)
|
|||
{
|
||||
int rc = -ENOMEM;
|
||||
|
||||
if (pm8001_use_tasklet && !pm8001_use_msix)
|
||||
pm8001_use_tasklet = false;
|
||||
|
||||
pm8001_wq = alloc_workqueue("pm80xx", 0, 0);
|
||||
if (!pm8001_wq)
|
||||
goto err;
|
||||
|
|
|
|||
|
|
@ -83,10 +83,7 @@ do { \
|
|||
pm8001_info(HBA, fmt, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#define PM8001_USE_TASKLET
|
||||
#define PM8001_USE_MSIX
|
||||
#define PM8001_READ_VPD
|
||||
|
||||
extern bool pm8001_use_msix;
|
||||
|
||||
#define IS_SPCV_12G(dev) ((dev->device == 0X8074) \
|
||||
|| (dev->device == 0X8076) \
|
||||
|
|
@ -520,14 +517,12 @@ struct pm8001_hba_info {
|
|||
struct pm8001_device *devices;
|
||||
struct pm8001_ccb_info *ccb_info;
|
||||
u32 ccb_count;
|
||||
#ifdef PM8001_USE_MSIX
|
||||
|
||||
bool use_msix;
|
||||
int number_of_intr;/*will be used in remove()*/
|
||||
char intr_drvname[PM8001_MAX_MSIX_VEC]
|
||||
[PM8001_NAME_LENGTH+1+3+1];
|
||||
#endif
|
||||
#ifdef PM8001_USE_TASKLET
|
||||
struct tasklet_struct tasklet[PM8001_MAX_MSIX_VEC];
|
||||
#endif
|
||||
u32 logging_level;
|
||||
u32 link_rate;
|
||||
u32 fw_status;
|
||||
|
|
|
|||
|
|
@ -1714,27 +1714,6 @@ static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha)
|
|||
pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n");
|
||||
}
|
||||
|
||||
/**
|
||||
* pm80xx_chip_intx_interrupt_enable - enable PM8001 chip interrupt
|
||||
* @pm8001_ha: our hba card information
|
||||
*/
|
||||
static void
|
||||
pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL);
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);
|
||||
}
|
||||
|
||||
/**
|
||||
* pm80xx_chip_intx_interrupt_disable - disable PM8001 chip interrupt
|
||||
* @pm8001_ha: our hba card information
|
||||
*/
|
||||
static void
|
||||
pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL);
|
||||
}
|
||||
|
||||
/**
|
||||
* pm80xx_chip_interrupt_enable - enable PM8001 chip interrupt
|
||||
* @pm8001_ha: our hba card information
|
||||
|
|
@ -1743,16 +1722,16 @@ pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha)
|
|||
static void
|
||||
pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
|
||||
{
|
||||
#ifdef PM8001_USE_MSIX
|
||||
if (!pm8001_ha->use_msix) {
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL);
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);
|
||||
return;
|
||||
}
|
||||
|
||||
if (vec < 32)
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, 1U << vec);
|
||||
else
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR_U,
|
||||
1U << (vec - 32));
|
||||
return;
|
||||
#endif
|
||||
pm80xx_chip_intx_interrupt_enable(pm8001_ha);
|
||||
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR_U, 1U << (vec - 32));
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -1763,19 +1742,20 @@ pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)
|
|||
static void
|
||||
pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec)
|
||||
{
|
||||
#ifdef PM8001_USE_MSIX
|
||||
if (!pm8001_ha->use_msix) {
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL);
|
||||
return;
|
||||
}
|
||||
|
||||
if (vec == 0xFF) {
|
||||
/* disable all vectors 0-31, 32-63 */
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 0xFFFFFFFF);
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 0xFFFFFFFF);
|
||||
} else if (vec < 32)
|
||||
} else if (vec < 32) {
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 1U << vec);
|
||||
else
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U,
|
||||
1U << (vec - 32));
|
||||
return;
|
||||
#endif
|
||||
pm80xx_chip_intx_interrupt_disable(pm8001_ha);
|
||||
} else {
|
||||
pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 1U << (vec - 32));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -3671,10 +3651,12 @@ static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha,
|
|||
(struct set_ctrl_cfg_resp *)(piomb + 4);
|
||||
u32 status = le32_to_cpu(pPayload->status);
|
||||
u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd);
|
||||
u32 tag = le32_to_cpu(pPayload->tag);
|
||||
|
||||
pm8001_dbg(pm8001_ha, MSG,
|
||||
"SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n",
|
||||
status, err_qlfr_pgcd);
|
||||
pm8001_tag_free(pm8001_ha, tag);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -4671,7 +4653,7 @@ pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id)
|
|||
payload.sas_identify.dev_type = SAS_END_DEVICE;
|
||||
payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL;
|
||||
memcpy(payload.sas_identify.sas_addr,
|
||||
&pm8001_ha->sas_addr, SAS_ADDR_SIZE);
|
||||
&pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE);
|
||||
payload.sas_identify.phy_id = phy_id;
|
||||
|
||||
return pm8001_mpi_build_cmd(pm8001_ha, 0, opcode, &payload,
|
||||
|
|
@ -4800,16 +4782,15 @@ static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
|
|||
|
||||
static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha)
|
||||
{
|
||||
#ifdef PM8001_USE_MSIX
|
||||
return 1;
|
||||
#else
|
||||
u32 value;
|
||||
|
||||
if (pm8001_ha->use_msix)
|
||||
return 1;
|
||||
|
||||
value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
|
||||
if (value)
|
||||
return 1;
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -307,9 +307,9 @@ static int ppa_out(ppa_struct *dev, char *buffer, int len)
|
|||
case PPA_EPP_8:
|
||||
epp_reset(ppb);
|
||||
w_ctr(ppb, 0x4);
|
||||
if (dev->mode == PPA_EPP_32 && !(((long) buffer | len) & 0x01))
|
||||
if (dev->mode == PPA_EPP_32 && !(((long) buffer | len) & 0x03))
|
||||
outsl(ppb + 4, buffer, len >> 2);
|
||||
else if (dev->mode == PPA_EPP_16 && !(((long) buffer | len) & 0x03))
|
||||
else if (dev->mode == PPA_EPP_16 && !(((long) buffer | len) & 0x01))
|
||||
outsw(ppb + 4, buffer, len >> 1);
|
||||
else
|
||||
outsb(ppb + 4, buffer, len);
|
||||
|
|
|
|||
|
|
@ -1904,6 +1904,7 @@ int qedf_initiate_abts(struct qedf_ioreq *io_req, bool return_scsi_cmd_on_abts)
|
|||
goto drop_rdata_kref;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&fcport->rport_lock, flags);
|
||||
if (!test_bit(QEDF_CMD_OUTSTANDING, &io_req->flags) ||
|
||||
test_bit(QEDF_CMD_IN_CLEANUP, &io_req->flags) ||
|
||||
test_bit(QEDF_CMD_IN_ABORT, &io_req->flags)) {
|
||||
|
|
@ -1911,17 +1912,20 @@ int qedf_initiate_abts(struct qedf_ioreq *io_req, bool return_scsi_cmd_on_abts)
|
|||
"io_req xid=0x%x sc_cmd=%p already in cleanup or abort processing or already completed.\n",
|
||||
io_req->xid, io_req->sc_cmd);
|
||||
rc = 1;
|
||||
spin_unlock_irqrestore(&fcport->rport_lock, flags);
|
||||
goto drop_rdata_kref;
|
||||
}
|
||||
|
||||
/* Set the command type to abort */
|
||||
io_req->cmd_type = QEDF_ABTS;
|
||||
spin_unlock_irqrestore(&fcport->rport_lock, flags);
|
||||
|
||||
kref_get(&io_req->refcount);
|
||||
|
||||
xid = io_req->xid;
|
||||
qedf->control_requests++;
|
||||
qedf->packet_aborts++;
|
||||
|
||||
/* Set the command type to abort */
|
||||
io_req->cmd_type = QEDF_ABTS;
|
||||
io_req->return_scsi_cmd_on_abts = return_scsi_cmd_on_abts;
|
||||
|
||||
set_bit(QEDF_CMD_IN_ABORT, &io_req->flags);
|
||||
|
|
@ -2210,7 +2214,9 @@ int qedf_initiate_cleanup(struct qedf_ioreq *io_req,
|
|||
refcount, fcport, fcport->rdata->ids.port_id);
|
||||
|
||||
/* Cleanup cmds re-use the same TID as the original I/O */
|
||||
spin_lock_irqsave(&fcport->rport_lock, flags);
|
||||
io_req->cmd_type = QEDF_CLEANUP;
|
||||
spin_unlock_irqrestore(&fcport->rport_lock, flags);
|
||||
io_req->return_scsi_cmd_on_abts = return_scsi_cmd_on_abts;
|
||||
|
||||
init_completion(&io_req->cleanup_done);
|
||||
|
|
|
|||
|
|
@ -2805,6 +2805,8 @@ void qedf_process_cqe(struct qedf_ctx *qedf, struct fcoe_cqe *cqe)
|
|||
struct qedf_ioreq *io_req;
|
||||
struct qedf_rport *fcport;
|
||||
u32 comp_type;
|
||||
u8 io_comp_type;
|
||||
unsigned long flags;
|
||||
|
||||
comp_type = (cqe->cqe_data >> FCOE_CQE_CQE_TYPE_SHIFT) &
|
||||
FCOE_CQE_CQE_TYPE_MASK;
|
||||
|
|
@ -2838,11 +2840,14 @@ void qedf_process_cqe(struct qedf_ctx *qedf, struct fcoe_cqe *cqe)
|
|||
return;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&fcport->rport_lock, flags);
|
||||
io_comp_type = io_req->cmd_type;
|
||||
spin_unlock_irqrestore(&fcport->rport_lock, flags);
|
||||
|
||||
switch (comp_type) {
|
||||
case FCOE_GOOD_COMPLETION_CQE_TYPE:
|
||||
atomic_inc(&fcport->free_sqes);
|
||||
switch (io_req->cmd_type) {
|
||||
switch (io_comp_type) {
|
||||
case QEDF_SCSI_CMD:
|
||||
qedf_scsi_completion(qedf, cqe, io_req);
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -116,7 +116,7 @@ qla2x00_dfs_create_rport(scsi_qla_host_t *vha, struct fc_port *fp)
|
|||
|
||||
sprintf(wwn, "pn-%016llx", wwn_to_u64(fp->port_name));
|
||||
fp->dfs_rport_dir = debugfs_create_dir(wwn, vha->dfs_rport_root);
|
||||
if (!fp->dfs_rport_dir)
|
||||
if (IS_ERR(fp->dfs_rport_dir))
|
||||
return;
|
||||
if (NVME_TARGET(vha->hw, fp))
|
||||
debugfs_create_file("dev_loss_tmo", 0600, fp->dfs_rport_dir,
|
||||
|
|
@ -708,14 +708,14 @@ qla2x00_dfs_setup(scsi_qla_host_t *vha)
|
|||
if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) {
|
||||
ha->tgt.dfs_naqp = debugfs_create_file("naqp",
|
||||
0400, ha->dfs_dir, vha, &dfs_naqp_ops);
|
||||
if (!ha->tgt.dfs_naqp) {
|
||||
if (IS_ERR(ha->tgt.dfs_naqp)) {
|
||||
ql_log(ql_log_warn, vha, 0xd011,
|
||||
"Unable to create debugFS naqp node.\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
vha->dfs_rport_root = debugfs_create_dir("rports", ha->dfs_dir);
|
||||
if (!vha->dfs_rport_root) {
|
||||
if (IS_ERR(vha->dfs_rport_root)) {
|
||||
ql_log(ql_log_warn, vha, 0xd012,
|
||||
"Unable to create debugFS rports node.\n");
|
||||
goto out;
|
||||
|
|
|
|||
|
|
@ -577,7 +577,7 @@ fcport_is_bigger(fc_port_t *fcport)
|
|||
static inline struct qla_qpair *
|
||||
qla_mapq_nvme_select_qpair(struct qla_hw_data *ha, struct qla_qpair *qpair)
|
||||
{
|
||||
int cpuid = smp_processor_id();
|
||||
int cpuid = raw_smp_processor_id();
|
||||
|
||||
if (qpair->cpuid != cpuid &&
|
||||
ha->qp_cpu_map[cpuid]) {
|
||||
|
|
|
|||
|
|
@ -3965,7 +3965,7 @@ void qla24xx_process_response_queue(struct scsi_qla_host *vha,
|
|||
if (!ha->flags.fw_started)
|
||||
return;
|
||||
|
||||
if (rsp->qpair->cpuid != smp_processor_id() || !rsp->qpair->rcv_intr) {
|
||||
if (rsp->qpair->cpuid != raw_smp_processor_id() || !rsp->qpair->rcv_intr) {
|
||||
rsp->qpair->rcv_intr = 1;
|
||||
|
||||
if (!rsp->qpair->cpu_mapped)
|
||||
|
|
@ -4468,7 +4468,7 @@ qla2xxx_msix_rsp_q(int irq, void *dev_id)
|
|||
}
|
||||
ha = qpair->hw;
|
||||
|
||||
queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
|
||||
queue_work(ha->wq, &qpair->q_work);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
@ -4494,7 +4494,7 @@ qla2xxx_msix_rsp_q_hs(int irq, void *dev_id)
|
|||
wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
|
||||
spin_unlock_irqrestore(&ha->hardware_lock, flags);
|
||||
|
||||
queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
|
||||
queue_work(ha->wq, &qpair->q_work);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -399,14 +399,14 @@ static int qla_nvme_xmt_ls_rsp(struct nvme_fc_local_port *lport,
|
|||
nvme->u.nvme.dl = 0;
|
||||
nvme->u.nvme.timeout_sec = 0;
|
||||
nvme->u.nvme.cmd_dma = fd_resp->rspdma;
|
||||
nvme->u.nvme.cmd_len = fd_resp->rsplen;
|
||||
nvme->u.nvme.cmd_len = cpu_to_le32(fd_resp->rsplen);
|
||||
nvme->u.nvme.rsp_len = 0;
|
||||
nvme->u.nvme.rsp_dma = 0;
|
||||
nvme->u.nvme.exchange_address = uctx->exchange_address;
|
||||
nvme->u.nvme.nport_handle = uctx->nport_handle;
|
||||
nvme->u.nvme.ox_id = uctx->ox_id;
|
||||
dma_sync_single_for_device(&ha->pdev->dev, nvme->u.nvme.cmd_dma,
|
||||
le32_to_cpu(fd_resp->rsplen), DMA_TO_DEVICE);
|
||||
fd_resp->rsplen, DMA_TO_DEVICE);
|
||||
|
||||
ql_dbg(ql_dbg_unsol, vha, 0x2122,
|
||||
"Unsol lsreq portid=%06x %8phC exchange_address 0x%x ox_id 0x%x hdl 0x%x\n",
|
||||
|
|
@ -504,13 +504,13 @@ static int qla_nvme_ls_req(struct nvme_fc_local_port *lport,
|
|||
nvme->u.nvme.desc = fd;
|
||||
nvme->u.nvme.dir = 0;
|
||||
nvme->u.nvme.dl = 0;
|
||||
nvme->u.nvme.cmd_len = fd->rqstlen;
|
||||
nvme->u.nvme.rsp_len = fd->rsplen;
|
||||
nvme->u.nvme.cmd_len = cpu_to_le32(fd->rqstlen);
|
||||
nvme->u.nvme.rsp_len = cpu_to_le32(fd->rsplen);
|
||||
nvme->u.nvme.rsp_dma = fd->rspdma;
|
||||
nvme->u.nvme.timeout_sec = fd->timeout;
|
||||
nvme->u.nvme.cmd_dma = fd->rqstdma;
|
||||
dma_sync_single_for_device(&ha->pdev->dev, nvme->u.nvme.cmd_dma,
|
||||
le32_to_cpu(fd->rqstlen), DMA_TO_DEVICE);
|
||||
fd->rqstlen, DMA_TO_DEVICE);
|
||||
|
||||
rval = qla2x00_start_sp(sp);
|
||||
if (rval != QLA_SUCCESS) {
|
||||
|
|
|
|||
|
|
@ -4425,8 +4425,7 @@ static int qlt_handle_cmd_for_atio(struct scsi_qla_host *vha,
|
|||
queue_work_on(cmd->se_cmd.cpuid, qla_tgt_wq, &cmd->work);
|
||||
} else if (ha->msix_count) {
|
||||
if (cmd->atio.u.isp24.fcp_cmnd.rddata)
|
||||
queue_work_on(smp_processor_id(), qla_tgt_wq,
|
||||
&cmd->work);
|
||||
queue_work(qla_tgt_wq, &cmd->work);
|
||||
else
|
||||
queue_work_on(cmd->se_cmd.cpuid, qla_tgt_wq,
|
||||
&cmd->work);
|
||||
|
|
|
|||
|
|
@ -310,7 +310,7 @@ static void tcm_qla2xxx_free_cmd(struct qla_tgt_cmd *cmd)
|
|||
cmd->trc_flags |= TRC_CMD_DONE;
|
||||
|
||||
INIT_WORK(&cmd->work, tcm_qla2xxx_complete_free);
|
||||
queue_work_on(smp_processor_id(), tcm_qla2xxx_free_wq, &cmd->work);
|
||||
queue_work(tcm_qla2xxx_free_wq, &cmd->work);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -547,7 +547,7 @@ static void tcm_qla2xxx_handle_data(struct qla_tgt_cmd *cmd)
|
|||
cmd->trc_flags |= TRC_DATA_IN;
|
||||
cmd->cmd_in_wq = 1;
|
||||
INIT_WORK(&cmd->work, tcm_qla2xxx_handle_data_work);
|
||||
queue_work_on(smp_processor_id(), tcm_qla2xxx_free_wq, &cmd->work);
|
||||
queue_work(tcm_qla2xxx_free_wq, &cmd->work);
|
||||
}
|
||||
|
||||
static int tcm_qla2xxx_chk_dif_tags(uint32_t tag)
|
||||
|
|
|
|||
|
|
@ -1392,16 +1392,16 @@ static ssize_t target_wwn_vendor_id_store(struct config_item *item,
|
|||
/* +2 to allow for a trailing (stripped) '\n' and null-terminator */
|
||||
unsigned char buf[INQUIRY_VENDOR_LEN + 2];
|
||||
char *stripped = NULL;
|
||||
size_t len;
|
||||
ssize_t len;
|
||||
ssize_t ret;
|
||||
|
||||
len = strlcpy(buf, page, sizeof(buf));
|
||||
if (len < sizeof(buf)) {
|
||||
len = strscpy(buf, page, sizeof(buf));
|
||||
if (len > 0) {
|
||||
/* Strip any newline added from userspace. */
|
||||
stripped = strstrip(buf);
|
||||
len = strlen(stripped);
|
||||
}
|
||||
if (len > INQUIRY_VENDOR_LEN) {
|
||||
if (len < 0 || len > INQUIRY_VENDOR_LEN) {
|
||||
pr_err("Emulated T10 Vendor Identification exceeds"
|
||||
" INQUIRY_VENDOR_LEN: " __stringify(INQUIRY_VENDOR_LEN)
|
||||
"\n");
|
||||
|
|
@ -1448,16 +1448,16 @@ static ssize_t target_wwn_product_id_store(struct config_item *item,
|
|||
/* +2 to allow for a trailing (stripped) '\n' and null-terminator */
|
||||
unsigned char buf[INQUIRY_MODEL_LEN + 2];
|
||||
char *stripped = NULL;
|
||||
size_t len;
|
||||
ssize_t len;
|
||||
ssize_t ret;
|
||||
|
||||
len = strlcpy(buf, page, sizeof(buf));
|
||||
if (len < sizeof(buf)) {
|
||||
len = strscpy(buf, page, sizeof(buf));
|
||||
if (len > 0) {
|
||||
/* Strip any newline added from userspace. */
|
||||
stripped = strstrip(buf);
|
||||
len = strlen(stripped);
|
||||
}
|
||||
if (len > INQUIRY_MODEL_LEN) {
|
||||
if (len < 0 || len > INQUIRY_MODEL_LEN) {
|
||||
pr_err("Emulated T10 Vendor exceeds INQUIRY_MODEL_LEN: "
|
||||
__stringify(INQUIRY_MODEL_LEN)
|
||||
"\n");
|
||||
|
|
@ -1504,16 +1504,16 @@ static ssize_t target_wwn_revision_store(struct config_item *item,
|
|||
/* +2 to allow for a trailing (stripped) '\n' and null-terminator */
|
||||
unsigned char buf[INQUIRY_REVISION_LEN + 2];
|
||||
char *stripped = NULL;
|
||||
size_t len;
|
||||
ssize_t len;
|
||||
ssize_t ret;
|
||||
|
||||
len = strlcpy(buf, page, sizeof(buf));
|
||||
if (len < sizeof(buf)) {
|
||||
len = strscpy(buf, page, sizeof(buf));
|
||||
if (len > 0) {
|
||||
/* Strip any newline added from userspace. */
|
||||
stripped = strstrip(buf);
|
||||
len = strlen(stripped);
|
||||
}
|
||||
if (len > INQUIRY_REVISION_LEN) {
|
||||
if (len < 0 || len > INQUIRY_REVISION_LEN) {
|
||||
pr_err("Emulated T10 Revision exceeds INQUIRY_REVISION_LEN: "
|
||||
__stringify(INQUIRY_REVISION_LEN)
|
||||
"\n");
|
||||
|
|
|
|||
|
|
@ -264,6 +264,7 @@ void target_free_cmd_counter(struct target_cmd_counter *cmd_cnt)
|
|||
percpu_ref_put(&cmd_cnt->refcnt);
|
||||
|
||||
percpu_ref_exit(&cmd_cnt->refcnt);
|
||||
kfree(cmd_cnt);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(target_free_cmd_counter);
|
||||
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/sched/clock.h>
|
||||
#include <linux/iopoll.h>
|
||||
#include <scsi/scsi_cmnd.h>
|
||||
#include <scsi/scsi_dbg.h>
|
||||
#include <scsi/scsi_driver.h>
|
||||
|
|
@ -2299,7 +2300,11 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
|
|||
*/
|
||||
static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
|
||||
{
|
||||
return ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY;
|
||||
u32 val;
|
||||
int ret = read_poll_timeout(ufshcd_readl, val, val & UIC_COMMAND_READY,
|
||||
500, UIC_CMD_TIMEOUT * 1000, false, hba,
|
||||
REG_CONTROLLER_STATUS);
|
||||
return ret == 0 ? true : false;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -2392,7 +2397,6 @@ __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
|
|||
bool completion)
|
||||
{
|
||||
lockdep_assert_held(&hba->uic_cmd_mutex);
|
||||
lockdep_assert_held(hba->host->host_lock);
|
||||
|
||||
if (!ufshcd_ready_for_uic_cmd(hba)) {
|
||||
dev_err(hba->dev,
|
||||
|
|
@ -2419,7 +2423,6 @@ __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
|
|||
int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
|
||||
{
|
||||
int ret;
|
||||
unsigned long flags;
|
||||
|
||||
if (hba->quirks & UFSHCD_QUIRK_BROKEN_UIC_CMD)
|
||||
return 0;
|
||||
|
|
@ -2428,9 +2431,7 @@ int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
|
|||
mutex_lock(&hba->uic_cmd_mutex);
|
||||
ufshcd_add_delay_before_dme_cmd(hba);
|
||||
|
||||
spin_lock_irqsave(hba->host->host_lock, flags);
|
||||
ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
|
||||
spin_unlock_irqrestore(hba->host->host_lock, flags);
|
||||
if (!ret)
|
||||
ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
|
||||
|
||||
|
|
@ -4133,8 +4134,8 @@ static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
|
|||
wmb();
|
||||
reenable_intr = true;
|
||||
}
|
||||
ret = __ufshcd_send_uic_cmd(hba, cmd, false);
|
||||
spin_unlock_irqrestore(hba->host->host_lock, flags);
|
||||
ret = __ufshcd_send_uic_cmd(hba, cmd, false);
|
||||
if (ret) {
|
||||
dev_err(hba->dev,
|
||||
"pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
|
||||
|
|
|
|||
|
|
@ -53,10 +53,10 @@
|
|||
struct nvmefc_ls_req {
|
||||
void *rqstaddr;
|
||||
dma_addr_t rqstdma;
|
||||
__le32 rqstlen;
|
||||
u32 rqstlen;
|
||||
void *rspaddr;
|
||||
dma_addr_t rspdma;
|
||||
__le32 rsplen;
|
||||
u32 rsplen;
|
||||
u32 timeout;
|
||||
|
||||
void *private;
|
||||
|
|
@ -120,7 +120,7 @@ struct nvmefc_ls_req {
|
|||
struct nvmefc_ls_rsp {
|
||||
void *rspbuf;
|
||||
dma_addr_t rspdma;
|
||||
__le32 rsplen;
|
||||
u16 rsplen;
|
||||
|
||||
void (*done)(struct nvmefc_ls_rsp *rsp);
|
||||
void *nvme_fc_private; /* LLDD is not to access !! */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user