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drm/ast: Align naming in widescreen detection code to manual

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Rename variables and register constants to align with the programming
manual. Add new constants where necessary.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250131092257.115596-3-tzimmermann@suse.de
This commit is contained in:
Thomas Zimmermann 2025-01-31 10:21:02 +01:00
parent 707e860119
commit fdebbb2cec
4 changed files with 12 additions and 11 deletions
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2
drivers/gpu/drm/ast/ast_drv.c
View File

@ -170,7 +170,7 @@ static int ast_detect_chip(struct pci_dev *pdev,
/* Patch AST2500/AST2510 */
if ((pdev->revision & 0xf0) == 0x40) {
if (!(vgacrd0 & AST_VRAM_INIT_STATUS_MASK))
if (!(vgacrd0 & AST_IO_VGACRD0_VRAM_INIT_STATUS_MASK))
ast_patch_ahb_2500(regs);
}

8
drivers/gpu/drm/ast/ast_main.c
View File

@ -38,7 +38,7 @@
static void ast_detect_widescreen(struct ast_device *ast)
{
u8 jreg;
u8 vgacrd0;
/* Check if we support wide screen */
switch (AST_GEN(ast)) {
@ -46,10 +46,10 @@ static void ast_detect_widescreen(struct ast_device *ast)
ast->support_wide_screen = false;
break;
default:
jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff);
if (!(jreg & 0x80))
vgacrd0 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd0);
if (!(vgacrd0 & AST_IO_VGACRD0_VRAM_INIT_BY_BMC))
ast->support_wide_screen = true;
else if (jreg & 0x01)
else if (vgacrd0 & AST_IO_VGACRD0_IKVM_WIDESCREEN)
ast->support_wide_screen = true;
else {
ast->support_wide_screen = false;

2
drivers/gpu/drm/ast/ast_post.c
View File

@ -2062,7 +2062,7 @@ void ast_post_chip_2500(struct ast_device *ast)
u8 reg;
reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff);
if ((reg & AST_VRAM_INIT_STATUS_MASK) == 0) {/* vga only */
if ((reg & AST_IO_VGACRD0_VRAM_INIT_STATUS_MASK) == 0) {/* vga only */
/* Clear bus lock condition */
ast_patch_ahb_2500(ast->regs);

11
drivers/gpu/drm/ast/ast_reg.h
View File

@ -38,6 +38,12 @@
#define AST_IO_VGACRCB_HWC_16BPP BIT(0) /* set: ARGB4444, cleared: 2bpp palette */
#define AST_IO_VGACRCB_HWC_ENABLED BIT(1)
/* mirrors SCU100[7:0] */
#define AST_IO_VGACRD0_VRAM_INIT_STATUS_MASK GENMASK(7, 6)
#define AST_IO_VGACRD0_VRAM_INIT_BY_BMC BIT(7)
#define AST_IO_VGACRD0_VRAM_INIT_READY BIT(6)
#define AST_IO_VGACRD0_IKVM_WIDESCREEN BIT(0)
#define AST_IO_VGACRD1_MCU_FW_EXECUTING BIT(5)
/* Display Transmitter Type */
#define AST_IO_VGACRD1_TX_TYPE_MASK GENMASK(3, 1)
@ -61,11 +67,6 @@
#define AST_IO_VGAIR1_R (0x5A)
#define AST_IO_VGAIR1_VREFRESH BIT(3)
#define AST_VRAM_INIT_STATUS_MASK GENMASK(7, 6)
//#define AST_VRAM_INIT_BY_BMC BIT(7)
//#define AST_VRAM_INIT_READY BIT(6)
/*
* AST DisplayPort
*/