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drm/amdgpu: Implement PSP cmd UAL_GET_CONFIG
To query UALink configuration information from PSP. Signed-off-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Mukul Joshi <mukul.joshi@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -835,6 +835,8 @@ static const char *psp_gfx_cmd_name(enum psp_gfx_cmd_id cmd_id)
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return "PERF MONITORING HW";
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case GFX_CMD_ID_UAL_GET_INTERFACE_VER:
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return "UAL_GET_INTERFACE_VER";
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case GFX_CMD_ID_UAL_GET_CONFIG:
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return "UAL_GET_CONFIG";
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default:
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return "UNKNOWN CMD";
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}
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@ -1218,6 +1220,62 @@ int psp_ual_get_interface_version(struct psp_context *psp, uint32_t *intf_ver)
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return ret;
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}
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int psp_ual_query_info(struct psp_context *psp, uint32_t intf_ver,
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struct amdgpu_ualink_info *info)
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{
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struct psp_gfx_get_config_ual_v1 *ual_config;
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struct psp_gfx_cmd_resp *cmd;
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int ret;
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/* TBD check interface version 1.x */
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if (intf_ver > 0x1ffff) {
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pr_warn("PSP UAL interface version mismatch: 0x%x\n", intf_ver);
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return -EOPNOTSUPP;
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}
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cmd = acquire_psp_cmd_buf(psp);
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ual_config = psp->cmd_ext_resp_mem;
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cmd->cmd_id = GFX_CMD_ID_UAL_GET_CONFIG;
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cmd->cmd.cmd_get_config_ual.ual_cfg_addr_lo = lower_32_bits(psp->cmd_ext_resp_mc_addr);
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cmd->cmd.cmd_get_config_ual.ual_cfg_addr_hi = upper_32_bits(psp->cmd_ext_resp_mc_addr);
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cmd->cmd.cmd_get_config_ual.ual_cfg_size = sizeof(*ual_config);
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ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
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if (!ret && !cmd->resp.status) {
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WARN_ON(cmd->resp.uresp.get_config_ual.resp_size < sizeof(*ual_config));
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info->link_type = (enum amdgpu_ualink_type)ual_config->link_type;
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info->ppod.accel_id = ual_config->accelerator_id;
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info->ppod.bandwidth = ual_config->bandwidth;
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info->ppod.latency = ual_config->latency;
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info->ppod.size = ual_config->ppod_size;
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memcpy(&info->ppod.id, ual_config->ppod_id, sizeof(info->ppod.id));
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info->vpod.id = ual_config->vpod_id;
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info->vpod.size = ual_config->vpod_size;
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info->vpod.addr_mode = ual_config->addr_mode;
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bitmap_from_arr32(info->vpod.active_accel_bits,
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ual_config->vpod_active_accelerators,
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min(AMDGPU_UALINK_ACCEL_MAX, PSP_GFX_UAL_MAX_ACC_BIT_MASK*32));
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/* Ensure no uninitialized data in the bitmap, even if these
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* constants change in the future.
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*/
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if (AMDGPU_UALINK_ACCEL_MAX > PSP_GFX_UAL_MAX_ACC_BIT_MASK*32)
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bitmap_clear(info->vpod.active_accel_bits, PSP_GFX_UAL_MAX_ACC_BIT_MASK*32,
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AMDGPU_UALINK_ACCEL_MAX - PSP_GFX_UAL_MAX_ACC_BIT_MASK*32);
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} else if (!ret) {
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ret = -EINVAL;
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}
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release_psp_cmd_buf(psp);
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return ret;
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}
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int psp_update_fw_reservation(struct psp_context *psp)
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{
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int ret;
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@ -705,6 +705,12 @@ int amdgpu_psp_irq_mgr_register(
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struct amdgpu_psp_irq_mgr *mgr,
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const struct amdgpu_psp_irq_handler *handlers, int count,
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const struct amdgpu_psp_irq_handler *default_handler);
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struct amdgpu_ualink_info;
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int psp_ual_get_interface_version(struct psp_context *psp, uint32_t *intf_ver);
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int psp_ual_query_info(struct psp_context *psp, uint32_t intf_ver,
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struct amdgpu_ualink_info *info);
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#endif
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