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net/mlx5: Add Fast teardown support
Today mlx5 devices support two teardown modes: 1- Regular teardown 2- Force teardown This change introduces the enhanced version of the "Force teardown" that allows SW to perform teardown in a faster way without the need to reclaim all the pages. Fast teardown provides the following advantages: 1- Fix a FW race condition that could cause command timeout 2- Avoid moving to polling mode 3- Close the vport to prevent PCI ACK to be sent without been scatter to memory Signed-off-by: Feras Daoud <ferasda@mellanox.com> Reviewed-by: Majd Dibbiny <majd@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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94563847a8
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fcd29ad17c
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@ -250,7 +250,7 @@ int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev)
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if (ret)
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return ret;
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force_state = MLX5_GET(teardown_hca_out, out, force_state);
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force_state = MLX5_GET(teardown_hca_out, out, state);
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if (force_state == MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL) {
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mlx5_core_warn(dev, "teardown with force mode failed, doing normal teardown\n");
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return -EIO;
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@ -259,6 +259,54 @@ int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev)
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return 0;
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}
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#define MLX5_FAST_TEARDOWN_WAIT_MS 3000
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int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev)
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{
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unsigned long end, delay_ms = MLX5_FAST_TEARDOWN_WAIT_MS;
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u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0};
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u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0};
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int state;
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int ret;
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if (!MLX5_CAP_GEN(dev, fast_teardown)) {
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mlx5_core_dbg(dev, "fast teardown is not supported in the firmware\n");
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return -EOPNOTSUPP;
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}
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MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA);
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MLX5_SET(teardown_hca_in, in, profile,
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MLX5_TEARDOWN_HCA_IN_PROFILE_PREPARE_FAST_TEARDOWN);
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ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
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if (ret)
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return ret;
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state = MLX5_GET(teardown_hca_out, out, state);
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if (state == MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL) {
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mlx5_core_warn(dev, "teardown with fast mode failed\n");
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return -EIO;
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}
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mlx5_set_nic_state(dev, MLX5_NIC_IFC_DISABLED);
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/* Loop until device state turns to disable */
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end = jiffies + msecs_to_jiffies(delay_ms);
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do {
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if (mlx5_get_nic_state(dev) == MLX5_NIC_IFC_DISABLED)
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break;
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cond_resched();
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} while (!time_after(jiffies, end));
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if (mlx5_get_nic_state(dev) != MLX5_NIC_IFC_DISABLED) {
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dev_err(&dev->pdev->dev, "NIC IFC still %d after %lums.\n",
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mlx5_get_nic_state(dev), delay_ms);
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return -EIO;
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}
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return 0;
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}
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enum mlxsw_reg_mcc_instruction {
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MLX5_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE = 0x01,
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MLX5_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE = 0x02,
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@ -58,23 +58,26 @@ enum {
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MLX5_HEALTH_SYNDR_HIGH_TEMP = 0x10
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};
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enum {
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MLX5_NIC_IFC_FULL = 0,
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MLX5_NIC_IFC_DISABLED = 1,
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MLX5_NIC_IFC_NO_DRAM_NIC = 2,
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MLX5_NIC_IFC_INVALID = 3
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};
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enum {
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MLX5_DROP_NEW_HEALTH_WORK,
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MLX5_DROP_NEW_RECOVERY_WORK,
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};
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static u8 get_nic_state(struct mlx5_core_dev *dev)
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u8 mlx5_get_nic_state(struct mlx5_core_dev *dev)
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{
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return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 3;
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}
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void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state)
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{
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u32 cur_cmdq_addr_l_sz;
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cur_cmdq_addr_l_sz = ioread32be(&dev->iseg->cmdq_addr_l_sz);
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iowrite32be((cur_cmdq_addr_l_sz & 0xFFFFF000) |
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state << MLX5_NIC_IFC_OFFSET,
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&dev->iseg->cmdq_addr_l_sz);
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}
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static void trigger_cmd_completions(struct mlx5_core_dev *dev)
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{
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unsigned long flags;
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@ -103,7 +106,7 @@ static int in_fatal(struct mlx5_core_dev *dev)
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struct mlx5_core_health *health = &dev->priv.health;
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struct health_buffer __iomem *h = health->health;
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if (get_nic_state(dev) == MLX5_NIC_IFC_DISABLED)
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if (mlx5_get_nic_state(dev) == MLX5_NIC_IFC_DISABLED)
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return 1;
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if (ioread32be(&h->fw_ver) == 0xffffffff)
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@ -133,7 +136,7 @@ void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force)
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static void mlx5_handle_bad_state(struct mlx5_core_dev *dev)
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{
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u8 nic_interface = get_nic_state(dev);
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u8 nic_interface = mlx5_get_nic_state(dev);
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switch (nic_interface) {
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case MLX5_NIC_IFC_FULL:
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@ -168,7 +171,7 @@ static void health_recover(struct work_struct *work)
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priv = container_of(health, struct mlx5_priv, health);
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dev = container_of(priv, struct mlx5_core_dev, priv);
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nic_state = get_nic_state(dev);
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nic_state = mlx5_get_nic_state(dev);
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if (nic_state == MLX5_NIC_IFC_INVALID) {
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dev_err(&dev->pdev->dev, "health recovery flow aborted since the nic state is invalid\n");
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return;
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@ -1594,12 +1594,17 @@ static const struct pci_error_handlers mlx5_err_handler = {
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static int mlx5_try_fast_unload(struct mlx5_core_dev *dev)
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{
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int ret;
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bool fast_teardown = false, force_teardown = false;
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int ret = 1;
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if (!MLX5_CAP_GEN(dev, force_teardown)) {
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mlx5_core_dbg(dev, "force teardown is not supported in the firmware\n");
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fast_teardown = MLX5_CAP_GEN(dev, fast_teardown);
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force_teardown = MLX5_CAP_GEN(dev, force_teardown);
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mlx5_core_dbg(dev, "force teardown firmware support=%d\n", force_teardown);
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mlx5_core_dbg(dev, "fast teardown firmware support=%d\n", fast_teardown);
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if (!fast_teardown && !force_teardown)
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return -EOPNOTSUPP;
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}
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if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
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mlx5_core_dbg(dev, "Device in internal error state, giving up\n");
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@ -1612,13 +1617,19 @@ static int mlx5_try_fast_unload(struct mlx5_core_dev *dev)
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mlx5_drain_health_wq(dev);
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mlx5_stop_health_poll(dev, false);
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ret = mlx5_cmd_force_teardown_hca(dev);
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if (ret) {
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mlx5_core_dbg(dev, "Firmware couldn't do fast unload error: %d\n", ret);
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mlx5_start_health_poll(dev);
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return ret;
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}
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ret = mlx5_cmd_fast_teardown_hca(dev);
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if (!ret)
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goto succeed;
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ret = mlx5_cmd_force_teardown_hca(dev);
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if (!ret)
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goto succeed;
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mlx5_core_dbg(dev, "Firmware couldn't do fast unload error: %d\n", ret);
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mlx5_start_health_poll(dev);
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return ret;
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succeed:
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mlx5_enter_error_state(dev, true);
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/* Some platforms requiring freeing the IRQ's in the shutdown
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@ -95,6 +95,8 @@ int mlx5_query_board_id(struct mlx5_core_dev *dev);
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int mlx5_cmd_init_hca(struct mlx5_core_dev *dev, uint32_t *sw_owner_id);
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int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
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int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
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int mlx5_cmd_fast_teardown_hca(struct mlx5_core_dev *dev);
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void mlx5_core_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
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unsigned long param);
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void mlx5_core_page_fault(struct mlx5_core_dev *dev,
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@ -214,4 +216,14 @@ int mlx5_lag_allow(struct mlx5_core_dev *dev);
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int mlx5_lag_forbid(struct mlx5_core_dev *dev);
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void mlx5_reload_interface(struct mlx5_core_dev *mdev, int protocol);
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enum {
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MLX5_NIC_IFC_FULL = 0,
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MLX5_NIC_IFC_DISABLED = 1,
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MLX5_NIC_IFC_NO_DRAM_NIC = 2,
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MLX5_NIC_IFC_INVALID = 3
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};
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u8 mlx5_get_nic_state(struct mlx5_core_dev *dev);
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void mlx5_set_nic_state(struct mlx5_core_dev *dev, u8 state);
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#endif /* __MLX5_CORE_H__ */
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@ -504,6 +504,10 @@ struct health_buffer {
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__be16 ext_synd;
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};
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enum mlx5_cmd_addr_l_sz_offset {
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MLX5_NIC_IFC_OFFSET = 8,
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};
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struct mlx5_init_seg {
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__be32 fw_rev;
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__be32 cmdif_rev_fw_sub;
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@ -896,7 +896,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 log_max_mkey[0x6];
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u8 reserved_at_f0[0x8];
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u8 dump_fill_mkey[0x1];
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u8 reserved_at_f9[0x3];
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u8 reserved_at_f9[0x2];
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u8 fast_teardown[0x1];
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u8 log_max_eq[0x4];
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u8 max_indirection[0x8];
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@ -3352,12 +3353,13 @@ struct mlx5_ifc_teardown_hca_out_bits {
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u8 reserved_at_40[0x3f];
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u8 force_state[0x1];
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u8 state[0x1];
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};
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enum {
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MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
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MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
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MLX5_TEARDOWN_HCA_IN_PROFILE_PREPARE_FAST_TEARDOWN = 0x2,
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};
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struct mlx5_ifc_teardown_hca_in_bits {
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