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soc: qcom: ubwc: drop macrotile_mode from the database

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All the users have been migrated to using qcom_ubwc_macrotile_mode()
instead of reading the raw value from the config structure. Drop the
field from struct qcom_ubwc_cfg_data and replace it with the calculated
value. Split single UBWC_3_0 into UBWC_3_0 (no macrotile mode) and
UBWC_3_1 (with macrotile mode).

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-25-72f2749bc807@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2026-05-20 17:51:32 +03:00 committed by Bjorn Andersson
parent 5a9f4c535a
commit fc54caf87a
2 changed files with 11 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/soc/qcom/ubwc_config.c
View File

@ -22,7 +22,6 @@ static const struct qcom_ubwc_cfg_data eliza_data = {
UBWC_SWIZZLE_ENABLE_LVL3,
/* TODO: highest_bank_bit = 14 for LP_DDR4 */
.highest_bank_bit = 15,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data kaanapali_data = {
@ -30,7 +29,6 @@ static const struct qcom_ubwc_cfg_data kaanapali_data = {
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 16,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data msm8937_data = {
@ -58,15 +56,13 @@ static const struct qcom_ubwc_cfg_data sa8775p_data = {
.ubwc_enc_version = UBWC_4_0,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 13,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data sar2130p_data = {
.ubwc_enc_version = UBWC_3_0, /* 4.0.2 in hw */
.ubwc_enc_version = UBWC_3_1,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 13,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data sc7180_data = {
@ -77,19 +73,17 @@ static const struct qcom_ubwc_cfg_data sc7180_data = {
};
static const struct qcom_ubwc_cfg_data sc7280_data = {
.ubwc_enc_version = UBWC_3_0,
.ubwc_enc_version = UBWC_3_1,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data sc8180x_data = {
.ubwc_enc_version = UBWC_3_0,
.ubwc_enc_version = UBWC_3_1,
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 16,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data sc8280xp_data = {
@ -97,7 +91,6 @@ static const struct qcom_ubwc_cfg_data sc8280xp_data = {
.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 16,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data sdm670_data = {
@ -164,7 +157,6 @@ static const struct qcom_ubwc_cfg_data sm8250_data = {
UBWC_SWIZZLE_ENABLE_LVL3,
/* TODO: highest_bank_bit = 15 for LP_DDR4 */
.highest_bank_bit = 16,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data sm8350_data = {
@ -173,7 +165,6 @@ static const struct qcom_ubwc_cfg_data sm8350_data = {
UBWC_SWIZZLE_ENABLE_LVL3,
/* TODO: highest_bank_bit = 15 for LP_DDR4 */
.highest_bank_bit = 16,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data sm8550_data = {
@ -182,7 +173,6 @@ static const struct qcom_ubwc_cfg_data sm8550_data = {
UBWC_SWIZZLE_ENABLE_LVL3,
/* TODO: highest_bank_bit = 15 for LP_DDR4 */
.highest_bank_bit = 16,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data sm8750_data = {
@ -190,7 +180,6 @@ static const struct qcom_ubwc_cfg_data sm8750_data = {
.ubwc_swizzle = 6,
/* TODO: highest_bank_bit = 15 for LP_DDR4 */
.highest_bank_bit = 16,
.macrotile_mode = true,
};
static const struct qcom_ubwc_cfg_data glymur_data = {
@ -198,7 +187,6 @@ static const struct qcom_ubwc_cfg_data glymur_data = {
.ubwc_swizzle = 0,
/* TODO: highest_bank_bit = 15 for LP_DDR4 */
.highest_bank_bit = 16,
.macrotile_mode = true,
};
static const struct of_device_id qcom_ubwc_configs[] __maybe_unused = {

18
include/linux/soc/qcom/ubwc.h
View File

@ -33,15 +33,6 @@ struct qcom_ubwc_cfg_data {
* DDR bank. This should ideally use DRAM type detection.
*/
int highest_bank_bit;
/**
* @macrotile_mode: Macrotile Mode
*
* Whether to use 4-channel macrotiling mode or the newer
* 8-channel macrotiling mode introduced in UBWC 3.1. 0 is
* 4-channel and 1 is 8-channel.
*/
bool macrotile_mode;
};
#define UBWC_1_0 0x10000000
@ -77,9 +68,16 @@ static inline bool qcom_ubwc_min_acc_length_64b(const struct qcom_ubwc_cfg_data
return cfg->ubwc_enc_version == UBWC_1_0;
}
/*
* @qcom_ubwc_macrotile_mode: whether to use 4-channel or 8-channel macrotiling
*
* The 8-channel macrotiling mode was introduced in UBWC 3.1.
*
* Returns: false for the 4-channel and true for 8-channel.
*/
static inline bool qcom_ubwc_macrotile_mode(const struct qcom_ubwc_cfg_data *cfg)
{
return cfg->macrotile_mode;
return cfg->ubwc_enc_version >= UBWC_3_1;
}
static inline bool qcom_ubwc_bank_spread(const struct qcom_ubwc_cfg_data *cfg)