From d7d5974b156e2ef7436483de00ccada5987c9d31 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Nov 2015 14:20:34 -0800 Subject: [PATCH 01/68] ARM: dts: gose: Add GPIO keys to DT Instantiate the GPIO keys in the gose device tree. Based on similar work for the koelsch board by Laurent Pinchart. Signed-off-by: Simon Horman Tested-by: Magnus Damm --- arch/arm/boot/dts/r8a7793-gose.dts | 82 ++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index baa59fe84298..ccbc1c66cc6c 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -31,6 +31,88 @@ memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x40000000>; }; + + gpio-keys { + compatible = "gpio-keys"; + + key-1 { + gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW2-1"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-2 { + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW2-2"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-3 { + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW2-3"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-4 { + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW2-4"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-a { + gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW30"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-b { + gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW31"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-c { + gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW32"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-d { + gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW33"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-e { + gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW34"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-f { + gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW35"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-g { + gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "SW36"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + }; }; &extal_clk { From 3b18d8593d4cb6880c6647c26ccfcd3eb5a849d9 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 18 Nov 2015 14:20:35 -0800 Subject: [PATCH 02/68] ARM: dts: gose: Add GPIO leds to DT Instantiate the GPIO leds in the gose device tree. Based on similar work for the koelsch board by Magnus Damm. Signed-off-by: Simon Horman Tested-by: Magnus Damm --- arch/arm/boot/dts/r8a7793-gose.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index ccbc1c66cc6c..90b587c3c736 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -113,6 +113,22 @@ key-g { debounce-interval = <20>; }; }; + + leds { + compatible = "gpio-leds"; + led6 { + gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; + label = "LED6"; + }; + led7 { + gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; + label = "LED7"; + }; + led8 { + gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; + label = "LED8"; + }; + }; }; &extal_clk { From c5af8a4248d3cb01078d2a20df28081dd588b0e3 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 25 Dec 2015 01:45:30 +0300 Subject: [PATCH 03/68] ARM: dts: porter: add DU DT support Define the Porter board dependent part of the DU device node. Add the device node for Analog Devices ADV7511W HDMI transmitter to I2C2 bus and the HDMI connector. Add the necessary subnodes to interconnect DU and HDMI devices. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-porter.dts | 81 ++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index 6713b1ea732b..fe81fa0e478c 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -78,6 +78,29 @@ vccq_sdhi2: regulator@3 { states = <3300000 1 1800000 0>; }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; + + x3_clk: x3-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; + + x16_clk: x16-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; }; &extal_clk { @@ -139,6 +162,11 @@ can0_pins: can0 { renesas,groups = "can0_data"; renesas,function = "can0"; }; + + du_pins: du { + renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; + renesas,function = "du"; + }; }; &scif0 { @@ -241,6 +269,38 @@ adv7180: endpoint { }; }; }; + + hdmi@39 { + compatible = "adi,adv7511w"; + reg = <0x39>; + interrupt-parent = <&gpio3>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; }; &sata0 { @@ -304,3 +364,24 @@ &can0 { status = "okay"; }; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + clocks = <&mstp7_clks R8A7791_CLK_DU0>, + <&mstp7_clks R8A7791_CLK_DU1>, + <&mstp7_clks R8A7791_CLK_LVDS0>, + <&x3_clk>, <&x16_clk>; + clock-names = "du.0", "du.1", "lvds.0", + "dclkin.0", "dclkin.1"; + + ports { + port@1 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; + }; +}; From 7aed17f4450ba6863937797d88dab64088f38ccc Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 28 Dec 2015 12:40:21 +0200 Subject: [PATCH 04/68] ARM: dts: r8a7793: Add I2C master nodes to DT Instantiate all the 9 I2C controllers in the disabled state. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 135 ++++++++++++++++++++++++++++++++- 1 file changed, 132 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index aef9e69d6c26..f9d92de4f65b 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -19,6 +19,15 @@ / { #size-cells = <2>; aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; spi0 = &qspi; }; @@ -230,6 +239,120 @@ irqc0: interrupt-controller@e61c0000 { power-domains = <&cpg_clocks>; }; + /* The memory map in the User's Manual maps the cores to bus numbers */ + i2c0: i2c@e6508000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7793"; + reg = <0 0xe6508000 0 0x40>; + interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_I2C0>; + power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c1: i2c@e6518000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7793"; + reg = <0 0xe6518000 0 0x40>; + interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_I2C1>; + power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c2: i2c@e6530000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7793"; + reg = <0 0xe6530000 0 0x40>; + interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_I2C2>; + power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c3: i2c@e6540000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7793"; + reg = <0 0xe6540000 0 0x40>; + interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_I2C3>; + power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c4: i2c@e6520000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7793"; + reg = <0 0xe6520000 0 0x40>; + interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_I2C4>; + power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c5: i2c@e6528000 { + /* doesn't need pinmux */ + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7793"; + reg = <0 0xe6528000 0 0x40>; + interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_I2C5>; + power-domains = <&cpg_clocks>; + i2c-scl-internal-delay-ns = <110>; + status = "disabled"; + }; + + i2c6: i2c@e60b0000 { + /* doesn't need pinmux */ + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; + reg = <0 0xe60b0000 0 0x425>; + interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>; + dmas = <&dmac0 0x77>, <&dmac0 0x78>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + i2c7: i2c@e6500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; + reg = <0 0xe6500000 0 0x425>; + interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7793_CLK_IIC0>; + dmas = <&dmac0 0x61>, <&dmac0 0x62>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + + i2c8: i2c@e6510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; + reg = <0 0xe6510000 0 0x425>; + interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7793_CLK_IIC1>; + dmas = <&dmac0 0x65>, <&dmac0 0x66>; + dma-names = "tx", "rx"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; + pfc: pfc@e6060000 { compatible = "renesas,pfc-r8a7793"; reg = <0 0xe6060000 0 0x250>; @@ -820,19 +943,25 @@ mstp9_clks: mstp9_clks@e6150994 { reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, - <&cpg_clocks R8A7793_CLK_QSPI>; + <&cpg_clocks R8A7793_CLK_QSPI>, <&hp_clk>, + <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, + <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6 R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4 R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2 R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0 - R8A7793_CLK_QSPI_MOD + R8A7793_CLK_QSPI_MOD R8A7793_CLK_I2C5 + R8A7793_CLK_IICDVFS R8A7793_CLK_I2C4 + R8A7793_CLK_I2C3 R8A7793_CLK_I2C2 + R8A7793_CLK_I2C1 R8A7793_CLK_I2C0 >; clock-output-names = "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", - "qspi_mod"; + "qspi_mod", "i2c5", "i2c6", "i2c4", + "i2c3", "i2c2", "i2c1", "i2c0"; }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; From 6b78e6ae688b09aa75376537bcfa990c9d4eff07 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 4 Jan 2016 21:36:59 +1100 Subject: [PATCH 05/68] ARM: dts: alt: Add QSPI device to DT Enable the QSPI controller in the alt device tree. Based similar work for the silk board by by Vladimir Barinov and Sergei Shtylyov. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794-alt.dts | 46 +++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 2394e4883786..773f304d1142 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -138,6 +138,13 @@ &cmt0 { status = "okay"; }; +&pfc { + qspi_pins: spi0 { + renesas,groups = "qspi_ctrl", "qspi_data4"; + renesas,function = "qspi"; + }; +}; + ðer { pinctrl-0 = <ðer_pins &phy1_pins>; pinctrl-names = "default"; @@ -197,3 +204,42 @@ &scif2 { status = "okay"; }; + +&qspi { + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash@0 { + compatible = "spansion,s25fl512s", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <30000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-cpol; + spi-cpha; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "loader"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "system"; + reg = <0x00040000 0x00040000>; + read-only; + }; + partition@80000 { + label = "user"; + reg = <0x00080000 0x03f80000>; + }; + }; + }; +}; From d87ec94aee6dc62ed5db4cad7dba47006c0dd00e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 4 Jan 2016 08:20:17 +1100 Subject: [PATCH 06/68] ARM: dts: r8a7790: use fallback usbhs compatibility string Use recently added fallback compatibility string in r8a7790 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 7dfd393bfc7e..4d9af0f46fab 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -746,7 +746,7 @@ sata1: sata@ee500000 { }; hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a7790"; + compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs"; reg = <0 0xe6590000 0 0x100>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; From 8cf1d454b24961223fc3e8d26808d4f72b484a1b Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 4 Jan 2016 08:20:18 +1100 Subject: [PATCH 07/68] ARM: dts: r8a7791: use fallback usbhs compatibility string Use recently added fallback compatibility string in r8a7791 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 2a369ddcb6fd..829224d2a3ed 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -822,7 +822,7 @@ sata1: sata@ee500000 { }; hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a7791"; + compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs"; reg = <0 0xe6590000 0 0x100>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp7_clks R8A7791_CLK_HSUSB>; From 1472ffa81a9089af6250e299068f9a877369333f Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 8 Dec 2015 14:24:50 +0900 Subject: [PATCH 08/68] ARM: dts: r8a7794: use fallback usbhs compatibility string Use recently added fallback compatibility string in r8a7794 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 6c78f1fae90f..f8cd3a0beebf 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -724,7 +724,7 @@ usb@0,2 { }; hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a7794"; + compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs"; reg = <0 0xe6590000 0 0x100>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp7_clks R8A7794_CLK_HSUSB>; From cefe5a56d3ffcdad0c63dda37f90845f42518e0a Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 5 Jan 2016 09:15:41 +1100 Subject: [PATCH 09/68] ARM: dts: r8a7793: move dmac nodes Move dmac nodes in the r8a7793 device tree to match their location in the r8a7791 device tree to aid comparison between the device trees of these similar SoCs. Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 124 ++++++++++++++++----------------- 1 file changed, 62 insertions(+), 62 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index f9d92de4f65b..0ce7cc420c9d 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -239,6 +239,68 @@ irqc0: interrupt-controller@e61c0000 { power-domains = <&cpg_clocks>; }; + dmac0: dma-controller@e6700000 { + compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x20000>; + interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH + 0 200 IRQ_TYPE_LEVEL_HIGH + 0 201 IRQ_TYPE_LEVEL_HIGH + 0 202 IRQ_TYPE_LEVEL_HIGH + 0 203 IRQ_TYPE_LEVEL_HIGH + 0 204 IRQ_TYPE_LEVEL_HIGH + 0 205 IRQ_TYPE_LEVEL_HIGH + 0 206 IRQ_TYPE_LEVEL_HIGH + 0 207 IRQ_TYPE_LEVEL_HIGH + 0 208 IRQ_TYPE_LEVEL_HIGH + 0 209 IRQ_TYPE_LEVEL_HIGH + 0 210 IRQ_TYPE_LEVEL_HIGH + 0 211 IRQ_TYPE_LEVEL_HIGH + 0 212 IRQ_TYPE_LEVEL_HIGH + 0 213 IRQ_TYPE_LEVEL_HIGH + 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <15>; + }; + + dmac1: dma-controller@e6720000 { + compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; + reg = <0 0xe6720000 0 0x20000>; + interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH + 0 216 IRQ_TYPE_LEVEL_HIGH + 0 217 IRQ_TYPE_LEVEL_HIGH + 0 218 IRQ_TYPE_LEVEL_HIGH + 0 219 IRQ_TYPE_LEVEL_HIGH + 0 308 IRQ_TYPE_LEVEL_HIGH + 0 309 IRQ_TYPE_LEVEL_HIGH + 0 310 IRQ_TYPE_LEVEL_HIGH + 0 311 IRQ_TYPE_LEVEL_HIGH + 0 312 IRQ_TYPE_LEVEL_HIGH + 0 313 IRQ_TYPE_LEVEL_HIGH + 0 314 IRQ_TYPE_LEVEL_HIGH + 0 315 IRQ_TYPE_LEVEL_HIGH + 0 316 IRQ_TYPE_LEVEL_HIGH + 0 317 IRQ_TYPE_LEVEL_HIGH + 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <15>; + }; + /* The memory map in the User's Manual maps the cores to bus numbers */ i2c0: i2c@e6508000 { #address-cells = <1>; @@ -358,68 +420,6 @@ pfc: pfc@e6060000 { reg = <0 0xe6060000 0 0x250>; }; - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x20000>; - interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH - 0 200 IRQ_TYPE_LEVEL_HIGH - 0 201 IRQ_TYPE_LEVEL_HIGH - 0 202 IRQ_TYPE_LEVEL_HIGH - 0 203 IRQ_TYPE_LEVEL_HIGH - 0 204 IRQ_TYPE_LEVEL_HIGH - 0 205 IRQ_TYPE_LEVEL_HIGH - 0 206 IRQ_TYPE_LEVEL_HIGH - 0 207 IRQ_TYPE_LEVEL_HIGH - 0 208 IRQ_TYPE_LEVEL_HIGH - 0 209 IRQ_TYPE_LEVEL_HIGH - 0 210 IRQ_TYPE_LEVEL_HIGH - 0 211 IRQ_TYPE_LEVEL_HIGH - 0 212 IRQ_TYPE_LEVEL_HIGH - 0 213 IRQ_TYPE_LEVEL_HIGH - 0 214 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>; - clock-names = "fck"; - power-domains = <&cpg_clocks>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - dmac1: dma-controller@e6720000 { - compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; - reg = <0 0xe6720000 0 0x20000>; - interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH - 0 216 IRQ_TYPE_LEVEL_HIGH - 0 217 IRQ_TYPE_LEVEL_HIGH - 0 218 IRQ_TYPE_LEVEL_HIGH - 0 219 IRQ_TYPE_LEVEL_HIGH - 0 308 IRQ_TYPE_LEVEL_HIGH - 0 309 IRQ_TYPE_LEVEL_HIGH - 0 310 IRQ_TYPE_LEVEL_HIGH - 0 311 IRQ_TYPE_LEVEL_HIGH - 0 312 IRQ_TYPE_LEVEL_HIGH - 0 313 IRQ_TYPE_LEVEL_HIGH - 0 314 IRQ_TYPE_LEVEL_HIGH - 0 315 IRQ_TYPE_LEVEL_HIGH - 0 316 IRQ_TYPE_LEVEL_HIGH - 0 317 IRQ_TYPE_LEVEL_HIGH - 0 318 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>; - clock-names = "fck"; - power-domains = <&cpg_clocks>; - #dma-cells = <1>; - dma-channels = <15>; - }; - scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7793", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; From f6890af3ad2b6440d287c8ee97b3f38e18b0674e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 5 Jan 2016 09:16:20 +1100 Subject: [PATCH 10/68] ARM: dts: gose: add i2c2 bus to device tree Activate i2c2 bus in r8a7793/gose device tree. Based on similar work for the r8a7791/koelsch by Wolfram Sang. Acked-by: Geert Uytterhoeven Acked-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 90b587c3c736..987ed03b1e02 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -136,6 +136,11 @@ &extal_clk { }; &pfc { + i2c2_pins: i2c2 { + renesas,groups = "i2c2"; + renesas,function = "i2c2"; + }; + scif0_pins: serial0 { renesas,groups = "scif0_data_d"; renesas,function = "scif0"; @@ -234,3 +239,17 @@ partition@440000 { }; }; }; + +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <100000>; + + eeprom@50 { + compatible = "renesas,r1ex24002", "atmel,24c02"; + reg = <0x50>; + pagesize = <16>; + }; +}; From 3abb4d5fc3a1fbfdd414d50d9c1d01bfd453c4a9 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 15 Jan 2016 11:44:15 +0900 Subject: [PATCH 11/68] ARM: dts: r8a7790: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r8a7791 device tree. Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 368 ++++++++++++++++----------------- 1 file changed, 184 insertions(+), 184 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 4d9af0f46fab..cc7eccf0ada7 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -121,13 +121,13 @@ gic: interrupt-controller@f1001000 { <0 0xf1002000 0 0x1000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = ; }; gpio0: gpio@e6050000 { compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; reg = <0 0xe6050000 0 0x50>; - interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 32>; @@ -140,7 +140,7 @@ gpio0: gpio@e6050000 { gpio1: gpio@e6051000 { compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; reg = <0 0xe6051000 0 0x50>; - interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 30>; @@ -153,7 +153,7 @@ gpio1: gpio@e6051000 { gpio2: gpio@e6052000 { compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; reg = <0 0xe6052000 0 0x50>; - interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 30>; @@ -166,7 +166,7 @@ gpio2: gpio@e6052000 { gpio3: gpio@e6053000 { compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; reg = <0 0xe6053000 0 0x50>; - interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 32>; @@ -179,7 +179,7 @@ gpio3: gpio@e6053000 { gpio4: gpio@e6054000 { compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; reg = <0 0xe6054000 0 0x50>; - interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 32>; @@ -192,7 +192,7 @@ gpio4: gpio@e6054000 { gpio5: gpio@e6055000 { compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar"; reg = <0 0xe6055000 0 0x50>; - interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 160 32>; @@ -205,24 +205,24 @@ gpio5: gpio@e6055000 { thermal@e61f0000 { compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal"; reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks R8A7790_CLK_THERMAL>; power-domains = <&cpg_clocks>; }; timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = , + , + , + ; }; cmt0: timer@ffca0000 { compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; reg = <0 0xffca0000 0 0x1004>; - interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, - <0 143 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; clocks = <&mstp1_clks R8A7790_CLK_CMT0>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -235,14 +235,14 @@ cmt0: timer@ffca0000 { cmt1: timer@e6130000 { compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2"; reg = <0 0xe6130000 0 0x1004>; - interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, - <0 121 IRQ_TYPE_LEVEL_HIGH>, - <0 122 IRQ_TYPE_LEVEL_HIGH>, - <0 123 IRQ_TYPE_LEVEL_HIGH>, - <0 124 IRQ_TYPE_LEVEL_HIGH>, - <0 125 IRQ_TYPE_LEVEL_HIGH>, - <0 126 IRQ_TYPE_LEVEL_HIGH>, - <0 127 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + ; clocks = <&mstp3_clks R8A7790_CLK_CMT1>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -257,10 +257,10 @@ irqc0: interrupt-controller@e61c0000 { #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, - <0 1 IRQ_TYPE_LEVEL_HIGH>, - <0 2 IRQ_TYPE_LEVEL_HIGH>, - <0 3 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R8A7790_CLK_IRQC>; power-domains = <&cpg_clocks>; }; @@ -268,22 +268,22 @@ irqc0: interrupt-controller@e61c0000 { dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH - 0 200 IRQ_TYPE_LEVEL_HIGH - 0 201 IRQ_TYPE_LEVEL_HIGH - 0 202 IRQ_TYPE_LEVEL_HIGH - 0 203 IRQ_TYPE_LEVEL_HIGH - 0 204 IRQ_TYPE_LEVEL_HIGH - 0 205 IRQ_TYPE_LEVEL_HIGH - 0 206 IRQ_TYPE_LEVEL_HIGH - 0 207 IRQ_TYPE_LEVEL_HIGH - 0 208 IRQ_TYPE_LEVEL_HIGH - 0 209 IRQ_TYPE_LEVEL_HIGH - 0 210 IRQ_TYPE_LEVEL_HIGH - 0 211 IRQ_TYPE_LEVEL_HIGH - 0 212 IRQ_TYPE_LEVEL_HIGH - 0 213 IRQ_TYPE_LEVEL_HIGH - 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -299,22 +299,22 @@ dmac0: dma-controller@e6700000 { dmac1: dma-controller@e6720000 { compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH - 0 216 IRQ_TYPE_LEVEL_HIGH - 0 217 IRQ_TYPE_LEVEL_HIGH - 0 218 IRQ_TYPE_LEVEL_HIGH - 0 219 IRQ_TYPE_LEVEL_HIGH - 0 308 IRQ_TYPE_LEVEL_HIGH - 0 309 IRQ_TYPE_LEVEL_HIGH - 0 310 IRQ_TYPE_LEVEL_HIGH - 0 311 IRQ_TYPE_LEVEL_HIGH - 0 312 IRQ_TYPE_LEVEL_HIGH - 0 313 IRQ_TYPE_LEVEL_HIGH - 0 314 IRQ_TYPE_LEVEL_HIGH - 0 315 IRQ_TYPE_LEVEL_HIGH - 0 316 IRQ_TYPE_LEVEL_HIGH - 0 317 IRQ_TYPE_LEVEL_HIGH - 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -330,20 +330,20 @@ dmac1: dma-controller@e6720000 { audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH - 0 320 IRQ_TYPE_LEVEL_HIGH - 0 321 IRQ_TYPE_LEVEL_HIGH - 0 322 IRQ_TYPE_LEVEL_HIGH - 0 323 IRQ_TYPE_LEVEL_HIGH - 0 324 IRQ_TYPE_LEVEL_HIGH - 0 325 IRQ_TYPE_LEVEL_HIGH - 0 326 IRQ_TYPE_LEVEL_HIGH - 0 327 IRQ_TYPE_LEVEL_HIGH - 0 328 IRQ_TYPE_LEVEL_HIGH - 0 329 IRQ_TYPE_LEVEL_HIGH - 0 330 IRQ_TYPE_LEVEL_HIGH - 0 331 IRQ_TYPE_LEVEL_HIGH - 0 332 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -359,20 +359,20 @@ audma0: dma-controller@ec700000 { audma1: dma-controller@ec720000 { compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; - interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH - 0 333 IRQ_TYPE_LEVEL_HIGH - 0 334 IRQ_TYPE_LEVEL_HIGH - 0 335 IRQ_TYPE_LEVEL_HIGH - 0 336 IRQ_TYPE_LEVEL_HIGH - 0 337 IRQ_TYPE_LEVEL_HIGH - 0 338 IRQ_TYPE_LEVEL_HIGH - 0 339 IRQ_TYPE_LEVEL_HIGH - 0 340 IRQ_TYPE_LEVEL_HIGH - 0 341 IRQ_TYPE_LEVEL_HIGH - 0 342 IRQ_TYPE_LEVEL_HIGH - 0 343 IRQ_TYPE_LEVEL_HIGH - 0 344 IRQ_TYPE_LEVEL_HIGH - 0 345 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -388,8 +388,8 @@ audma1: dma-controller@ec720000 { usb_dmac0: dma-controller@e65a0000 { compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH - 0 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "ch0", "ch1"; clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>; power-domains = <&cpg_clocks>; @@ -400,8 +400,8 @@ usb_dmac0: dma-controller@e65a0000 { usb_dmac1: dma-controller@e65b0000 { compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH - 0 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "ch0", "ch1"; clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>; power-domains = <&cpg_clocks>; @@ -414,7 +414,7 @@ i2c0: i2c@e6508000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7790"; reg = <0 0xe6508000 0 0x40>; - interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_I2C0>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <110>; @@ -426,7 +426,7 @@ i2c1: i2c@e6518000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7790"; reg = <0 0xe6518000 0 0x40>; - interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_I2C1>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -438,7 +438,7 @@ i2c2: i2c@e6530000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7790"; reg = <0 0xe6530000 0 0x40>; - interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_I2C2>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -450,7 +450,7 @@ i2c3: i2c@e6540000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7790"; reg = <0 0xe6540000 0 0x40>; - interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_I2C3>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <110>; @@ -462,7 +462,7 @@ iic0: i2c@e6500000 { #size-cells = <0>; compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; reg = <0 0xe6500000 0 0x425>; - interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_IIC0>; dmas = <&dmac0 0x61>, <&dmac0 0x62>; dma-names = "tx", "rx"; @@ -475,7 +475,7 @@ iic1: i2c@e6510000 { #size-cells = <0>; compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; reg = <0 0xe6510000 0 0x425>; - interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_IIC1>; dmas = <&dmac0 0x65>, <&dmac0 0x66>; dma-names = "tx", "rx"; @@ -488,7 +488,7 @@ iic2: i2c@e6520000 { #size-cells = <0>; compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; reg = <0 0xe6520000 0 0x425>; - interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_IIC2>; dmas = <&dmac0 0x69>, <&dmac0 0x6a>; dma-names = "tx", "rx"; @@ -501,7 +501,7 @@ iic3: i2c@e60b0000 { #size-cells = <0>; compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; reg = <0 0xe60b0000 0 0x425>; - interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; dmas = <&dmac0 0x77>, <&dmac0 0x78>; dma-names = "tx", "rx"; @@ -512,7 +512,7 @@ iic3: i2c@e60b0000 { mmcif0: mmc@ee200000 { compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; - interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>; dmas = <&dmac0 0xd1>, <&dmac0 0xd2>; dma-names = "tx", "rx"; @@ -525,7 +525,7 @@ mmcif0: mmc@ee200000 { mmcif1: mmc@ee220000 { compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; reg = <0 0xee220000 0 0x80>; - interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>; dmas = <&dmac0 0xe1>, <&dmac0 0xe2>; dma-names = "tx", "rx"; @@ -543,7 +543,7 @@ pfc: pfc@e6060000 { sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a7790"; reg = <0 0xee100000 0 0x328>; - interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; dmas = <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx"; @@ -554,7 +554,7 @@ sdhi0: sd@ee100000 { sdhi1: sd@ee120000 { compatible = "renesas,sdhi-r8a7790"; reg = <0 0xee120000 0 0x328>; - interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; dmas = <&dmac1 0xc9>, <&dmac1 0xca>; dma-names = "tx", "rx"; @@ -565,7 +565,7 @@ sdhi1: sd@ee120000 { sdhi2: sd@ee140000 { compatible = "renesas,sdhi-r8a7790"; reg = <0 0xee140000 0 0x100>; - interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; dmas = <&dmac1 0xc1>, <&dmac1 0xc2>; dma-names = "tx", "rx"; @@ -576,7 +576,7 @@ sdhi2: sd@ee140000 { sdhi3: sd@ee160000 { compatible = "renesas,sdhi-r8a7790"; reg = <0 0xee160000 0 0x100>; - interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_SDHI3>; dmas = <&dmac1 0xd3>, <&dmac1 0xd4>; dma-names = "tx", "rx"; @@ -587,7 +587,7 @@ sdhi3: sd@ee160000 { scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7790", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; - interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; clock-names = "sci_ick"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; @@ -599,7 +599,7 @@ scifa0: serial@e6c40000 { scifa1: serial@e6c50000 { compatible = "renesas,scifa-r8a7790", "renesas,scifa"; reg = <0 0xe6c50000 0 64>; - interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>; clock-names = "sci_ick"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; @@ -611,7 +611,7 @@ scifa1: serial@e6c50000 { scifa2: serial@e6c60000 { compatible = "renesas,scifa-r8a7790", "renesas,scifa"; reg = <0 0xe6c60000 0 64>; - interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>; clock-names = "sci_ick"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; @@ -623,7 +623,7 @@ scifa2: serial@e6c60000 { scifb0: serial@e6c20000 { compatible = "renesas,scifb-r8a7790", "renesas,scifb"; reg = <0 0xe6c20000 0 64>; - interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; clock-names = "sci_ick"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; @@ -635,7 +635,7 @@ scifb0: serial@e6c20000 { scifb1: serial@e6c30000 { compatible = "renesas,scifb-r8a7790", "renesas,scifb"; reg = <0 0xe6c30000 0 64>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; clock-names = "sci_ick"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; @@ -647,7 +647,7 @@ scifb1: serial@e6c30000 { scifb2: serial@e6ce0000 { compatible = "renesas,scifb-r8a7790", "renesas,scifb"; reg = <0 0xe6ce0000 0 64>; - interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; clock-names = "sci_ick"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; @@ -659,7 +659,7 @@ scifb2: serial@e6ce0000 { scif0: serial@e6e60000 { compatible = "renesas,scif-r8a7790", "renesas,scif"; reg = <0 0xe6e60000 0 64>; - interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_SCIF0>; clock-names = "sci_ick"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; @@ -671,7 +671,7 @@ scif0: serial@e6e60000 { scif1: serial@e6e68000 { compatible = "renesas,scif-r8a7790", "renesas,scif"; reg = <0 0xe6e68000 0 64>; - interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_SCIF1>; clock-names = "sci_ick"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; @@ -683,7 +683,7 @@ scif1: serial@e6e68000 { hscif0: serial@e62c0000 { compatible = "renesas,hscif-r8a7790", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; - interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>; clock-names = "sci_ick"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; @@ -695,7 +695,7 @@ hscif0: serial@e62c0000 { hscif1: serial@e62c8000 { compatible = "renesas,hscif-r8a7790", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; - interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>; clock-names = "sci_ick"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; @@ -707,7 +707,7 @@ hscif1: serial@e62c8000 { ether: ethernet@ee700000 { compatible = "renesas,ether-r8a7790"; reg = <0 0xee700000 0 0x400>; - interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7790_CLK_ETHER>; power-domains = <&cpg_clocks>; phy-mode = "rmii"; @@ -719,7 +719,7 @@ ether: ethernet@ee700000 { avb: ethernet@e6800000 { compatible = "renesas,etheravb-r8a7790"; reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; - interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -730,7 +730,7 @@ avb: ethernet@e6800000 { sata0: sata@ee300000 { compatible = "renesas,sata-r8a7790"; reg = <0 0xee300000 0 0x2000>; - interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7790_CLK_SATA0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -739,7 +739,7 @@ sata0: sata@ee300000 { sata1: sata@ee500000 { compatible = "renesas,sata-r8a7790"; reg = <0 0xee500000 0 0x2000>; - interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7790_CLK_SATA1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -748,7 +748,7 @@ sata1: sata@ee500000 { hsusb: usb@e6590000 { compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs"; reg = <0 0xe6590000 0 0x100>; - interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_HSUSB>; dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, <&usb_dmac1 0>, <&usb_dmac1 1>; @@ -783,7 +783,7 @@ usb2: usb-channel@2 { vin0: video@e6ef0000 { compatible = "renesas,vin-r8a7790"; reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7790_CLK_VIN0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -792,7 +792,7 @@ vin0: video@e6ef0000 { vin1: video@e6ef1000 { compatible = "renesas,vin-r8a7790"; reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7790_CLK_VIN1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -801,7 +801,7 @@ vin1: video@e6ef1000 { vin2: video@e6ef2000 { compatible = "renesas,vin-r8a7790"; reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7790_CLK_VIN2>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -810,7 +810,7 @@ vin2: video@e6ef2000 { vin3: video@e6ef3000 { compatible = "renesas,vin-r8a7790"; reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <0 191 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7790_CLK_VIN3>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -819,7 +819,7 @@ vin3: video@e6ef3000 { vsp1@fe920000 { compatible = "renesas,vsp1"; reg = <0 0xfe920000 0 0x8000>; - interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>; power-domains = <&cpg_clocks>; @@ -832,7 +832,7 @@ vsp1@fe920000 { vsp1@fe928000 { compatible = "renesas,vsp1"; reg = <0 0xfe928000 0 0x8000>; - interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>; power-domains = <&cpg_clocks>; @@ -846,7 +846,7 @@ vsp1@fe928000 { vsp1@fe930000 { compatible = "renesas,vsp1"; reg = <0 0xfe930000 0 0x8000>; - interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>; power-domains = <&cpg_clocks>; @@ -860,7 +860,7 @@ vsp1@fe930000 { vsp1@fe938000 { compatible = "renesas,vsp1"; reg = <0 0xfe938000 0 0x8000>; - interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>; power-domains = <&cpg_clocks>; @@ -877,9 +877,9 @@ du: display@feb00000 { <0 0xfeb90000 0 0x1c>, <0 0xfeb94000 0 0x1c>; reg-names = "du", "lvds.0", "lvds.1"; - interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, - <0 268 IRQ_TYPE_LEVEL_HIGH>, - <0 269 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp7_clks R8A7790_CLK_DU0>, <&mstp7_clks R8A7790_CLK_DU1>, <&mstp7_clks R8A7790_CLK_DU2>, @@ -913,7 +913,7 @@ du_out_lvds1: endpoint { can0: can@e6e80000 { compatible = "renesas,can-r8a7790"; reg = <0 0xe6e80000 0 0x1000>; - interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_RCAN0>, <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; @@ -924,7 +924,7 @@ can0: can@e6e80000 { can1: can@e6e88000 { compatible = "renesas,can-r8a7790"; reg = <0 0xe6e88000 0 0x1000>; - interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_RCAN1>, <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; @@ -935,7 +935,7 @@ can1: can@e6e88000 { jpu: jpeg-codec@fe980000 { compatible = "renesas,jpu-r8a7790"; reg = <0 0xfe980000 0 0x10300>; - interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7790_CLK_JPU>; power-domains = <&cpg_clocks>; }; @@ -1401,7 +1401,7 @@ R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_S qspi: spi@e6b10000 { compatible = "renesas,qspi-r8a7790", "renesas,qspi"; reg = <0 0xe6b10000 0 0x2c>; - interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>; dmas = <&dmac0 0x17>, <&dmac0 0x18>; dma-names = "tx", "rx"; @@ -1415,7 +1415,7 @@ qspi: spi@e6b10000 { msiof0: spi@e6e20000 { compatible = "renesas,msiof-r8a7790"; reg = <0 0xe6e20000 0 0x0064>; - interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; dmas = <&dmac0 0x51>, <&dmac0 0x52>; dma-names = "tx", "rx"; @@ -1428,7 +1428,7 @@ msiof0: spi@e6e20000 { msiof1: spi@e6e10000 { compatible = "renesas,msiof-r8a7790"; reg = <0 0xe6e10000 0 0x0064>; - interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; dmas = <&dmac0 0x55>, <&dmac0 0x56>; dma-names = "tx", "rx"; @@ -1441,7 +1441,7 @@ msiof1: spi@e6e10000 { msiof2: spi@e6e00000 { compatible = "renesas,msiof-r8a7790"; reg = <0 0xe6e00000 0 0x0064>; - interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; dmas = <&dmac0 0x41>, <&dmac0 0x42>; dma-names = "tx", "rx"; @@ -1454,7 +1454,7 @@ msiof2: spi@e6e00000 { msiof3: spi@e6c90000 { compatible = "renesas,msiof-r8a7790"; reg = <0 0xe6c90000 0 0x0064>; - interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; dmas = <&dmac0 0x45>, <&dmac0 0x46>; dma-names = "tx", "rx"; @@ -1467,7 +1467,7 @@ msiof3: spi@e6c90000 { xhci: usb@ee000000 { compatible = "renesas,xhci-r8a7790"; reg = <0 0xee000000 0 0xc00>; - interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7790_CLK_SSUSB>; power-domains = <&cpg_clocks>; phys = <&usb2 1>; @@ -1480,7 +1480,7 @@ pci0: pci@ee090000 { device_type = "pci"; reg = <0 0xee090000 0 0xc00>, <0 0xee080000 0 0x1100>; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_EHCI>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -1491,9 +1491,9 @@ pci0: pci@ee090000 { #interrupt-cells = <1>; ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; usb@0,1 { reg = <0x800 0 0 0 0>; @@ -1515,7 +1515,7 @@ pci1: pci@ee0b0000 { device_type = "pci"; reg = <0 0xee0b0000 0 0xc00>, <0 0xee0a0000 0 0x1100>; - interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_EHCI>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -1526,9 +1526,9 @@ pci1: pci@ee0b0000 { #interrupt-cells = <1>; ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; }; pci2: pci@ee0d0000 { @@ -1538,7 +1538,7 @@ pci2: pci@ee0d0000 { power-domains = <&cpg_clocks>; reg = <0 0xee0d0000 0 0xc00>, <0 0xee0c0000 0 0x1100>; - interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; status = "disabled"; bus-range = <2 2>; @@ -1547,9 +1547,9 @@ pci2: pci@ee0d0000 { #interrupt-cells = <1>; ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; usb@0,1 { reg = <0x800 0 0 0 0>; @@ -1580,12 +1580,12 @@ pciec: pcie@fe000000 { /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; - interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>, - <0 117 IRQ_TYPE_LEVEL_HIGH>, - <0 118 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; power-domains = <&cpg_clocks>; @@ -1664,52 +1664,52 @@ rcar_sound,ctu { rcar_sound,src { src0: src@0 { - interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x85>, <&audma1 0x9a>; dma-names = "rx", "tx"; }; src1: src@1 { - interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x87>, <&audma1 0x9c>; dma-names = "rx", "tx"; }; src2: src@2 { - interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x89>, <&audma1 0x9e>; dma-names = "rx", "tx"; }; src3: src@3 { - interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x8b>, <&audma1 0xa0>; dma-names = "rx", "tx"; }; src4: src@4 { - interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x8d>, <&audma1 0xb0>; dma-names = "rx", "tx"; }; src5: src@5 { - interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x8f>, <&audma1 0xb2>; dma-names = "rx", "tx"; }; src6: src@6 { - interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x91>, <&audma1 0xb4>; dma-names = "rx", "tx"; }; src7: src@7 { - interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x93>, <&audma1 0xb6>; dma-names = "rx", "tx"; }; src8: src@8 { - interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x95>, <&audma1 0xb8>; dma-names = "rx", "tx"; }; src9: src@9 { - interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x97>, <&audma1 0xba>; dma-names = "rx", "tx"; }; @@ -1717,52 +1717,52 @@ src9: src@9 { rcar_sound,ssi { ssi0: ssi@0 { - interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi1: ssi@1 { - interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi2: ssi@2 { - interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi3: ssi@3 { - interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi4: ssi@4 { - interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi5: ssi@5 { - interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi6: ssi@6 { - interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi7: ssi@7 { - interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi8: ssi@8 { - interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi9: ssi@9 { - interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; dma-names = "rx", "tx", "rxu", "txu"; }; @@ -1772,8 +1772,8 @@ ssi9: ssi@9 { ipmmu_sy0: mmu@e6280000 { compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; reg = <0 0xe6280000 0 0x1000>; - interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, - <0 224 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1781,7 +1781,7 @@ ipmmu_sy0: mmu@e6280000 { ipmmu_sy1: mmu@e6290000 { compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; reg = <0 0xe6290000 0 0x1000>; - interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1789,8 +1789,8 @@ ipmmu_sy1: mmu@e6290000 { ipmmu_ds: mmu@e6740000 { compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; reg = <0 0xe6740000 0 0x1000>; - interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, - <0 199 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1798,7 +1798,7 @@ ipmmu_ds: mmu@e6740000 { ipmmu_mp: mmu@ec680000 { compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; reg = <0 0xec680000 0 0x1000>; - interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1806,8 +1806,8 @@ ipmmu_mp: mmu@ec680000 { ipmmu_mx: mmu@fe951000 { compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; reg = <0 0xfe951000 0 0x1000>; - interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, - <0 221 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1815,7 +1815,7 @@ ipmmu_mx: mmu@fe951000 { ipmmu_rt: mmu@ffc80000 { compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; reg = <0 0xffc80000 0 0x1000>; - interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; From 386a9291134b55493b2af2bc1317eeeb05f8a49a Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 15 Jan 2016 11:44:16 +0900 Subject: [PATCH 12/68] ARM: dts: r8a7791: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r8a7791 device tree. Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 386 ++++++++++++++++----------------- 1 file changed, 193 insertions(+), 193 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 829224d2a3ed..6b3b02c0c58a 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -78,13 +78,13 @@ gic: interrupt-controller@f1001000 { <0 0xf1002000 0 0x1000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = ; }; gpio0: gpio@e6050000 { compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; reg = <0 0xe6050000 0 0x50>; - interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 32>; @@ -97,7 +97,7 @@ gpio0: gpio@e6050000 { gpio1: gpio@e6051000 { compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; reg = <0 0xe6051000 0 0x50>; - interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 26>; @@ -110,7 +110,7 @@ gpio1: gpio@e6051000 { gpio2: gpio@e6052000 { compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; reg = <0 0xe6052000 0 0x50>; - interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 32>; @@ -123,7 +123,7 @@ gpio2: gpio@e6052000 { gpio3: gpio@e6053000 { compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; reg = <0 0xe6053000 0 0x50>; - interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 32>; @@ -136,7 +136,7 @@ gpio3: gpio@e6053000 { gpio4: gpio@e6054000 { compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; reg = <0 0xe6054000 0 0x50>; - interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 32>; @@ -149,7 +149,7 @@ gpio4: gpio@e6054000 { gpio5: gpio@e6055000 { compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; reg = <0 0xe6055000 0 0x50>; - interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 160 32>; @@ -162,7 +162,7 @@ gpio5: gpio@e6055000 { gpio6: gpio@e6055400 { compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; reg = <0 0xe6055400 0 0x50>; - interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 192 32>; @@ -175,7 +175,7 @@ gpio6: gpio@e6055400 { gpio7: gpio@e6055800 { compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; reg = <0 0xe6055800 0 0x50>; - interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 224 26>; @@ -188,24 +188,24 @@ gpio7: gpio@e6055800 { thermal@e61f0000 { compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal"; reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks R8A7791_CLK_THERMAL>; power-domains = <&cpg_clocks>; }; timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = , + , + , + ; }; cmt0: timer@ffca0000 { compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2"; reg = <0 0xffca0000 0 0x1004>; - interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, - <0 143 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; clocks = <&mstp1_clks R8A7791_CLK_CMT0>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -218,14 +218,14 @@ cmt0: timer@ffca0000 { cmt1: timer@e6130000 { compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2"; reg = <0 0xe6130000 0 0x1004>; - interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, - <0 121 IRQ_TYPE_LEVEL_HIGH>, - <0 122 IRQ_TYPE_LEVEL_HIGH>, - <0 123 IRQ_TYPE_LEVEL_HIGH>, - <0 124 IRQ_TYPE_LEVEL_HIGH>, - <0 125 IRQ_TYPE_LEVEL_HIGH>, - <0 126 IRQ_TYPE_LEVEL_HIGH>, - <0 127 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + ; clocks = <&mstp3_clks R8A7791_CLK_CMT1>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -240,16 +240,16 @@ irqc0: interrupt-controller@e61c0000 { #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, - <0 1 IRQ_TYPE_LEVEL_HIGH>, - <0 2 IRQ_TYPE_LEVEL_HIGH>, - <0 3 IRQ_TYPE_LEVEL_HIGH>, - <0 12 IRQ_TYPE_LEVEL_HIGH>, - <0 13 IRQ_TYPE_LEVEL_HIGH>, - <0 14 IRQ_TYPE_LEVEL_HIGH>, - <0 15 IRQ_TYPE_LEVEL_HIGH>, - <0 16 IRQ_TYPE_LEVEL_HIGH>, - <0 17 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + , + , + ; clocks = <&mstp4_clks R8A7791_CLK_IRQC>; power-domains = <&cpg_clocks>; }; @@ -257,22 +257,22 @@ irqc0: interrupt-controller@e61c0000 { dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH - 0 200 IRQ_TYPE_LEVEL_HIGH - 0 201 IRQ_TYPE_LEVEL_HIGH - 0 202 IRQ_TYPE_LEVEL_HIGH - 0 203 IRQ_TYPE_LEVEL_HIGH - 0 204 IRQ_TYPE_LEVEL_HIGH - 0 205 IRQ_TYPE_LEVEL_HIGH - 0 206 IRQ_TYPE_LEVEL_HIGH - 0 207 IRQ_TYPE_LEVEL_HIGH - 0 208 IRQ_TYPE_LEVEL_HIGH - 0 209 IRQ_TYPE_LEVEL_HIGH - 0 210 IRQ_TYPE_LEVEL_HIGH - 0 211 IRQ_TYPE_LEVEL_HIGH - 0 212 IRQ_TYPE_LEVEL_HIGH - 0 213 IRQ_TYPE_LEVEL_HIGH - 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -288,22 +288,22 @@ dmac0: dma-controller@e6700000 { dmac1: dma-controller@e6720000 { compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH - 0 216 IRQ_TYPE_LEVEL_HIGH - 0 217 IRQ_TYPE_LEVEL_HIGH - 0 218 IRQ_TYPE_LEVEL_HIGH - 0 219 IRQ_TYPE_LEVEL_HIGH - 0 308 IRQ_TYPE_LEVEL_HIGH - 0 309 IRQ_TYPE_LEVEL_HIGH - 0 310 IRQ_TYPE_LEVEL_HIGH - 0 311 IRQ_TYPE_LEVEL_HIGH - 0 312 IRQ_TYPE_LEVEL_HIGH - 0 313 IRQ_TYPE_LEVEL_HIGH - 0 314 IRQ_TYPE_LEVEL_HIGH - 0 315 IRQ_TYPE_LEVEL_HIGH - 0 316 IRQ_TYPE_LEVEL_HIGH - 0 317 IRQ_TYPE_LEVEL_HIGH - 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -319,20 +319,20 @@ dmac1: dma-controller@e6720000 { audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH - 0 320 IRQ_TYPE_LEVEL_HIGH - 0 321 IRQ_TYPE_LEVEL_HIGH - 0 322 IRQ_TYPE_LEVEL_HIGH - 0 323 IRQ_TYPE_LEVEL_HIGH - 0 324 IRQ_TYPE_LEVEL_HIGH - 0 325 IRQ_TYPE_LEVEL_HIGH - 0 326 IRQ_TYPE_LEVEL_HIGH - 0 327 IRQ_TYPE_LEVEL_HIGH - 0 328 IRQ_TYPE_LEVEL_HIGH - 0 329 IRQ_TYPE_LEVEL_HIGH - 0 330 IRQ_TYPE_LEVEL_HIGH - 0 331 IRQ_TYPE_LEVEL_HIGH - 0 332 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -348,20 +348,20 @@ audma0: dma-controller@ec700000 { audma1: dma-controller@ec720000 { compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; - interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH - 0 333 IRQ_TYPE_LEVEL_HIGH - 0 334 IRQ_TYPE_LEVEL_HIGH - 0 335 IRQ_TYPE_LEVEL_HIGH - 0 336 IRQ_TYPE_LEVEL_HIGH - 0 337 IRQ_TYPE_LEVEL_HIGH - 0 338 IRQ_TYPE_LEVEL_HIGH - 0 339 IRQ_TYPE_LEVEL_HIGH - 0 340 IRQ_TYPE_LEVEL_HIGH - 0 341 IRQ_TYPE_LEVEL_HIGH - 0 342 IRQ_TYPE_LEVEL_HIGH - 0 343 IRQ_TYPE_LEVEL_HIGH - 0 344 IRQ_TYPE_LEVEL_HIGH - 0 345 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -377,8 +377,8 @@ audma1: dma-controller@ec720000 { usb_dmac0: dma-controller@e65a0000 { compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH - 0 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "ch0", "ch1"; clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>; power-domains = <&cpg_clocks>; @@ -389,8 +389,8 @@ usb_dmac0: dma-controller@e65a0000 { usb_dmac1: dma-controller@e65b0000 { compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH - 0 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "ch0", "ch1"; clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>; power-domains = <&cpg_clocks>; @@ -404,7 +404,7 @@ i2c0: i2c@e6508000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7791"; reg = <0 0xe6508000 0 0x40>; - interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_I2C0>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -416,7 +416,7 @@ i2c1: i2c@e6518000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7791"; reg = <0 0xe6518000 0 0x40>; - interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_I2C1>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -428,7 +428,7 @@ i2c2: i2c@e6530000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7791"; reg = <0 0xe6530000 0 0x40>; - interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_I2C2>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -440,7 +440,7 @@ i2c3: i2c@e6540000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7791"; reg = <0 0xe6540000 0 0x40>; - interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_I2C3>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -452,7 +452,7 @@ i2c4: i2c@e6520000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7791"; reg = <0 0xe6520000 0 0x40>; - interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_I2C4>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -465,7 +465,7 @@ i2c5: i2c@e6528000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7791"; reg = <0 0xe6528000 0 0x40>; - interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_I2C5>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <110>; @@ -478,7 +478,7 @@ i2c6: i2c@e60b0000 { #size-cells = <0>; compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; reg = <0 0xe60b0000 0 0x425>; - interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>; dmas = <&dmac0 0x77>, <&dmac0 0x78>; dma-names = "tx", "rx"; @@ -491,7 +491,7 @@ i2c7: i2c@e6500000 { #size-cells = <0>; compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; reg = <0 0xe6500000 0 0x425>; - interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7791_CLK_IIC0>; dmas = <&dmac0 0x61>, <&dmac0 0x62>; dma-names = "tx", "rx"; @@ -504,7 +504,7 @@ i2c8: i2c@e6510000 { #size-cells = <0>; compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; reg = <0 0xe6510000 0 0x425>; - interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7791_CLK_IIC1>; dmas = <&dmac0 0x65>, <&dmac0 0x66>; dma-names = "tx", "rx"; @@ -520,7 +520,7 @@ pfc: pfc@e6060000 { mmcif0: mmc@ee200000 { compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; - interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>; dmas = <&dmac0 0xd1>, <&dmac0 0xd2>; dma-names = "tx", "rx"; @@ -533,7 +533,7 @@ mmcif0: mmc@ee200000 { sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a7791"; reg = <0 0xee100000 0 0x328>; - interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7791_CLK_SDHI0>; dmas = <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx"; @@ -544,7 +544,7 @@ sdhi0: sd@ee100000 { sdhi1: sd@ee140000 { compatible = "renesas,sdhi-r8a7791"; reg = <0 0xee140000 0 0x100>; - interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7791_CLK_SDHI1>; dmas = <&dmac1 0xc1>, <&dmac1 0xc2>; dma-names = "tx", "rx"; @@ -555,7 +555,7 @@ sdhi1: sd@ee140000 { sdhi2: sd@ee160000 { compatible = "renesas,sdhi-r8a7791"; reg = <0 0xee160000 0 0x100>; - interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7791_CLK_SDHI2>; dmas = <&dmac1 0xd3>, <&dmac1 0xd4>; dma-names = "tx", "rx"; @@ -566,7 +566,7 @@ sdhi2: sd@ee160000 { scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7791", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; - interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>; clock-names = "sci_ick"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; @@ -578,7 +578,7 @@ scifa0: serial@e6c40000 { scifa1: serial@e6c50000 { compatible = "renesas,scifa-r8a7791", "renesas,scifa"; reg = <0 0xe6c50000 0 64>; - interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>; clock-names = "sci_ick"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; @@ -590,7 +590,7 @@ scifa1: serial@e6c50000 { scifa2: serial@e6c60000 { compatible = "renesas,scifa-r8a7791", "renesas,scifa"; reg = <0 0xe6c60000 0 64>; - interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>; clock-names = "sci_ick"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; @@ -602,7 +602,7 @@ scifa2: serial@e6c60000 { scifa3: serial@e6c70000 { compatible = "renesas,scifa-r8a7791", "renesas,scifa"; reg = <0 0xe6c70000 0 64>; - interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>; clock-names = "sci_ick"; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; @@ -614,7 +614,7 @@ scifa3: serial@e6c70000 { scifa4: serial@e6c78000 { compatible = "renesas,scifa-r8a7791", "renesas,scifa"; reg = <0 0xe6c78000 0 64>; - interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>; clock-names = "sci_ick"; dmas = <&dmac0 0x1f>, <&dmac0 0x20>; @@ -626,7 +626,7 @@ scifa4: serial@e6c78000 { scifa5: serial@e6c80000 { compatible = "renesas,scifa-r8a7791", "renesas,scifa"; reg = <0 0xe6c80000 0 64>; - interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>; clock-names = "sci_ick"; dmas = <&dmac0 0x23>, <&dmac0 0x24>; @@ -638,7 +638,7 @@ scifa5: serial@e6c80000 { scifb0: serial@e6c20000 { compatible = "renesas,scifb-r8a7791", "renesas,scifb"; reg = <0 0xe6c20000 0 64>; - interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>; clock-names = "sci_ick"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; @@ -650,7 +650,7 @@ scifb0: serial@e6c20000 { scifb1: serial@e6c30000 { compatible = "renesas,scifb-r8a7791", "renesas,scifb"; reg = <0 0xe6c30000 0 64>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>; clock-names = "sci_ick"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; @@ -662,7 +662,7 @@ scifb1: serial@e6c30000 { scifb2: serial@e6ce0000 { compatible = "renesas,scifb-r8a7791", "renesas,scifb"; reg = <0 0xe6ce0000 0 64>; - interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>; clock-names = "sci_ick"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; @@ -674,7 +674,7 @@ scifb2: serial@e6ce0000 { scif0: serial@e6e60000 { compatible = "renesas,scif-r8a7791", "renesas,scif"; reg = <0 0xe6e60000 0 64>; - interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF0>; clock-names = "sci_ick"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; @@ -686,7 +686,7 @@ scif0: serial@e6e60000 { scif1: serial@e6e68000 { compatible = "renesas,scif-r8a7791", "renesas,scif"; reg = <0 0xe6e68000 0 64>; - interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF1>; clock-names = "sci_ick"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; @@ -698,7 +698,7 @@ scif1: serial@e6e68000 { scif2: serial@e6e58000 { compatible = "renesas,scif-r8a7791", "renesas,scif"; reg = <0 0xe6e58000 0 64>; - interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF2>; clock-names = "sci_ick"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; @@ -710,7 +710,7 @@ scif2: serial@e6e58000 { scif3: serial@e6ea8000 { compatible = "renesas,scif-r8a7791", "renesas,scif"; reg = <0 0xe6ea8000 0 64>; - interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF3>; clock-names = "sci_ick"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; @@ -722,7 +722,7 @@ scif3: serial@e6ea8000 { scif4: serial@e6ee0000 { compatible = "renesas,scif-r8a7791", "renesas,scif"; reg = <0 0xe6ee0000 0 64>; - interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF4>; clock-names = "sci_ick"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; @@ -734,7 +734,7 @@ scif4: serial@e6ee0000 { scif5: serial@e6ee8000 { compatible = "renesas,scif-r8a7791", "renesas,scif"; reg = <0 0xe6ee8000 0 64>; - interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF5>; clock-names = "sci_ick"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; @@ -746,7 +746,7 @@ scif5: serial@e6ee8000 { hscif0: serial@e62c0000 { compatible = "renesas,hscif-r8a7791", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; - interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>; clock-names = "sci_ick"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; @@ -758,7 +758,7 @@ hscif0: serial@e62c0000 { hscif1: serial@e62c8000 { compatible = "renesas,hscif-r8a7791", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; - interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>; clock-names = "sci_ick"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; @@ -770,7 +770,7 @@ hscif1: serial@e62c8000 { hscif2: serial@e62d0000 { compatible = "renesas,hscif-r8a7791", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; - interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>; clock-names = "sci_ick"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; @@ -782,7 +782,7 @@ hscif2: serial@e62d0000 { ether: ethernet@ee700000 { compatible = "renesas,ether-r8a7791"; reg = <0 0xee700000 0 0x400>; - interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7791_CLK_ETHER>; power-domains = <&cpg_clocks>; phy-mode = "rmii"; @@ -795,7 +795,7 @@ avb: ethernet@e6800000 { compatible = "renesas,etheravb-r8a7791", "renesas,etheravb-rcar-gen2"; reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; - interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -806,7 +806,7 @@ avb: ethernet@e6800000 { sata0: sata@ee300000 { compatible = "renesas,sata-r8a7791"; reg = <0 0xee300000 0 0x2000>; - interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7791_CLK_SATA0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -815,7 +815,7 @@ sata0: sata@ee300000 { sata1: sata@ee500000 { compatible = "renesas,sata-r8a7791"; reg = <0 0xee500000 0 0x2000>; - interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7791_CLK_SATA1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -824,7 +824,7 @@ sata1: sata@ee500000 { hsusb: usb@e6590000 { compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs"; reg = <0 0xe6590000 0 0x100>; - interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSUSB>; dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, <&usb_dmac1 0>, <&usb_dmac1 1>; @@ -859,7 +859,7 @@ usb2: usb-channel@2 { vin0: video@e6ef0000 { compatible = "renesas,vin-r8a7791"; reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7791_CLK_VIN0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -868,7 +868,7 @@ vin0: video@e6ef0000 { vin1: video@e6ef1000 { compatible = "renesas,vin-r8a7791"; reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7791_CLK_VIN1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -877,7 +877,7 @@ vin1: video@e6ef1000 { vin2: video@e6ef2000 { compatible = "renesas,vin-r8a7791"; reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7791_CLK_VIN2>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -886,7 +886,7 @@ vin2: video@e6ef2000 { vsp1@fe928000 { compatible = "renesas,vsp1"; reg = <0 0xfe928000 0 0x8000>; - interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>; power-domains = <&cpg_clocks>; @@ -900,7 +900,7 @@ vsp1@fe928000 { vsp1@fe930000 { compatible = "renesas,vsp1"; reg = <0 0xfe930000 0 0x8000>; - interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>; power-domains = <&cpg_clocks>; @@ -914,7 +914,7 @@ vsp1@fe930000 { vsp1@fe938000 { compatible = "renesas,vsp1"; reg = <0 0xfe938000 0 0x8000>; - interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>; power-domains = <&cpg_clocks>; @@ -930,8 +930,8 @@ du: display@feb00000 { reg = <0 0xfeb00000 0 0x40000>, <0 0xfeb90000 0 0x1c>; reg-names = "du", "lvds.0"; - interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, - <0 268 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; clocks = <&mstp7_clks R8A7791_CLK_DU0>, <&mstp7_clks R8A7791_CLK_DU1>, <&mstp7_clks R8A7791_CLK_LVDS0>; @@ -958,7 +958,7 @@ du_out_lvds0: endpoint { can0: can@e6e80000 { compatible = "renesas,can-r8a7791"; reg = <0 0xe6e80000 0 0x1000>; - interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_RCAN0>, <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; @@ -969,7 +969,7 @@ can0: can@e6e80000 { can1: can@e6e88000 { compatible = "renesas,can-r8a7791"; reg = <0 0xe6e88000 0 0x1000>; - interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_RCAN1>, <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; @@ -980,7 +980,7 @@ can1: can@e6e88000 { jpu: jpeg-codec@fe980000 { compatible = "renesas,jpu-r8a7791"; reg = <0 0xfe980000 0 0x10300>; - interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7791_CLK_JPU>; power-domains = <&cpg_clocks>; }; @@ -1432,7 +1432,7 @@ R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5 qspi: spi@e6b10000 { compatible = "renesas,qspi-r8a7791", "renesas,qspi"; reg = <0 0xe6b10000 0 0x2c>; - interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>; dmas = <&dmac0 0x17>, <&dmac0 0x18>; dma-names = "tx", "rx"; @@ -1446,7 +1446,7 @@ qspi: spi@e6b10000 { msiof0: spi@e6e20000 { compatible = "renesas,msiof-r8a7791"; reg = <0 0xe6e20000 0 0x0064>; - interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; dmas = <&dmac0 0x51>, <&dmac0 0x52>; dma-names = "tx", "rx"; @@ -1459,7 +1459,7 @@ msiof0: spi@e6e20000 { msiof1: spi@e6e10000 { compatible = "renesas,msiof-r8a7791"; reg = <0 0xe6e10000 0 0x0064>; - interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>; dmas = <&dmac0 0x55>, <&dmac0 0x56>; dma-names = "tx", "rx"; @@ -1472,7 +1472,7 @@ msiof1: spi@e6e10000 { msiof2: spi@e6e00000 { compatible = "renesas,msiof-r8a7791"; reg = <0 0xe6e00000 0 0x0064>; - interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>; dmas = <&dmac0 0x41>, <&dmac0 0x42>; dma-names = "tx", "rx"; @@ -1485,7 +1485,7 @@ msiof2: spi@e6e00000 { xhci: usb@ee000000 { compatible = "renesas,xhci-r8a7791"; reg = <0 0xee000000 0 0xc00>; - interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7791_CLK_SSUSB>; power-domains = <&cpg_clocks>; phys = <&usb2 1>; @@ -1498,7 +1498,7 @@ pci0: pci@ee090000 { device_type = "pci"; reg = <0 0xee090000 0 0xc00>, <0 0xee080000 0 0x1100>; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_EHCI>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -1509,9 +1509,9 @@ pci0: pci@ee090000 { #interrupt-cells = <1>; ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; usb@0,1 { reg = <0x800 0 0 0 0>; @@ -1533,7 +1533,7 @@ pci1: pci@ee0d0000 { device_type = "pci"; reg = <0 0xee0d0000 0 0xc00>, <0 0xee0c0000 0 0x1100>; - interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_EHCI>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -1544,9 +1544,9 @@ pci1: pci@ee0d0000 { #interrupt-cells = <1>; ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; usb@0,1 { reg = <0x800 0 0 0 0>; @@ -1577,12 +1577,12 @@ pciec: pcie@fe000000 { /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; - interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>, - <0 117 IRQ_TYPE_LEVEL_HIGH>, - <0 118 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; power-domains = <&cpg_clocks>; @@ -1592,8 +1592,8 @@ pciec: pcie@fe000000 { ipmmu_sy0: mmu@e6280000 { compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; reg = <0 0xe6280000 0 0x1000>; - interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, - <0 224 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1601,7 +1601,7 @@ ipmmu_sy0: mmu@e6280000 { ipmmu_sy1: mmu@e6290000 { compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; reg = <0 0xe6290000 0 0x1000>; - interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1609,8 +1609,8 @@ ipmmu_sy1: mmu@e6290000 { ipmmu_ds: mmu@e6740000 { compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; reg = <0 0xe6740000 0 0x1000>; - interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, - <0 199 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1618,7 +1618,7 @@ ipmmu_ds: mmu@e6740000 { ipmmu_mp: mmu@ec680000 { compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; reg = <0 0xec680000 0 0x1000>; - interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1626,8 +1626,8 @@ ipmmu_mp: mmu@ec680000 { ipmmu_mx: mmu@fe951000 { compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; reg = <0 0xfe951000 0 0x1000>; - interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, - <0 221 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1635,7 +1635,7 @@ ipmmu_mx: mmu@fe951000 { ipmmu_rt: mmu@ffc80000 { compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; reg = <0 0xffc80000 0 0x1000>; - interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1643,8 +1643,8 @@ ipmmu_rt: mmu@ffc80000 { ipmmu_gp: mmu@e62a0000 { compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; reg = <0 0xe62a0000 0 0x1000>; - interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>, - <0 261 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1721,52 +1721,52 @@ rcar_sound,ctu { rcar_sound,src { src0: src@0 { - interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x85>, <&audma1 0x9a>; dma-names = "rx", "tx"; }; src1: src@1 { - interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x87>, <&audma1 0x9c>; dma-names = "rx", "tx"; }; src2: src@2 { - interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x89>, <&audma1 0x9e>; dma-names = "rx", "tx"; }; src3: src@3 { - interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x8b>, <&audma1 0xa0>; dma-names = "rx", "tx"; }; src4: src@4 { - interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x8d>, <&audma1 0xb0>; dma-names = "rx", "tx"; }; src5: src@5 { - interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x8f>, <&audma1 0xb2>; dma-names = "rx", "tx"; }; src6: src@6 { - interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x91>, <&audma1 0xb4>; dma-names = "rx", "tx"; }; src7: src@7 { - interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x93>, <&audma1 0xb6>; dma-names = "rx", "tx"; }; src8: src@8 { - interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x95>, <&audma1 0xb8>; dma-names = "rx", "tx"; }; src9: src@9 { - interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x97>, <&audma1 0xba>; dma-names = "rx", "tx"; }; @@ -1774,52 +1774,52 @@ src9: src@9 { rcar_sound,ssi { ssi0: ssi@0 { - interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi1: ssi@1 { - interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi2: ssi@2 { - interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi3: ssi@3 { - interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi4: ssi@4 { - interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi5: ssi@5 { - interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi6: ssi@6 { - interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi7: ssi@7 { - interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi8: ssi@8 { - interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; dma-names = "rx", "tx", "rxu", "txu"; }; ssi9: ssi@9 { - interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; dma-names = "rx", "tx", "rxu", "txu"; }; From 84e734f497cd48f60c16c400d14b8da08cd281dc Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 13 Jan 2016 02:06:08 +0300 Subject: [PATCH 13/68] ARM: dts: silk: add DU DT support Define the SILK board dependent part of the DU device node. Add the device nodes for the Analog Devices ADV7511W HDMI transmitter (connected to DU0) and ADV7123 video DAC (connected to DU1). Add the necessary subnodes to interconnect DU, HDMI/VDAC devices, and HDMI/VGA connectors. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-silk.dts | 109 +++++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts index 5153e3af25d9..98b8bcca84da 100644 --- a/arch/arm/boot/dts/r8a7794-silk.dts +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -64,6 +64,61 @@ vccq_sdhi1: regulator@4 { states = <3300000 1 1800000 0>; }; + + vga-encoder { + compatible = "adi,adv7123"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&du_out_rgb1>; + }; + }; + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_in>; + }; + }; + }; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; + + vga { + compatible = "vga-connector"; + + port { + vga_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + + x2_clk: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; + + x3_clk: x3-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; }; &extal_clk { @@ -164,6 +219,38 @@ adv7180: endpoint { }; }; }; + + hdmi@39 { + compatible = "adi,adv7511w"; + reg = <0x39>; + interrupt-parent = <&gpio5>; + interrupts = <23 IRQ_TYPE_LEVEL_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&du_out_rgb0>; + }; + }; + + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; }; &mmcif0 { @@ -258,3 +345,25 @@ &pci1 { &usbphy { status = "okay"; }; + +&du { + status = "okay"; + + clocks = <&mstp7_clks R8A7794_CLK_DU0>, + <&mstp7_clks R8A7794_CLK_DU0>, + <&x2_clk>, <&x3_clk>; + clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; + port@1 { + endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + }; +}; From 214e8481fe1fef5e88f80f0da6c9bfbd1963099f Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 18 Jan 2016 14:18:43 +0900 Subject: [PATCH 14/68] ARM: dts: r8a7793: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r8a7793 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7793.dtsi | 216 ++++++++++++++++----------------- 1 file changed, 108 insertions(+), 108 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 0ce7cc420c9d..ea1196b99d52 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -63,13 +63,13 @@ gic: interrupt-controller@f1001000 { <0 0xf1002000 0 0x1000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = ; }; gpio0: gpio@e6050000 { compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; reg = <0 0xe6050000 0 0x50>; - interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 32>; @@ -82,7 +82,7 @@ gpio0: gpio@e6050000 { gpio1: gpio@e6051000 { compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; reg = <0 0xe6051000 0 0x50>; - interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 26>; @@ -95,7 +95,7 @@ gpio1: gpio@e6051000 { gpio2: gpio@e6052000 { compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; reg = <0 0xe6052000 0 0x50>; - interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 32>; @@ -108,7 +108,7 @@ gpio2: gpio@e6052000 { gpio3: gpio@e6053000 { compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; reg = <0 0xe6053000 0 0x50>; - interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 32>; @@ -121,7 +121,7 @@ gpio3: gpio@e6053000 { gpio4: gpio@e6054000 { compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; reg = <0 0xe6054000 0 0x50>; - interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 32>; @@ -134,7 +134,7 @@ gpio4: gpio@e6054000 { gpio5: gpio@e6055000 { compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; reg = <0 0xe6055000 0 0x50>; - interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 160 32>; @@ -147,7 +147,7 @@ gpio5: gpio@e6055000 { gpio6: gpio@e6055400 { compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; reg = <0 0xe6055400 0 0x50>; - interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 192 32>; @@ -160,7 +160,7 @@ gpio6: gpio@e6055400 { gpio7: gpio@e6055800 { compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar"; reg = <0 0xe6055800 0 0x50>; - interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 224 26>; @@ -173,24 +173,24 @@ gpio7: gpio@e6055800 { thermal@e61f0000 { compatible = "renesas,thermal-r8a7793", "renesas,rcar-thermal"; reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks R8A7793_CLK_THERMAL>; power-domains = <&cpg_clocks>; }; timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = , + , + , + ; }; cmt0: timer@ffca0000 { compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2"; reg = <0 0xffca0000 0 0x1004>; - interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, - <0 143 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; clocks = <&mstp1_clks R8A7793_CLK_CMT0>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -203,14 +203,14 @@ cmt0: timer@ffca0000 { cmt1: timer@e6130000 { compatible = "renesas,cmt-48-r8a7793", "renesas,cmt-48-gen2"; reg = <0 0xe6130000 0 0x1004>; - interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, - <0 121 IRQ_TYPE_LEVEL_HIGH>, - <0 122 IRQ_TYPE_LEVEL_HIGH>, - <0 123 IRQ_TYPE_LEVEL_HIGH>, - <0 124 IRQ_TYPE_LEVEL_HIGH>, - <0 125 IRQ_TYPE_LEVEL_HIGH>, - <0 126 IRQ_TYPE_LEVEL_HIGH>, - <0 127 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + ; clocks = <&mstp3_clks R8A7793_CLK_CMT1>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -225,16 +225,16 @@ irqc0: interrupt-controller@e61c0000 { #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, - <0 1 IRQ_TYPE_LEVEL_HIGH>, - <0 2 IRQ_TYPE_LEVEL_HIGH>, - <0 3 IRQ_TYPE_LEVEL_HIGH>, - <0 12 IRQ_TYPE_LEVEL_HIGH>, - <0 13 IRQ_TYPE_LEVEL_HIGH>, - <0 14 IRQ_TYPE_LEVEL_HIGH>, - <0 15 IRQ_TYPE_LEVEL_HIGH>, - <0 16 IRQ_TYPE_LEVEL_HIGH>, - <0 17 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + , + , + ; clocks = <&mstp4_clks R8A7793_CLK_IRQC>; power-domains = <&cpg_clocks>; }; @@ -242,22 +242,22 @@ irqc0: interrupt-controller@e61c0000 { dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH - 0 200 IRQ_TYPE_LEVEL_HIGH - 0 201 IRQ_TYPE_LEVEL_HIGH - 0 202 IRQ_TYPE_LEVEL_HIGH - 0 203 IRQ_TYPE_LEVEL_HIGH - 0 204 IRQ_TYPE_LEVEL_HIGH - 0 205 IRQ_TYPE_LEVEL_HIGH - 0 206 IRQ_TYPE_LEVEL_HIGH - 0 207 IRQ_TYPE_LEVEL_HIGH - 0 208 IRQ_TYPE_LEVEL_HIGH - 0 209 IRQ_TYPE_LEVEL_HIGH - 0 210 IRQ_TYPE_LEVEL_HIGH - 0 211 IRQ_TYPE_LEVEL_HIGH - 0 212 IRQ_TYPE_LEVEL_HIGH - 0 213 IRQ_TYPE_LEVEL_HIGH - 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -273,22 +273,22 @@ dmac0: dma-controller@e6700000 { dmac1: dma-controller@e6720000 { compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH - 0 216 IRQ_TYPE_LEVEL_HIGH - 0 217 IRQ_TYPE_LEVEL_HIGH - 0 218 IRQ_TYPE_LEVEL_HIGH - 0 219 IRQ_TYPE_LEVEL_HIGH - 0 308 IRQ_TYPE_LEVEL_HIGH - 0 309 IRQ_TYPE_LEVEL_HIGH - 0 310 IRQ_TYPE_LEVEL_HIGH - 0 311 IRQ_TYPE_LEVEL_HIGH - 0 312 IRQ_TYPE_LEVEL_HIGH - 0 313 IRQ_TYPE_LEVEL_HIGH - 0 314 IRQ_TYPE_LEVEL_HIGH - 0 315 IRQ_TYPE_LEVEL_HIGH - 0 316 IRQ_TYPE_LEVEL_HIGH - 0 317 IRQ_TYPE_LEVEL_HIGH - 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -307,7 +307,7 @@ i2c0: i2c@e6508000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7793"; reg = <0 0xe6508000 0 0x40>; - interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7793_CLK_I2C0>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -319,7 +319,7 @@ i2c1: i2c@e6518000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7793"; reg = <0 0xe6518000 0 0x40>; - interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7793_CLK_I2C1>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -331,7 +331,7 @@ i2c2: i2c@e6530000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7793"; reg = <0 0xe6530000 0 0x40>; - interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7793_CLK_I2C2>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -343,7 +343,7 @@ i2c3: i2c@e6540000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7793"; reg = <0 0xe6540000 0 0x40>; - interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7793_CLK_I2C3>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -355,7 +355,7 @@ i2c4: i2c@e6520000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7793"; reg = <0 0xe6520000 0 0x40>; - interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7793_CLK_I2C4>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <6>; @@ -368,7 +368,7 @@ i2c5: i2c@e6528000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7793"; reg = <0 0xe6528000 0 0x40>; - interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7793_CLK_I2C5>; power-domains = <&cpg_clocks>; i2c-scl-internal-delay-ns = <110>; @@ -381,7 +381,7 @@ i2c6: i2c@e60b0000 { #size-cells = <0>; compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; reg = <0 0xe60b0000 0 0x425>; - interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>; dmas = <&dmac0 0x77>, <&dmac0 0x78>; dma-names = "tx", "rx"; @@ -394,7 +394,7 @@ i2c7: i2c@e6500000 { #size-cells = <0>; compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; reg = <0 0xe6500000 0 0x425>; - interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7793_CLK_IIC0>; dmas = <&dmac0 0x61>, <&dmac0 0x62>; dma-names = "tx", "rx"; @@ -407,7 +407,7 @@ i2c8: i2c@e6510000 { #size-cells = <0>; compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; reg = <0 0xe6510000 0 0x425>; - interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7793_CLK_IIC1>; dmas = <&dmac0 0x65>, <&dmac0 0x66>; dma-names = "tx", "rx"; @@ -423,7 +423,7 @@ pfc: pfc@e6060000 { scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7793", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; - interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>; clock-names = "sci_ick"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; @@ -435,7 +435,7 @@ scifa0: serial@e6c40000 { scifa1: serial@e6c50000 { compatible = "renesas,scifa-r8a7793", "renesas,scifa"; reg = <0 0xe6c50000 0 64>; - interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>; clock-names = "sci_ick"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; @@ -447,7 +447,7 @@ scifa1: serial@e6c50000 { scifa2: serial@e6c60000 { compatible = "renesas,scifa-r8a7793", "renesas,scifa"; reg = <0 0xe6c60000 0 64>; - interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>; clock-names = "sci_ick"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; @@ -459,7 +459,7 @@ scifa2: serial@e6c60000 { scifa3: serial@e6c70000 { compatible = "renesas,scifa-r8a7793", "renesas,scifa"; reg = <0 0xe6c70000 0 64>; - interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>; clock-names = "sci_ick"; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; @@ -471,7 +471,7 @@ scifa3: serial@e6c70000 { scifa4: serial@e6c78000 { compatible = "renesas,scifa-r8a7793", "renesas,scifa"; reg = <0 0xe6c78000 0 64>; - interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>; clock-names = "sci_ick"; dmas = <&dmac0 0x1f>, <&dmac0 0x20>; @@ -483,7 +483,7 @@ scifa4: serial@e6c78000 { scifa5: serial@e6c80000 { compatible = "renesas,scifa-r8a7793", "renesas,scifa"; reg = <0 0xe6c80000 0 64>; - interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>; clock-names = "sci_ick"; dmas = <&dmac0 0x23>, <&dmac0 0x24>; @@ -495,7 +495,7 @@ scifa5: serial@e6c80000 { scifb0: serial@e6c20000 { compatible = "renesas,scifb-r8a7793", "renesas,scifb"; reg = <0 0xe6c20000 0 64>; - interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>; clock-names = "sci_ick"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; @@ -507,7 +507,7 @@ scifb0: serial@e6c20000 { scifb1: serial@e6c30000 { compatible = "renesas,scifb-r8a7793", "renesas,scifb"; reg = <0 0xe6c30000 0 64>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>; clock-names = "sci_ick"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; @@ -519,7 +519,7 @@ scifb1: serial@e6c30000 { scifb2: serial@e6ce0000 { compatible = "renesas,scifb-r8a7793", "renesas,scifb"; reg = <0 0xe6ce0000 0 64>; - interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>; clock-names = "sci_ick"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; @@ -531,7 +531,7 @@ scifb2: serial@e6ce0000 { scif0: serial@e6e60000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6e60000 0 64>; - interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF0>; clock-names = "sci_ick"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; @@ -543,7 +543,7 @@ scif0: serial@e6e60000 { scif1: serial@e6e68000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6e68000 0 64>; - interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF1>; clock-names = "sci_ick"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; @@ -555,7 +555,7 @@ scif1: serial@e6e68000 { scif2: serial@e6e58000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6e58000 0 64>; - interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF2>; clock-names = "sci_ick"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; @@ -567,7 +567,7 @@ scif2: serial@e6e58000 { scif3: serial@e6ea8000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6ea8000 0 64>; - interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF3>; clock-names = "sci_ick"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; @@ -579,7 +579,7 @@ scif3: serial@e6ea8000 { scif4: serial@e6ee0000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6ee0000 0 64>; - interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF4>; clock-names = "sci_ick"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; @@ -591,7 +591,7 @@ scif4: serial@e6ee0000 { scif5: serial@e6ee8000 { compatible = "renesas,scif-r8a7793", "renesas,scif"; reg = <0 0xe6ee8000 0 64>; - interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF5>; clock-names = "sci_ick"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; @@ -603,7 +603,7 @@ scif5: serial@e6ee8000 { hscif0: serial@e62c0000 { compatible = "renesas,hscif-r8a7793", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; - interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>; clock-names = "sci_ick"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; @@ -615,7 +615,7 @@ hscif0: serial@e62c0000 { hscif1: serial@e62c8000 { compatible = "renesas,hscif-r8a7793", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; - interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>; clock-names = "sci_ick"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; @@ -627,7 +627,7 @@ hscif1: serial@e62c8000 { hscif2: serial@e62d0000 { compatible = "renesas,hscif-r8a7793", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; - interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>; clock-names = "sci_ick"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; @@ -639,7 +639,7 @@ hscif2: serial@e62d0000 { ether: ethernet@ee700000 { compatible = "renesas,ether-r8a7793"; reg = <0 0xee700000 0 0x400>; - interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7793_CLK_ETHER>; power-domains = <&cpg_clocks>; phy-mode = "rmii"; @@ -651,7 +651,7 @@ ether: ethernet@ee700000 { qspi: spi@e6b10000 { compatible = "renesas,qspi-r8a7793", "renesas,qspi"; reg = <0 0xe6b10000 0 0x2c>; - interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>; dmas = <&dmac0 0x17>, <&dmac0 0x18>; dma-names = "tx", "rx"; @@ -667,8 +667,8 @@ du: display@feb00000 { reg = <0 0xfeb00000 0 0x40000>, <0 0xfeb90000 0 0x1c>; reg-names = "du", "lvds.0"; - interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, - <0 268 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; clocks = <&mstp7_clks R8A7793_CLK_DU0>, <&mstp7_clks R8A7793_CLK_DU1>, <&mstp7_clks R8A7793_CLK_LVDS0>; @@ -978,8 +978,8 @@ R8A7793_CLK_SCIFA3 R8A7793_CLK_SCIFA4 R8A7793_CLK_SCIFA5 ipmmu_sy0: mmu@e6280000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xe6280000 0 0x1000>; - interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, - <0 224 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -987,7 +987,7 @@ ipmmu_sy0: mmu@e6280000 { ipmmu_sy1: mmu@e6290000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xe6290000 0 0x1000>; - interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -995,8 +995,8 @@ ipmmu_sy1: mmu@e6290000 { ipmmu_ds: mmu@e6740000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xe6740000 0 0x1000>; - interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, - <0 199 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1004,7 +1004,7 @@ ipmmu_ds: mmu@e6740000 { ipmmu_mp: mmu@ec680000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xec680000 0 0x1000>; - interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1012,8 +1012,8 @@ ipmmu_mp: mmu@ec680000 { ipmmu_mx: mmu@fe951000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xfe951000 0 0x1000>; - interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, - <0 221 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1021,7 +1021,7 @@ ipmmu_mx: mmu@fe951000 { ipmmu_rt: mmu@ffc80000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xffc80000 0 0x1000>; - interrupts = <0 307 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1029,8 +1029,8 @@ ipmmu_rt: mmu@ffc80000 { ipmmu_gp: mmu@e62a0000 { compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; reg = <0 0xe62a0000 0 0x1000>; - interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>, - <0 261 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; From 8d47e6af6f824e6f68f0af3f09816cc424e6fbac Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 18 Jan 2016 14:18:44 +0900 Subject: [PATCH 15/68] ARM: dts: r8a7794: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r8a7794 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 234 ++++++++++++++++----------------- 1 file changed, 117 insertions(+), 117 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index f8cd3a0beebf..21be4bdc4001 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -59,13 +59,13 @@ gic: interrupt-controller@f1001000 { <0 0xf1002000 0 0x1000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = ; }; gpio0: gpio@e6050000 { compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar"; reg = <0 0xe6050000 0 0x50>; - interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 32>; @@ -78,7 +78,7 @@ gpio0: gpio@e6050000 { gpio1: gpio@e6051000 { compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar"; reg = <0 0xe6051000 0 0x50>; - interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 26>; @@ -91,7 +91,7 @@ gpio1: gpio@e6051000 { gpio2: gpio@e6052000 { compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar"; reg = <0 0xe6052000 0 0x50>; - interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 32>; @@ -104,7 +104,7 @@ gpio2: gpio@e6052000 { gpio3: gpio@e6053000 { compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar"; reg = <0 0xe6053000 0 0x50>; - interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 32>; @@ -117,7 +117,7 @@ gpio3: gpio@e6053000 { gpio4: gpio@e6054000 { compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar"; reg = <0 0xe6054000 0 0x50>; - interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 32>; @@ -130,7 +130,7 @@ gpio4: gpio@e6054000 { gpio5: gpio@e6055000 { compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar"; reg = <0 0xe6055000 0 0x50>; - interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 160 28>; @@ -143,7 +143,7 @@ gpio5: gpio@e6055000 { gpio6: gpio@e6055400 { compatible = "renesas,gpio-r8a7794", "renesas,gpio-rcar"; reg = <0 0xe6055400 0 0x50>; - interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 192 26>; @@ -156,8 +156,8 @@ gpio6: gpio@e6055400 { cmt0: timer@ffca0000 { compatible = "renesas,cmt-48-gen2"; reg = <0 0xffca0000 0 0x1004>; - interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, - <0 143 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; clocks = <&mstp1_clks R8A7794_CLK_CMT0>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -170,14 +170,14 @@ cmt0: timer@ffca0000 { cmt1: timer@e6130000 { compatible = "renesas,cmt-48-gen2"; reg = <0 0xe6130000 0 0x1004>; - interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, - <0 121 IRQ_TYPE_LEVEL_HIGH>, - <0 122 IRQ_TYPE_LEVEL_HIGH>, - <0 123 IRQ_TYPE_LEVEL_HIGH>, - <0 124 IRQ_TYPE_LEVEL_HIGH>, - <0 125 IRQ_TYPE_LEVEL_HIGH>, - <0 126 IRQ_TYPE_LEVEL_HIGH>, - <0 127 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + ; clocks = <&mstp3_clks R8A7794_CLK_CMT1>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -189,10 +189,10 @@ cmt1: timer@e6130000 { timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <1 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = , + , + , + ; }; irqc0: interrupt-controller@e61c0000 { @@ -200,16 +200,16 @@ irqc0: interrupt-controller@e61c0000 { #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, - <0 1 IRQ_TYPE_LEVEL_HIGH>, - <0 2 IRQ_TYPE_LEVEL_HIGH>, - <0 3 IRQ_TYPE_LEVEL_HIGH>, - <0 12 IRQ_TYPE_LEVEL_HIGH>, - <0 13 IRQ_TYPE_LEVEL_HIGH>, - <0 14 IRQ_TYPE_LEVEL_HIGH>, - <0 15 IRQ_TYPE_LEVEL_HIGH>, - <0 16 IRQ_TYPE_LEVEL_HIGH>, - <0 17 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + , + , + ; clocks = <&mstp4_clks R8A7794_CLK_IRQC>; power-domains = <&cpg_clocks>; }; @@ -222,22 +222,22 @@ pfc: pin-controller@e6060000 { dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH - 0 200 IRQ_TYPE_LEVEL_HIGH - 0 201 IRQ_TYPE_LEVEL_HIGH - 0 202 IRQ_TYPE_LEVEL_HIGH - 0 203 IRQ_TYPE_LEVEL_HIGH - 0 204 IRQ_TYPE_LEVEL_HIGH - 0 205 IRQ_TYPE_LEVEL_HIGH - 0 206 IRQ_TYPE_LEVEL_HIGH - 0 207 IRQ_TYPE_LEVEL_HIGH - 0 208 IRQ_TYPE_LEVEL_HIGH - 0 209 IRQ_TYPE_LEVEL_HIGH - 0 210 IRQ_TYPE_LEVEL_HIGH - 0 211 IRQ_TYPE_LEVEL_HIGH - 0 212 IRQ_TYPE_LEVEL_HIGH - 0 213 IRQ_TYPE_LEVEL_HIGH - 0 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -253,22 +253,22 @@ dmac0: dma-controller@e6700000 { dmac1: dma-controller@e6720000 { compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH - 0 216 IRQ_TYPE_LEVEL_HIGH - 0 217 IRQ_TYPE_LEVEL_HIGH - 0 218 IRQ_TYPE_LEVEL_HIGH - 0 219 IRQ_TYPE_LEVEL_HIGH - 0 308 IRQ_TYPE_LEVEL_HIGH - 0 309 IRQ_TYPE_LEVEL_HIGH - 0 310 IRQ_TYPE_LEVEL_HIGH - 0 311 IRQ_TYPE_LEVEL_HIGH - 0 312 IRQ_TYPE_LEVEL_HIGH - 0 313 IRQ_TYPE_LEVEL_HIGH - 0 314 IRQ_TYPE_LEVEL_HIGH - 0 315 IRQ_TYPE_LEVEL_HIGH - 0 316 IRQ_TYPE_LEVEL_HIGH - 0 317 IRQ_TYPE_LEVEL_HIGH - 0 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -284,7 +284,7 @@ dmac1: dma-controller@e6720000 { scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7794", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; - interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>; clock-names = "sci_ick"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; @@ -296,7 +296,7 @@ scifa0: serial@e6c40000 { scifa1: serial@e6c50000 { compatible = "renesas,scifa-r8a7794", "renesas,scifa"; reg = <0 0xe6c50000 0 64>; - interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA1>; clock-names = "sci_ick"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; @@ -308,7 +308,7 @@ scifa1: serial@e6c50000 { scifa2: serial@e6c60000 { compatible = "renesas,scifa-r8a7794", "renesas,scifa"; reg = <0 0xe6c60000 0 64>; - interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA2>; clock-names = "sci_ick"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; @@ -320,7 +320,7 @@ scifa2: serial@e6c60000 { scifa3: serial@e6c70000 { compatible = "renesas,scifa-r8a7794", "renesas,scifa"; reg = <0 0xe6c70000 0 64>; - interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA3>; clock-names = "sci_ick"; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; @@ -332,7 +332,7 @@ scifa3: serial@e6c70000 { scifa4: serial@e6c78000 { compatible = "renesas,scifa-r8a7794", "renesas,scifa"; reg = <0 0xe6c78000 0 64>; - interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA4>; clock-names = "sci_ick"; dmas = <&dmac0 0x1f>, <&dmac0 0x20>; @@ -344,7 +344,7 @@ scifa4: serial@e6c78000 { scifa5: serial@e6c80000 { compatible = "renesas,scifa-r8a7794", "renesas,scifa"; reg = <0 0xe6c80000 0 64>; - interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA5>; clock-names = "sci_ick"; dmas = <&dmac0 0x23>, <&dmac0 0x24>; @@ -356,7 +356,7 @@ scifa5: serial@e6c80000 { scifb0: serial@e6c20000 { compatible = "renesas,scifb-r8a7794", "renesas,scifb"; reg = <0 0xe6c20000 0 64>; - interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>; clock-names = "sci_ick"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; @@ -368,7 +368,7 @@ scifb0: serial@e6c20000 { scifb1: serial@e6c30000 { compatible = "renesas,scifb-r8a7794", "renesas,scifb"; reg = <0 0xe6c30000 0 64>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>; clock-names = "sci_ick"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; @@ -380,7 +380,7 @@ scifb1: serial@e6c30000 { scifb2: serial@e6ce0000 { compatible = "renesas,scifb-r8a7794", "renesas,scifb"; reg = <0 0xe6ce0000 0 64>; - interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>; clock-names = "sci_ick"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; @@ -392,7 +392,7 @@ scifb2: serial@e6ce0000 { scif0: serial@e6e60000 { compatible = "renesas,scif-r8a7794", "renesas,scif"; reg = <0 0xe6e60000 0 64>; - interrupts = <0 152 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF0>; clock-names = "sci_ick"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; @@ -404,7 +404,7 @@ scif0: serial@e6e60000 { scif1: serial@e6e68000 { compatible = "renesas,scif-r8a7794", "renesas,scif"; reg = <0 0xe6e68000 0 64>; - interrupts = <0 153 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF1>; clock-names = "sci_ick"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; @@ -416,7 +416,7 @@ scif1: serial@e6e68000 { scif2: serial@e6e58000 { compatible = "renesas,scif-r8a7794", "renesas,scif"; reg = <0 0xe6e58000 0 64>; - interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF2>; clock-names = "sci_ick"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; @@ -428,7 +428,7 @@ scif2: serial@e6e58000 { scif3: serial@e6ea8000 { compatible = "renesas,scif-r8a7794", "renesas,scif"; reg = <0 0xe6ea8000 0 64>; - interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF3>; clock-names = "sci_ick"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; @@ -440,7 +440,7 @@ scif3: serial@e6ea8000 { scif4: serial@e6ee0000 { compatible = "renesas,scif-r8a7794", "renesas,scif"; reg = <0 0xe6ee0000 0 64>; - interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF4>; clock-names = "sci_ick"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; @@ -452,7 +452,7 @@ scif4: serial@e6ee0000 { scif5: serial@e6ee8000 { compatible = "renesas,scif-r8a7794", "renesas,scif"; reg = <0 0xe6ee8000 0 64>; - interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF5>; clock-names = "sci_ick"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; @@ -464,7 +464,7 @@ scif5: serial@e6ee8000 { hscif0: serial@e62c0000 { compatible = "renesas,hscif-r8a7794", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; - interrupts = <0 154 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>; clock-names = "sci_ick"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; @@ -476,7 +476,7 @@ hscif0: serial@e62c0000 { hscif1: serial@e62c8000 { compatible = "renesas,hscif-r8a7794", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; - interrupts = <0 155 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>; clock-names = "sci_ick"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; @@ -488,7 +488,7 @@ hscif1: serial@e62c8000 { hscif2: serial@e62d0000 { compatible = "renesas,hscif-r8a7794", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; - interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>; clock-names = "sci_ick"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; @@ -500,7 +500,7 @@ hscif2: serial@e62d0000 { ether: ethernet@ee700000 { compatible = "renesas,ether-r8a7794"; reg = <0 0xee700000 0 0x400>; - interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7794_CLK_ETHER>; power-domains = <&cpg_clocks>; phy-mode = "rmii"; @@ -513,7 +513,7 @@ ether: ethernet@ee700000 { i2c0: i2c@e6508000 { compatible = "renesas,i2c-r8a7794"; reg = <0 0xe6508000 0 0x40>; - interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7794_CLK_I2C0>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -525,7 +525,7 @@ i2c0: i2c@e6508000 { i2c1: i2c@e6518000 { compatible = "renesas,i2c-r8a7794"; reg = <0 0xe6518000 0 0x40>; - interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7794_CLK_I2C1>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -537,7 +537,7 @@ i2c1: i2c@e6518000 { i2c2: i2c@e6530000 { compatible = "renesas,i2c-r8a7794"; reg = <0 0xe6530000 0 0x40>; - interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7794_CLK_I2C2>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -549,7 +549,7 @@ i2c2: i2c@e6530000 { i2c3: i2c@e6540000 { compatible = "renesas,i2c-r8a7794"; reg = <0 0xe6540000 0 0x40>; - interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7794_CLK_I2C3>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -561,7 +561,7 @@ i2c3: i2c@e6540000 { i2c4: i2c@e6520000 { compatible = "renesas,i2c-r8a7794"; reg = <0 0xe6520000 0 0x40>; - interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7794_CLK_I2C4>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -573,7 +573,7 @@ i2c4: i2c@e6520000 { i2c5: i2c@e6528000 { compatible = "renesas,i2c-r8a7794"; reg = <0 0xe6528000 0 0x40>; - interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7794_CLK_I2C5>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -585,7 +585,7 @@ i2c5: i2c@e6528000 { mmcif0: mmc@ee200000 { compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; - interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7794_CLK_MMCIF0>; dmas = <&dmac0 0xd1>, <&dmac0 0xd2>; dma-names = "tx", "rx"; @@ -597,7 +597,7 @@ mmcif0: mmc@ee200000 { sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a7794"; reg = <0 0xee100000 0 0x200>; - interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7794_CLK_SDHI0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -606,7 +606,7 @@ sdhi0: sd@ee100000 { sdhi1: sd@ee140000 { compatible = "renesas,sdhi-r8a7794"; reg = <0 0xee140000 0 0x100>; - interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7794_CLK_SDHI1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -615,7 +615,7 @@ sdhi1: sd@ee140000 { sdhi2: sd@ee160000 { compatible = "renesas,sdhi-r8a7794"; reg = <0 0xee160000 0 0x100>; - interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7794_CLK_SDHI2>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -624,7 +624,7 @@ sdhi2: sd@ee160000 { qspi: spi@e6b10000 { compatible = "renesas,qspi-r8a7794", "renesas,qspi"; reg = <0 0xe6b10000 0 0x2c>; - interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp9_clks R8A7794_CLK_QSPI_MOD>; dmas = <&dmac0 0x17>, <&dmac0 0x18>; dma-names = "tx", "rx"; @@ -638,7 +638,7 @@ qspi: spi@e6b10000 { vin0: video@e6ef0000 { compatible = "renesas,vin-r8a7794"; reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7794_CLK_VIN0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -647,7 +647,7 @@ vin0: video@e6ef0000 { vin1: video@e6ef1000 { compatible = "renesas,vin-r8a7794"; reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp8_clks R8A7794_CLK_VIN1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -658,7 +658,7 @@ pci0: pci@ee090000 { device_type = "pci"; reg = <0 0xee090000 0 0xc00>, <0 0xee080000 0 0x1100>; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_EHCI>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -669,9 +669,9 @@ pci0: pci@ee090000 { #interrupt-cells = <1>; ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; usb@0,1 { reg = <0x800 0 0 0 0>; @@ -693,7 +693,7 @@ pci1: pci@ee0d0000 { device_type = "pci"; reg = <0 0xee0d0000 0 0xc00>, <0 0xee0c0000 0 0x1100>; - interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_EHCI>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -704,9 +704,9 @@ pci1: pci@ee0d0000 { #interrupt-cells = <1>; ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; usb@0,1 { reg = <0x800 0 0 0 0>; @@ -726,7 +726,7 @@ usb@0,2 { hsusb: usb@e6590000 { compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs"; reg = <0 0xe6590000 0 0x100>; - interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSUSB>; power-domains = <&cpg_clocks>; renesas,buswait = <4>; @@ -759,8 +759,8 @@ du: display@feb00000 { compatible = "renesas,du-r8a7794"; reg = <0 0xfeb00000 0 0x40000>; reg-names = "du"; - interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, - <0 268 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; clocks = <&mstp7_clks R8A7794_CLK_DU0>, <&mstp7_clks R8A7794_CLK_DU0>; clock-names = "du.0", "du.1"; @@ -1111,8 +1111,8 @@ R8A7794_CLK_SCIFA3 R8A7794_CLK_SCIFA4 R8A7794_CLK_SCIFA5 ipmmu_sy0: mmu@e6280000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; reg = <0 0xe6280000 0 0x1000>; - interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>, - <0 224 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1120,7 +1120,7 @@ ipmmu_sy0: mmu@e6280000 { ipmmu_sy1: mmu@e6290000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; reg = <0 0xe6290000 0 0x1000>; - interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1128,8 +1128,8 @@ ipmmu_sy1: mmu@e6290000 { ipmmu_ds: mmu@e6740000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; reg = <0 0xe6740000 0 0x1000>; - interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, - <0 199 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1137,7 +1137,7 @@ ipmmu_ds: mmu@e6740000 { ipmmu_mp: mmu@ec680000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; reg = <0 0xec680000 0 0x1000>; - interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #iommu-cells = <1>; status = "disabled"; }; @@ -1145,8 +1145,8 @@ ipmmu_mp: mmu@ec680000 { ipmmu_mx: mmu@fe951000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; reg = <0 0xfe951000 0 0x1000>; - interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, - <0 221 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; @@ -1154,8 +1154,8 @@ ipmmu_mx: mmu@fe951000 { ipmmu_gp: mmu@e62a0000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; reg = <0 0xe62a0000 0 0x1000>; - interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>, - <0 261 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; #iommu-cells = <1>; status = "disabled"; }; From 8871eb07c0e77196f1f6cd2ccd659516e3e5d9aa Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Jan 2016 20:03:10 +0900 Subject: [PATCH 16/68] ARM: dts: r8a7793: gose: Add HDMI video out support This patch adds r8a7793 GOSE HDMI video out support. The r8a7793 GOSE board is similar to r8a7791 Koelsch. For those boards an on-board HDMI encoder chip provides HDMI video out and also a LVDS port is available for external LCD panels. Tested on r8a7793 Gose with HDMI hooked up to a Toshiba TV. Signed-off-by: Magnus Damm [simon: rebased; reused existing i2c2 node] Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 85 ++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 987ed03b1e02..0b4cc8d99390 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -129,6 +129,54 @@ led8 { label = "LED8"; }; }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&adv7511_out>; + }; + }; + }; + + x2_clk: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; + + x13_clk: x13-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + clocks = <&mstp7_clks R8A7793_CLK_DU0>, + <&mstp7_clks R8A7793_CLK_DU1>, + <&mstp7_clks R8A7793_CLK_LVDS0>, + <&x13_clk>, <&x2_clk>; + clock-names = "du.0", "du.1", "lvds.0", + "dclkin.0", "dclkin.1"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7511_in>; + }; + }; + port@1 { + lvds_connector: endpoint { + }; + }; + }; }; &extal_clk { @@ -141,6 +189,11 @@ i2c2_pins: i2c2 { renesas,function = "i2c2"; }; + du_pins: du { + renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; + renesas,function = "du"; + }; + scif0_pins: serial0 { renesas,groups = "scif0_data_d"; renesas,function = "scif0"; @@ -247,6 +300,38 @@ &i2c2 { status = "okay"; clock-frequency = <100000>; + hdmi@39 { + compatible = "adi,adv7511w"; + reg = <0x39>; + interrupt-parent = <&gpio3>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,input-style = <1>; + adi,input-justification = "evenly"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7511_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + + port@1 { + reg = <1>; + adv7511_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + eeprom@50 { compatible = "renesas,r1ex24002", "atmel,24c02"; reg = <0x50>; From 0c34bd1e00b0c60407ede0ca0d49862ef6116fa5 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 21 Jan 2016 13:52:45 +0900 Subject: [PATCH 17/68] ARM: dts: r8a7778: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r8a7778 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7778.dtsi | 87 +++++++++++++++++----------------- 1 file changed, 44 insertions(+), 43 deletions(-) diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index 791aafd310a5..fc5e7243467a 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -17,6 +17,7 @@ /include/ "skeleton.dtsi" #include +#include #include / { @@ -51,7 +52,7 @@ bsc: bus@1c000000 { ether: ethernet@fde00000 { compatible = "renesas,ether-r8a7778"; reg = <0xfde00000 0x400>; - interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7778_CLK_ETHER>; power-domains = <&cpg_clocks>; phy-mode = "rmii"; @@ -79,17 +80,17 @@ irqpin: interrupt-controller@fe78001c { <0xfe780024 4>, <0xfe780044 4>, <0xfe780064 4>; - interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH - 0 28 IRQ_TYPE_LEVEL_HIGH - 0 29 IRQ_TYPE_LEVEL_HIGH - 0 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; sense-bitfield-width = <2>; }; gpio0: gpio@ffc40000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc40000 0x2c>; - interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 32>; @@ -100,7 +101,7 @@ gpio0: gpio@ffc40000 { gpio1: gpio@ffc41000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc41000 0x2c>; - interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 32>; @@ -111,7 +112,7 @@ gpio1: gpio@ffc41000 { gpio2: gpio@ffc42000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc42000 0x2c>; - interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 32>; @@ -122,7 +123,7 @@ gpio2: gpio@ffc42000 { gpio3: gpio@ffc43000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc43000 0x2c>; - interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 32>; @@ -133,7 +134,7 @@ gpio3: gpio@ffc43000 { gpio4: gpio@ffc44000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc44000 0x2c>; - interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 27>; @@ -151,7 +152,7 @@ i2c0: i2c@ffc70000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc70000 0x1000>; - interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_I2C0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -162,7 +163,7 @@ i2c1: i2c@ffc71000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc71000 0x1000>; - interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_I2C1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -173,7 +174,7 @@ i2c2: i2c@ffc72000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc72000 0x1000>; - interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_I2C2>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -184,7 +185,7 @@ i2c3: i2c@ffc73000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc73000 0x1000>; - interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_I2C3>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -193,9 +194,9 @@ i2c3: i2c@ffc73000 { tmu0: timer@ffd80000 { compatible = "renesas,tmu-r8a7778", "renesas,tmu"; reg = <0xffd80000 0x30>; - interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, - <0 33 IRQ_TYPE_LEVEL_HIGH>, - <0 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp0_clks R8A7778_CLK_TMU0>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -208,9 +209,9 @@ tmu0: timer@ffd80000 { tmu1: timer@ffd81000 { compatible = "renesas,tmu-r8a7778", "renesas,tmu"; reg = <0xffd81000 0x30>; - interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>, - <0 37 IRQ_TYPE_LEVEL_HIGH>, - <0 38 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp0_clks R8A7778_CLK_TMU1>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -223,9 +224,9 @@ tmu1: timer@ffd81000 { tmu2: timer@ffd82000 { compatible = "renesas,tmu-r8a7778", "renesas,tmu"; reg = <0xffd82000 0x30>; - interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, - <0 41 IRQ_TYPE_LEVEL_HIGH>, - <0 42 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp0_clks R8A7778_CLK_TMU2>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -285,20 +286,20 @@ rcar_sound,src { }; rcar_sound,ssi { - ssi3: ssi@3 { interrupts = <0 0x85 IRQ_TYPE_LEVEL_HIGH>; }; - ssi4: ssi@4 { interrupts = <0 0x85 IRQ_TYPE_LEVEL_HIGH>; }; - ssi5: ssi@5 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; }; - ssi6: ssi@6 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; }; - ssi7: ssi@7 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; }; - ssi8: ssi@8 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; }; - ssi9: ssi@9 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; }; + ssi3: ssi@3 { interrupts = ; }; + ssi4: ssi@4 { interrupts = ; }; + ssi5: ssi@5 { interrupts = ; }; + ssi6: ssi@6 { interrupts = ; }; + ssi7: ssi@7 { interrupts = ; }; + ssi8: ssi@8 { interrupts = ; }; + ssi9: ssi@9 { interrupts = ; }; }; }; scif0: serial@ffe40000 { compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe40000 0x100>; - interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF0>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -308,7 +309,7 @@ scif0: serial@ffe40000 { scif1: serial@ffe41000 { compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe41000 0x100>; - interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF1>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -318,7 +319,7 @@ scif1: serial@ffe41000 { scif2: serial@ffe42000 { compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe42000 0x100>; - interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF2>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -328,7 +329,7 @@ scif2: serial@ffe42000 { scif3: serial@ffe43000 { compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe43000 0x100>; - interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF3>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -338,7 +339,7 @@ scif3: serial@ffe43000 { scif4: serial@ffe44000 { compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe44000 0x100>; - interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF4>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -348,7 +349,7 @@ scif4: serial@ffe44000 { scif5: serial@ffe45000 { compatible = "renesas,scif-r8a7778", "renesas,scif"; reg = <0xffe45000 0x100>; - interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF5>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -358,7 +359,7 @@ scif5: serial@ffe45000 { mmcif: mmc@ffe4e000 { compatible = "renesas,sh-mmcif"; reg = <0xffe4e000 0x100>; - interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7778_CLK_MMC>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -367,7 +368,7 @@ mmcif: mmc@ffe4e000 { sdhi0: sd@ffe4c000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4c000 0x100>; - interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7778_CLK_SDHI0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -376,7 +377,7 @@ sdhi0: sd@ffe4c000 { sdhi1: sd@ffe4d000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4d000 0x100>; - interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7778_CLK_SDHI1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -385,7 +386,7 @@ sdhi1: sd@ffe4d000 { sdhi2: sd@ffe4f000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4f000 0x100>; - interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7778_CLK_SDHI2>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -394,7 +395,7 @@ sdhi2: sd@ffe4f000 { hspi0: spi@fffc7000 { compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc7000 0x18>; - interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_HSPI>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -405,7 +406,7 @@ hspi0: spi@fffc7000 { hspi1: spi@fffc8000 { compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc8000 0x18>; - interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_HSPI>; power-domains = <&cpg_clocks>; #address-cells = <1>; @@ -416,7 +417,7 @@ hspi1: spi@fffc8000 { hspi2: spi@fffc6000 { compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc6000 0x18>; - interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_HSPI>; power-domains = <&cpg_clocks>; #address-cells = <1>; From 854b7733fee0ebdb70e34ffa5f57de4cff319a49 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 21 Jan 2016 13:52:46 +0900 Subject: [PATCH 18/68] ARM: dts: r8a7779: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r8a7779 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7779.dtsi | 78 +++++++++++++++++----------------- 1 file changed, 39 insertions(+), 39 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 6afa909865b5..93f3fdf95e31 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -74,7 +74,7 @@ timer@f0000600 { gpio0: gpio@ffc40000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc40000 0x2c>; - interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 0 32>; @@ -85,7 +85,7 @@ gpio0: gpio@ffc40000 { gpio1: gpio@ffc41000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc41000 0x2c>; - interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 32 32>; @@ -96,7 +96,7 @@ gpio1: gpio@ffc41000 { gpio2: gpio@ffc42000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc42000 0x2c>; - interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 64 32>; @@ -107,7 +107,7 @@ gpio2: gpio@ffc42000 { gpio3: gpio@ffc43000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc43000 0x2c>; - interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 96 32>; @@ -118,7 +118,7 @@ gpio3: gpio@ffc43000 { gpio4: gpio@ffc44000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc44000 0x2c>; - interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 128 32>; @@ -129,7 +129,7 @@ gpio4: gpio@ffc44000 { gpio5: gpio@ffc45000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc45000 0x2c>; - interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 160 32>; @@ -140,7 +140,7 @@ gpio5: gpio@ffc45000 { gpio6: gpio@ffc46000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc46000 0x2c>; - interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #gpio-cells = <2>; gpio-controller; gpio-ranges = <&pfc 0 192 9>; @@ -159,10 +159,10 @@ irqpin0: interrupt-controller@fe78001c { <0xfe780044 4>, <0xfe780064 4>, <0xfe780000 4>; - interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH - 0 28 IRQ_TYPE_LEVEL_HIGH - 0 29 IRQ_TYPE_LEVEL_HIGH - 0 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; sense-bitfield-width = <2>; }; @@ -171,7 +171,7 @@ i2c0: i2c@ffc70000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7779"; reg = <0xffc70000 0x1000>; - interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_I2C0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -182,7 +182,7 @@ i2c1: i2c@ffc71000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7779"; reg = <0xffc71000 0x1000>; - interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_I2C1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -193,7 +193,7 @@ i2c2: i2c@ffc72000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7779"; reg = <0xffc72000 0x1000>; - interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_I2C2>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -204,7 +204,7 @@ i2c3: i2c@ffc73000 { #size-cells = <0>; compatible = "renesas,i2c-r8a7779"; reg = <0xffc73000 0x1000>; - interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_I2C3>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -213,7 +213,7 @@ i2c3: i2c@ffc73000 { scif0: serial@ffe40000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; - interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -223,7 +223,7 @@ scif0: serial@ffe40000 { scif1: serial@ffe41000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe41000 0x100>; - interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF1>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -233,7 +233,7 @@ scif1: serial@ffe41000 { scif2: serial@ffe42000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe42000 0x100>; - interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF2>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -243,7 +243,7 @@ scif2: serial@ffe42000 { scif3: serial@ffe43000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe43000 0x100>; - interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF3>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -253,7 +253,7 @@ scif3: serial@ffe43000 { scif4: serial@ffe44000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe44000 0x100>; - interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF4>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -263,7 +263,7 @@ scif4: serial@ffe44000 { scif5: serial@ffe45000 { compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe45000 0x100>; - interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF5>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -283,9 +283,9 @@ thermal@ffc48000 { tmu0: timer@ffd80000 { compatible = "renesas,tmu-r8a7779", "renesas,tmu"; reg = <0xffd80000 0x30>; - interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, - <0 33 IRQ_TYPE_LEVEL_HIGH>, - <0 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp0_clks R8A7779_CLK_TMU0>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -298,9 +298,9 @@ tmu0: timer@ffd80000 { tmu1: timer@ffd81000 { compatible = "renesas,tmu-r8a7779", "renesas,tmu"; reg = <0xffd81000 0x30>; - interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>, - <0 37 IRQ_TYPE_LEVEL_HIGH>, - <0 38 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp0_clks R8A7779_CLK_TMU1>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -313,9 +313,9 @@ tmu1: timer@ffd81000 { tmu2: timer@ffd82000 { compatible = "renesas,tmu-r8a7779", "renesas,tmu"; reg = <0xffd82000 0x30>; - interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>, - <0 41 IRQ_TYPE_LEVEL_HIGH>, - <0 42 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp0_clks R8A7779_CLK_TMU2>; clock-names = "fck"; power-domains = <&cpg_clocks>; @@ -328,7 +328,7 @@ tmu2: timer@ffd82000 { sata: sata@fc600000 { compatible = "renesas,sata-r8a7779", "renesas,rcar-sata"; reg = <0xfc600000 0x2000>; - interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7779_CLK_SATA>; power-domains = <&cpg_clocks>; }; @@ -336,7 +336,7 @@ sata: sata@fc600000 { sdhi0: sd@ffe4c000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4c000 0x100>; - interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7779_CLK_SDHI0>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -345,7 +345,7 @@ sdhi0: sd@ffe4c000 { sdhi1: sd@ffe4d000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4d000 0x100>; - interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7779_CLK_SDHI1>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -354,7 +354,7 @@ sdhi1: sd@ffe4d000 { sdhi2: sd@ffe4e000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4e000 0x100>; - interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7779_CLK_SDHI2>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -363,7 +363,7 @@ sdhi2: sd@ffe4e000 { sdhi3: sd@ffe4f000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4f000 0x100>; - interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7779_CLK_SDHI3>; power-domains = <&cpg_clocks>; status = "disabled"; @@ -372,7 +372,7 @@ sdhi3: sd@ffe4f000 { hspi0: spi@fffc7000 { compatible = "renesas,hspi-r8a7779", "renesas,hspi"; reg = <0xfffc7000 0x18>; - interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&mstp0_clks R8A7779_CLK_HSPI>; @@ -383,7 +383,7 @@ hspi0: spi@fffc7000 { hspi1: spi@fffc8000 { compatible = "renesas,hspi-r8a7779", "renesas,hspi"; reg = <0xfffc8000 0x18>; - interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&mstp0_clks R8A7779_CLK_HSPI>; @@ -394,7 +394,7 @@ hspi1: spi@fffc8000 { hspi2: spi@fffc6000 { compatible = "renesas,hspi-r8a7779", "renesas,hspi"; reg = <0xfffc6000 0x18>; - interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; clocks = <&mstp0_clks R8A7779_CLK_HSPI>; @@ -405,7 +405,7 @@ hspi2: spi@fffc6000 { du: display@fff80000 { compatible = "renesas,du-r8a7779"; reg = <0 0xfff80000 0 0x40000>; - interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7779_CLK_DU>; power-domains = <&cpg_clocks>; status = "disabled"; From 493b4da7c10ca647850627849bcf6031c0a80f13 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Thu, 21 Jan 2016 14:36:01 -0800 Subject: [PATCH 19/68] ARM: dts: porter: add sound support Define the Porter board dependent part of the R8A7791 sound device node. Add device node for Asahi Kasei AK4642 stereo codec to the I2C2 bus. Add the "simple-audio-card" device node to interconnect the SoC sound device and the codec. Signed-off-by: Sergei Shtylyov Acked-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-porter.dts | 71 ++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index fe81fa0e478c..5015eaa0ae50 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -8,6 +8,17 @@ * kind, whether express or implied. */ +/* + * SSI-AK4642 + * + * SW3: 1: AK4642 + * 3: ADV7511 + * + * This command is required before playback/capture: + * + * amixer set "LINEOUT Mixer DACL" on + */ + /dts-v1/; #include "r8a7791.dtsi" #include @@ -101,6 +112,30 @@ x16_clk: x16-clock { #clock-cells = <0>; clock-frequency = <74250000>; }; + + x14_clk: x14-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <11289600>; + clock-output-names = "audio_clock"; + }; + + sound { + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&soundcodec>; + simple-audio-card,frame-master = <&soundcodec>; + + simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; + + soundcodec: simple-audio-card,codec { + sound-dai = <&ak4642>; + clocks = <&x14_clk>; + }; + }; }; &extal_clk { @@ -167,6 +202,16 @@ du_pins: du { renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; renesas,function = "du"; }; + + ssi_pins: sound { + renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; + renesas,function = "ssi"; + }; + + audio_clk_pins: audio_clk { + renesas,groups = "audio_clk_a"; + renesas,function = "audio_clk"; + }; }; &scif0 { @@ -257,6 +302,12 @@ &i2c2 { status = "okay"; clock-frequency = <400000>; + ak4642: codec@12 { + compatible = "asahi-kasei,ak4642"; + #sound-dai-cells = <0>; + reg = <0x12>; + }; + composite-in@20 { compatible = "adi,adv7180"; reg = <0x20>; @@ -385,3 +436,23 @@ endpoint { }; }; }; + +&rcar_sound { + pinctrl-0 = <&ssi_pins &audio_clk_pins>; + pinctrl-names = "default"; + status = "okay"; + + /* Single DAI */ + #sound-dai-cells = <0>; + + rcar_sound,dai { + dai0 { + playback = <&ssi0>; + capture = <&ssi1>; + }; + }; +}; + +&ssi1 { + shared-pin; +}; From 4d5746a3ec3a705028aeb81b34fbca70e523668a Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 25 Jan 2016 09:52:49 +0900 Subject: [PATCH 20/68] ARM: dts: r8a73a4: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r8a73a4 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a73a4.dtsi | 212 ++++++++++++++++----------------- 1 file changed, 106 insertions(+), 106 deletions(-) diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index cb4f7b2798fe..64f3efcd7ba5 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -39,10 +39,10 @@ ptm { timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = , + , + , + ; }; dbsc1: memory-controller@e6790000 { @@ -69,27 +69,27 @@ dmac: dma-multiplexer { dma0: dma-controller@e6700020 { compatible = "renesas,shdma-r8a73a4"; reg = <0 0xe6700020 0 0x89e0>; - interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH - 0 200 IRQ_TYPE_LEVEL_HIGH - 0 201 IRQ_TYPE_LEVEL_HIGH - 0 202 IRQ_TYPE_LEVEL_HIGH - 0 203 IRQ_TYPE_LEVEL_HIGH - 0 204 IRQ_TYPE_LEVEL_HIGH - 0 205 IRQ_TYPE_LEVEL_HIGH - 0 206 IRQ_TYPE_LEVEL_HIGH - 0 207 IRQ_TYPE_LEVEL_HIGH - 0 208 IRQ_TYPE_LEVEL_HIGH - 0 209 IRQ_TYPE_LEVEL_HIGH - 0 210 IRQ_TYPE_LEVEL_HIGH - 0 211 IRQ_TYPE_LEVEL_HIGH - 0 212 IRQ_TYPE_LEVEL_HIGH - 0 213 IRQ_TYPE_LEVEL_HIGH - 0 214 IRQ_TYPE_LEVEL_HIGH - 0 215 IRQ_TYPE_LEVEL_HIGH - 0 216 IRQ_TYPE_LEVEL_HIGH - 0 217 IRQ_TYPE_LEVEL_HIGH - 0 218 IRQ_TYPE_LEVEL_HIGH - 0 219 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -106,7 +106,7 @@ i2c5: i2c@e60b0000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe60b0000 0 0x428>; - interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp4_clks R8A73A4_CLK_IIC5>; power-domains = <&pd_a3sp>; @@ -116,7 +116,7 @@ i2c5: i2c@e60b0000 { cmt1: timer@e6130000 { compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2"; reg = <0 0xe6130000 0 0x1004>; - interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_CMT1>; clock-names = "fck"; power-domains = <&pd_c5>; @@ -131,38 +131,38 @@ irqc0: interrupt-controller@e61c0000 { #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, - <0 1 IRQ_TYPE_LEVEL_HIGH>, - <0 2 IRQ_TYPE_LEVEL_HIGH>, - <0 3 IRQ_TYPE_LEVEL_HIGH>, - <0 4 IRQ_TYPE_LEVEL_HIGH>, - <0 5 IRQ_TYPE_LEVEL_HIGH>, - <0 6 IRQ_TYPE_LEVEL_HIGH>, - <0 7 IRQ_TYPE_LEVEL_HIGH>, - <0 8 IRQ_TYPE_LEVEL_HIGH>, - <0 9 IRQ_TYPE_LEVEL_HIGH>, - <0 10 IRQ_TYPE_LEVEL_HIGH>, - <0 11 IRQ_TYPE_LEVEL_HIGH>, - <0 12 IRQ_TYPE_LEVEL_HIGH>, - <0 13 IRQ_TYPE_LEVEL_HIGH>, - <0 14 IRQ_TYPE_LEVEL_HIGH>, - <0 15 IRQ_TYPE_LEVEL_HIGH>, - <0 16 IRQ_TYPE_LEVEL_HIGH>, - <0 17 IRQ_TYPE_LEVEL_HIGH>, - <0 18 IRQ_TYPE_LEVEL_HIGH>, - <0 19 IRQ_TYPE_LEVEL_HIGH>, - <0 20 IRQ_TYPE_LEVEL_HIGH>, - <0 21 IRQ_TYPE_LEVEL_HIGH>, - <0 22 IRQ_TYPE_LEVEL_HIGH>, - <0 23 IRQ_TYPE_LEVEL_HIGH>, - <0 24 IRQ_TYPE_LEVEL_HIGH>, - <0 25 IRQ_TYPE_LEVEL_HIGH>, - <0 26 IRQ_TYPE_LEVEL_HIGH>, - <0 27 IRQ_TYPE_LEVEL_HIGH>, - <0 28 IRQ_TYPE_LEVEL_HIGH>, - <0 29 IRQ_TYPE_LEVEL_HIGH>, - <0 30 IRQ_TYPE_LEVEL_HIGH>, - <0 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; clocks = <&mstp4_clks R8A73A4_CLK_IRQC>; power-domains = <&pd_c4>; }; @@ -172,32 +172,32 @@ irqc1: interrupt-controller@e61c0200 { #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0200 0 0x200>; - interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, - <0 33 IRQ_TYPE_LEVEL_HIGH>, - <0 34 IRQ_TYPE_LEVEL_HIGH>, - <0 35 IRQ_TYPE_LEVEL_HIGH>, - <0 36 IRQ_TYPE_LEVEL_HIGH>, - <0 37 IRQ_TYPE_LEVEL_HIGH>, - <0 38 IRQ_TYPE_LEVEL_HIGH>, - <0 39 IRQ_TYPE_LEVEL_HIGH>, - <0 40 IRQ_TYPE_LEVEL_HIGH>, - <0 41 IRQ_TYPE_LEVEL_HIGH>, - <0 42 IRQ_TYPE_LEVEL_HIGH>, - <0 43 IRQ_TYPE_LEVEL_HIGH>, - <0 44 IRQ_TYPE_LEVEL_HIGH>, - <0 45 IRQ_TYPE_LEVEL_HIGH>, - <0 46 IRQ_TYPE_LEVEL_HIGH>, - <0 47 IRQ_TYPE_LEVEL_HIGH>, - <0 48 IRQ_TYPE_LEVEL_HIGH>, - <0 49 IRQ_TYPE_LEVEL_HIGH>, - <0 50 IRQ_TYPE_LEVEL_HIGH>, - <0 51 IRQ_TYPE_LEVEL_HIGH>, - <0 52 IRQ_TYPE_LEVEL_HIGH>, - <0 53 IRQ_TYPE_LEVEL_HIGH>, - <0 54 IRQ_TYPE_LEVEL_HIGH>, - <0 55 IRQ_TYPE_LEVEL_HIGH>, - <0 56 IRQ_TYPE_LEVEL_HIGH>, - <0 57 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; clocks = <&mstp4_clks R8A73A4_CLK_IRQC>; power-domains = <&pd_c4>; }; @@ -237,7 +237,7 @@ thermal@e61f0000 { compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal"; reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks R8A73A4_CLK_THERMAL>; power-domains = <&pd_c5>; }; @@ -247,7 +247,7 @@ i2c0: i2c@e6500000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6500000 0 0x428>; - interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_IIC0>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -258,7 +258,7 @@ i2c1: i2c@e6510000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6510000 0 0x428>; - interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_IIC1>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -269,7 +269,7 @@ i2c2: i2c@e6520000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6520000 0 0x428>; - interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_IIC2>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -280,7 +280,7 @@ i2c3: i2c@e6530000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6530000 0 0x428>; - interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp4_clks R8A73A4_CLK_IIC3>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -291,7 +291,7 @@ i2c4: i2c@e6540000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6540000 0 0x428>; - interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp4_clks R8A73A4_CLK_IIC4>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -302,7 +302,7 @@ i2c6: i2c@e6550000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6550000 0 0x428>; - interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_IIC6>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -313,7 +313,7 @@ i2c7: i2c@e6560000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6560000 0 0x428>; - interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_IIC7>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -324,7 +324,7 @@ i2c8: i2c@e6570000 { #size-cells = <0>; compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6570000 0 0x428>; - interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks R8A73A4_CLK_IIC8>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -333,7 +333,7 @@ i2c8: i2c@e6570000 { scifb0: serial@e6c20000 { compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; reg = <0 0xe6c20000 0 0x100>; - interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFB0>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -343,7 +343,7 @@ scifb0: serial@e6c20000 { scifb1: serial@e6c30000 { compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; reg = <0 0xe6c30000 0 0x100>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFB1>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -353,7 +353,7 @@ scifb1: serial@e6c30000 { scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; reg = <0 0xe6c40000 0 0x100>; - interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFA0>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -363,7 +363,7 @@ scifa0: serial@e6c40000 { scifa1: serial@e6c50000 { compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; reg = <0 0xe6c50000 0 0x100>; - interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFA1>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -373,7 +373,7 @@ scifa1: serial@e6c50000 { scifb2: serial@e6ce0000 { compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; reg = <0 0xe6ce0000 0 0x100>; - interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFB2>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -383,7 +383,7 @@ scifb2: serial@e6ce0000 { scifb3: serial@e6cf0000 { compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; reg = <0 0xe6cf0000 0 0x100>; - interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFB3>; clock-names = "sci_ick"; power-domains = <&pd_c4>; @@ -393,7 +393,7 @@ scifb3: serial@e6cf0000 { sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee100000 0 0x100>; - interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_SDHI0>; power-domains = <&pd_a3sp>; cap-sd-highspeed; @@ -403,7 +403,7 @@ sdhi0: sd@ee100000 { sdhi1: sd@ee120000 { compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee120000 0 0x100>; - interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_SDHI1>; power-domains = <&pd_a3sp>; cap-sd-highspeed; @@ -413,7 +413,7 @@ sdhi1: sd@ee120000 { sdhi2: sd@ee140000 { compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee140000 0 0x100>; - interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_SDHI2>; power-domains = <&pd_a3sp>; cap-sd-highspeed; @@ -423,7 +423,7 @@ sdhi2: sd@ee140000 { mmcif0: mmc@ee200000 { compatible = "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; - interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_MMCIF0>; power-domains = <&pd_a3sp>; reg-io-width = <4>; @@ -433,7 +433,7 @@ mmcif0: mmc@ee200000 { mmcif1: mmc@ee220000 { compatible = "renesas,sh-mmcif"; reg = <0 0xee220000 0 0x80>; - interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A73A4_CLK_MMCIF1>; power-domains = <&pd_a3sp>; reg-io-width = <4>; @@ -449,7 +449,7 @@ gic: interrupt-controller@f1001000 { <0 0xf1002000 0 0x1000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = ; }; bsc: bus@fec10000 { From e1e7b6fa83f0d8372392662ebdffdd79c71ba6a3 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 25 Jan 2016 09:52:58 +0900 Subject: [PATCH 21/68] ARM: dts: r8a7740: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r8a7740 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740.dtsi | 143 +++++++++++++++++---------------- 1 file changed, 72 insertions(+), 71 deletions(-) diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 6ef954766eef..36bcb39cca03 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -11,6 +11,7 @@ /include/ "skeleton.dtsi" #include +#include #include / { @@ -41,7 +42,7 @@ gic: interrupt-controller@c2800000 { L2: cache-controller { compatible = "arm,pl310-cache"; reg = <0xf0100000 0x1000>; - interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; power-domains = <&pd_a3sm>; arm,data-latency = <3 3 3>; arm,tag-latency = <2 2 2>; @@ -58,7 +59,7 @@ dbsc3: memory-controller@fe400000 { pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; ptm { @@ -69,7 +70,7 @@ ptm { cmt1: timer@e6138000 { compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48"; reg = <0xe6138000 0x170>; - interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7740_CLK_CMT1>; clock-names = "fck"; power-domains = <&pd_c5>; @@ -89,14 +90,14 @@ irqpin0: interrupt-controller@e6900000 { <0xe6900020 1>, <0xe6900040 1>, <0xe6900060 1>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_INTCA>; power-domains = <&pd_a4s>; }; @@ -111,14 +112,14 @@ irqpin1: interrupt-controller@e6900004 { <0xe6900024 1>, <0xe6900044 1>, <0xe6900064 1>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_INTCA>; power-domains = <&pd_a4s>; }; @@ -133,14 +134,14 @@ irqpin2: interrupt-controller@e6900008 { <0xe6900028 1>, <0xe6900048 1>, <0xe6900068 1>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_INTCA>; power-domains = <&pd_a4s>; }; @@ -155,14 +156,14 @@ irqpin3: interrupt-controller@e690000c { <0xe690002c 1>, <0xe690004c 1>, <0xe690006c 1>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_INTCA>; power-domains = <&pd_a4s>; }; @@ -171,7 +172,7 @@ ether: ethernet@e9a00000 { compatible = "renesas,gether-r8a7740"; reg = <0xe9a00000 0x800>, <0xe9a01800 0x800>; - interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7740_CLK_GETHER>; power-domains = <&pd_a4s>; phy-mode = "mii"; @@ -185,10 +186,10 @@ i2c0: i2c@fff20000 { #size-cells = <0>; compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic"; reg = <0xfff20000 0x425>; - interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH - 0 202 IRQ_TYPE_LEVEL_HIGH - 0 203 IRQ_TYPE_LEVEL_HIGH - 0 204 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks R8A7740_CLK_IIC0>; power-domains = <&pd_a4r>; status = "disabled"; @@ -199,10 +200,10 @@ i2c1: i2c@e6c20000 { #size-cells = <0>; compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic"; reg = <0xe6c20000 0x425>; - interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH - 0 71 IRQ_TYPE_LEVEL_HIGH - 0 72 IRQ_TYPE_LEVEL_HIGH - 0 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7740_CLK_IIC1>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -211,7 +212,7 @@ i2c1: i2c@e6c20000 { scifa0: serial@e6c40000 { compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c40000 0x100>; - interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -221,7 +222,7 @@ scifa0: serial@e6c40000 { scifa1: serial@e6c50000 { compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c50000 0x100>; - interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -231,7 +232,7 @@ scifa1: serial@e6c50000 { scifa2: serial@e6c60000 { compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c60000 0x100>; - interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA2>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -241,7 +242,7 @@ scifa2: serial@e6c60000 { scifa3: serial@e6c70000 { compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c70000 0x100>; - interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -251,7 +252,7 @@ scifa3: serial@e6c70000 { scifa4: serial@e6c80000 { compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6c80000 0x100>; - interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -261,7 +262,7 @@ scifa4: serial@e6c80000 { scifa5: serial@e6cb0000 { compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6cb0000 0x100>; - interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -271,7 +272,7 @@ scifa5: serial@e6cb0000 { scifa6: serial@e6cc0000 { compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6cc0000 0x100>; - interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -281,7 +282,7 @@ scifa6: serial@e6cc0000 { scifa7: serial@e6cd0000 { compatible = "renesas,scifa-r8a7740", "renesas,scifa"; reg = <0xe6cd0000 0x100>; - interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -291,7 +292,7 @@ scifa7: serial@e6cd0000 { scifb: serial@e6c30000 { compatible = "renesas,scifb-r8a7740", "renesas,scifb"; reg = <0xe6c30000 0x100>; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -329,8 +330,8 @@ tpu: pwm@e6600000 { mmcif0: mmc@e6bd0000 { compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif"; reg = <0xe6bd0000 0x100>; - interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH - 0 57 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7740_CLK_MMC>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -339,9 +340,9 @@ mmcif0: mmc@e6bd0000 { sdhi0: sd@e6850000 { compatible = "renesas,sdhi-r8a7740"; reg = <0xe6850000 0x100>; - interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH - 0 118 IRQ_TYPE_LEVEL_HIGH - 0 119 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7740_CLK_SDHI0>; power-domains = <&pd_a3sp>; cap-sd-highspeed; @@ -352,9 +353,9 @@ sdhi0: sd@e6850000 { sdhi1: sd@e6860000 { compatible = "renesas,sdhi-r8a7740"; reg = <0xe6860000 0x100>; - interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH - 0 122 IRQ_TYPE_LEVEL_HIGH - 0 123 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks R8A7740_CLK_SDHI1>; power-domains = <&pd_a3sp>; cap-sd-highspeed; @@ -365,9 +366,9 @@ sdhi1: sd@e6860000 { sdhi2: sd@e6870000 { compatible = "renesas,sdhi-r8a7740"; reg = <0xe6870000 0x100>; - interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH - 0 126 IRQ_TYPE_LEVEL_HIGH - 0 127 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp4_clks R8A7740_CLK_SDHI2>; power-domains = <&pd_a3sp>; cap-sd-highspeed; @@ -379,7 +380,7 @@ sh_fsi2: sound@fe1f0000 { #sound-dai-cells = <1>; compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2"; reg = <0xfe1f0000 0x400>; - interrupts = <0 9 0x4>; + interrupts = ; clocks = <&mstp3_clks R8A7740_CLK_FSI>; power-domains = <&pd_a4mp>; status = "disabled"; @@ -388,9 +389,9 @@ sh_fsi2: sound@fe1f0000 { tmu0: timer@fff80000 { compatible = "renesas,tmu-r8a7740", "renesas,tmu"; reg = <0xfff80000 0x2c>; - interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, - <0 199 IRQ_TYPE_LEVEL_HIGH>, - <0 200 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp1_clks R8A7740_CLK_TMU0>; clock-names = "fck"; power-domains = <&pd_a4r>; @@ -403,9 +404,9 @@ tmu0: timer@fff80000 { tmu1: timer@fff90000 { compatible = "renesas,tmu-r8a7740", "renesas,tmu"; reg = <0xfff90000 0x2c>; - interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>, - <0 171 IRQ_TYPE_LEVEL_HIGH>, - <0 172 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; clocks = <&mstp1_clks R8A7740_CLK_TMU1>; clock-names = "fck"; power-domains = <&pd_a4r>; From 072d326542e491874c31adda10bf513b371e560c Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 2 Dec 2015 17:15:26 +0900 Subject: [PATCH 22/68] ARM: dts: r8a7793: add MSTP10 clocks to device tree Instantiate MSTP10 clocks in r8a7793 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 36 +++++++++++++++++++++++ include/dt-bindings/clock/r8a7793-clock.h | 2 ++ 2 files changed, 38 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index ea1196b99d52..c4459f147330 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -963,6 +963,42 @@ R8A7793_CLK_I2C1 R8A7793_CLK_I2C0 "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; }; + mstp10_clks: mstp10_clks@e6150998 { + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; + clocks = <&p_clk>, + <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, + <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, + <&p_clk>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>, + <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>; + + #clock-cells = <1>; + clock-indices = < + R8A7793_CLK_SSI_ALL + R8A7793_CLK_SSI9 R8A7793_CLK_SSI8 R8A7793_CLK_SSI7 R8A7793_CLK_SSI6 R8A7793_CLK_SSI5 + R8A7793_CLK_SSI4 R8A7793_CLK_SSI3 R8A7793_CLK_SSI2 R8A7793_CLK_SSI1 R8A7793_CLK_SSI0 + R8A7793_CLK_SCU_ALL + R8A7793_CLK_SCU_DVC1 R8A7793_CLK_SCU_DVC0 + R8A7793_CLK_SCU_CTU1_MIX1 R8A7793_CLK_SCU_CTU0_MIX0 + R8A7793_CLK_SCU_SRC9 R8A7793_CLK_SCU_SRC8 R8A7793_CLK_SCU_SRC7 R8A7793_CLK_SCU_SRC6 R8A7793_CLK_SCU_SRC5 + R8A7793_CLK_SCU_SRC4 R8A7793_CLK_SCU_SRC3 R8A7793_CLK_SCU_SRC2 R8A7793_CLK_SCU_SRC1 R8A7793_CLK_SCU_SRC0 + >; + clock-output-names = + "ssi-all", + "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", + "ssi4", "ssi3", "ssi2", "ssi1", "ssi0", + "scu-all", + "scu-dvc1", "scu-dvc0", + "scu-ctu1-mix1", "scu-ctu0-mix0", + "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", + "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; + }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; diff --git a/include/dt-bindings/clock/r8a7793-clock.h b/include/dt-bindings/clock/r8a7793-clock.h index 1579e07f96a3..efcbc594fe82 100644 --- a/include/dt-bindings/clock/r8a7793-clock.h +++ b/include/dt-bindings/clock/r8a7793-clock.h @@ -145,6 +145,8 @@ #define R8A7793_CLK_SCU_ALL 17 #define R8A7793_CLK_SCU_DVC1 18 #define R8A7793_CLK_SCU_DVC0 19 +#define R8A7793_CLK_SCU_CTU1_MIX1 20 +#define R8A7793_CLK_SCU_CTU0_MIX0 21 #define R8A7793_CLK_SCU_SRC9 22 #define R8A7793_CLK_SCU_SRC8 23 #define R8A7793_CLK_SCU_SRC7 24 From ad6472bf11464d498fefcea9ae30ddf9255e4f49 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 2 Dec 2015 17:16:12 +0900 Subject: [PATCH 23/68] ARM: dts: r8a7793: add audio clock to device tree Instantiate audio clock in r8a7793 device tree. audio_clk_a/b/c are required for R-Car sound. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index c4459f147330..530fa9488a4a 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -706,6 +706,29 @@ extal_clk: extal_clk { clock-output-names = "extal"; }; + /* + * The external audio clocks are configured as 0 Hz fixed frequency clocks by + * default. Boards that provide audio clocks should override them. + */ + audio_clk_a: audio_clk_a { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "audio_clk_a"; + }; + audio_clk_b: audio_clk_b { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "audio_clk_b"; + }; + audio_clk_c: audio_clk_c { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "audio_clk_c"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7793-cpg-clocks", From 892f09f1528d113f8d1e5983ecebd322236ded95 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 30 Nov 2015 16:11:37 +0900 Subject: [PATCH 24/68] ARM: dts: r8a7793: add m2 clock to device tree Declare m2 clock in r8a7793 device tree. Based on similar work for the r8a7791 by Laurent Pinchart. Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 530fa9488a4a..6aabba6ef92c 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -817,6 +817,14 @@ p_clk: p_clk { clock-mult = <1>; clock-output-names = "p"; }; + m2_clk: m2_clk { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7793_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + clock-output-names = "m2"; + }; rclk_clk: rclk_clk { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7793_CLK_PLL1>; From 951431e08636858bafabb7654c3aae0eac18d950 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 30 Nov 2015 15:51:12 +0900 Subject: [PATCH 25/68] ARM: dts: r8a7793: add R-Car sound support to device tree Instantiate R-Car sound node in r8a7793 device tree. This only supports PIO transfers. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 83 ++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 6aabba6ef92c..8b1ec47754ac 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -1101,4 +1101,87 @@ ipmmu_gp: mmu@e62a0000 { #iommu-cells = <1>; status = "disabled"; }; + + rcar_sound: sound@ec500000 { + /* + * #sound-dai-cells is required + * + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; + */ + compatible = "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2"; + reg = <0 0xec500000 0 0x1000>, /* SCU */ + <0 0xec5a0000 0 0x100>, /* ADG */ + <0 0xec540000 0 0x1000>, /* SSIU */ + <0 0xec541000 0 0x280>; /* SSI */ + reg-names = "scu", "adg", "ssiu", "ssi"; + + clocks = <&mstp10_clks R8A7793_CLK_SSI_ALL>, + <&mstp10_clks R8A7793_CLK_SSI9>, <&mstp10_clks R8A7793_CLK_SSI8>, + <&mstp10_clks R8A7793_CLK_SSI7>, <&mstp10_clks R8A7793_CLK_SSI6>, + <&mstp10_clks R8A7793_CLK_SSI5>, <&mstp10_clks R8A7793_CLK_SSI4>, + <&mstp10_clks R8A7793_CLK_SSI3>, <&mstp10_clks R8A7793_CLK_SSI2>, + <&mstp10_clks R8A7793_CLK_SSI1>, <&mstp10_clks R8A7793_CLK_SSI0>, + <&mstp10_clks R8A7793_CLK_SCU_SRC9>, <&mstp10_clks R8A7793_CLK_SCU_SRC8>, + <&mstp10_clks R8A7793_CLK_SCU_SRC7>, <&mstp10_clks R8A7793_CLK_SCU_SRC6>, + <&mstp10_clks R8A7793_CLK_SCU_SRC5>, <&mstp10_clks R8A7793_CLK_SCU_SRC4>, + <&mstp10_clks R8A7793_CLK_SCU_SRC3>, <&mstp10_clks R8A7793_CLK_SCU_SRC2>, + <&mstp10_clks R8A7793_CLK_SCU_SRC1>, <&mstp10_clks R8A7793_CLK_SCU_SRC0>, + <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; + clock-names = "ssi-all", + "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", + "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", + "src.9", "src.8", "src.7", "src.6", "src.5", + "src.4", "src.3", "src.2", "src.1", "src.0", + "clk_a", "clk_b", "clk_c", "clk_i"; + power-domains = <&cpg_clocks>; + + status = "disabled"; + + rcar_sound,src { + src0: src@0 { }; + src1: src@1 { }; + src2: src@2 { }; + src3: src@3 { }; + src4: src@4 { }; + src5: src@5 { }; + src6: src@6 { }; + src7: src@7 { }; + src8: src@8 { }; + src9: src@9 { }; + }; + + rcar_sound,ssi { + ssi0: ssi@0 { + interrupts = ; + }; + ssi1: ssi@1 { + interrupts = ; + }; + ssi2: ssi@2 { + interrupts = ; + }; + ssi3: ssi@3 { + interrupts = ; + }; + ssi4: ssi@4 { + interrupts = ; + }; + ssi5: ssi@5 { + interrupts = ; + }; + ssi6: ssi@6 { + interrupts = ; + }; + ssi7: ssi@7 { + interrupts = ; + }; + ssi8: ssi@8 { + interrupts = ; + }; + ssi9: ssi@9 { + interrupts = ; + }; + }; + }; }; From 4dfc6f8bbf821850c7a4e7f1364a42b63375ad4e Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 2 Dec 2015 15:11:29 +0900 Subject: [PATCH 26/68] ARM: dts: r8a7793: add DVC support to device tree Add DVC support to sound node in r8a7793 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 8b1ec47754ac..3531d30fe107 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -1127,17 +1127,23 @@ rcar_sound: sound@ec500000 { <&mstp10_clks R8A7793_CLK_SCU_SRC5>, <&mstp10_clks R8A7793_CLK_SCU_SRC4>, <&mstp10_clks R8A7793_CLK_SCU_SRC3>, <&mstp10_clks R8A7793_CLK_SCU_SRC2>, <&mstp10_clks R8A7793_CLK_SCU_SRC1>, <&mstp10_clks R8A7793_CLK_SCU_SRC0>, + <&mstp10_clks R8A7793_CLK_SCU_DVC0>, <&mstp10_clks R8A7793_CLK_SCU_DVC1>, <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; clock-names = "ssi-all", "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", "src.9", "src.8", "src.7", "src.6", "src.5", "src.4", "src.3", "src.2", "src.1", "src.0", + "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; power-domains = <&cpg_clocks>; status = "disabled"; + rcar_sound,dvc { + dvc0: dvc@0 { }; + dvc1: dvc@1 { }; + }; rcar_sound,src { src0: src@0 { }; src1: src@1 { }; From 8d2883bddf47e3d59a4f041c6bd338f0d18783fe Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 30 Nov 2015 15:34:38 +0900 Subject: [PATCH 27/68] ARM: dts: r8a7793: add audio DMAC clocks to device tree Instantiate Audio DMA clocks in the r8a7791 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 3531d30fe107..cb6251e71ef9 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -924,10 +924,11 @@ mstp4_clks: mstp4_clks@e6150140 { mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&extal_clk>; + clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>; #clock-cells = <1>; - clock-indices = ; - clock-output-names = "thermal"; + clock-indices = ; + clock-output-names = "audmac0", "audmac1", "thermal"; }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7793-mstp-clocks", From 6708eb73183e226ddd73dae128239e76b3807390 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 30 Nov 2015 15:34:38 +0900 Subject: [PATCH 28/68] ARM: dts: r8a7793: add audio DMAC to device tree Instantiate the two Audio DMA controllers in the r8a7791 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 58 ++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index cb6251e71ef9..2c9ab9f18b41 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -301,6 +301,64 @@ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH dma-channels = <15>; }; + audma0: dma-controller@ec700000 { + compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; + reg = <0 0xec700000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC0>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <13>; + }; + + audma1: dma-controller@ec720000 { + compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; + reg = <0 0xec720000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC1>; + clock-names = "fck"; + power-domains = <&cpg_clocks>; + #dma-cells = <1>; + dma-channels = <13>; + }; + /* The memory map in the User's Manual maps the cores to bus numbers */ i2c0: i2c@e6508000 { #address-cells = <1>; From 3cf7452a5ae2a90448121feb29810bf437d72f02 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 5 Jan 2016 09:24:42 +1100 Subject: [PATCH 29/68] ARM: dts: r8a7793: enable Audio DMAC peri peri via sound driver Audio DMAC peri peri is no longer DMAEngine. it is supported by sound driver. this patch enable it. Base on work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 2c9ab9f18b41..ddbda9d2c177 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -1172,8 +1172,9 @@ rcar_sound: sound@ec500000 { reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>; /* SSI */ - reg-names = "scu", "adg", "ssiu", "ssi"; + <0 0xec541000 0 0x280>, /* SSI */ + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; clocks = <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI9>, <&mstp10_clks R8A7793_CLK_SSI8>, From f8905ce841deb22b43c6cc1f2ef47638e61bbec6 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 2 Dec 2015 16:45:35 +0900 Subject: [PATCH 30/68] ARM: dts: gose: Enable sound PIO support in device tree Enable sound PIO support in the r8a7793/gose device tree. Based on similar work for the r8a7791/koelsch by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 77 ++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 0b4cc8d99390..395ea63746ac 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -8,6 +8,17 @@ * kind, whether express or implied. */ +/* + * SSI-AK4643 + * + * SW1: 1: AK4643 + * 2: CN22 + * 3: ADV7511 + * + * This command is required when Playback/Capture + * + * amixer set "LINEOUT Mixer DACL" on + */ /dts-v1/; #include "r8a7793.dtsi" #include @@ -130,6 +141,30 @@ led8 { }; }; + audio_clock: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <11289600>; + clock-output-names = "audio_clock"; + }; + + rsnd_ak4643: sound { + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&sndcodec>; + simple-audio-card,frame-master = <&sndcodec>; + + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec { + sound-dai = <&ak4643>; + clocks = <&audio_clock>; + }; + }; + hdmi-out { compatible = "hdmi-connector"; type = "a"; @@ -218,6 +253,16 @@ qspi_pins: spi0 { renesas,groups = "qspi_ctrl", "qspi_data4"; renesas,function = "qspi"; }; + + sound_pins: sound { + renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; + renesas,function = "ssi"; + }; + + sound_clk_pins: sound_clk { + renesas,groups = "audio_clk_a"; + renesas,function = "audio_clk"; + }; }; ðer { @@ -300,6 +345,12 @@ &i2c2 { status = "okay"; clock-frequency = <100000>; + ak4643: codec@12 { + compatible = "asahi-kasei,ak4643"; + #sound-dai-cells = <0>; + reg = <0x12>; + }; + hdmi@39 { compatible = "adi,adv7511w"; reg = <0x39>; @@ -338,3 +389,29 @@ eeprom@50 { pagesize = <16>; }; }; + +&rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; + + /* Single DAI */ + #sound-dai-cells = <0>; + + status = "okay"; + + rcar_sound,dai { + dai0 { + playback = <&ssi0>; + capture = <&ssi1>; + }; + }; +}; + +&ssi0 { + pio-transfer; +}; + +&ssi1 { + pio-transfer; + shared-pin; +}; From 96c1b8d8507102759c1e232f371ff333811ccdd9 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 2 Dec 2015 16:53:53 +0900 Subject: [PATCH 31/68] ARM: dts: gose: enable sound DMA support in device tree Enable DMA transfer to/from SSI in r8a7793/gose device tree. DMA [MEM] -> [SSI] DMA [MEM] <- [SSI] Based on similar work for the r8a7791/koelsch by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 395ea63746ac..a4b2dcb8e73d 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -408,10 +408,10 @@ dai0 { }; &ssi0 { - pio-transfer; + no-busif; }; &ssi1 { - pio-transfer; + no-busif; shared-pin; }; From 402586d0cce05317100356cfd73f0c044c60ccd7 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 2 Dec 2015 16:55:59 +0900 Subject: [PATCH 32/68] ARM: dts: gose: enable sound DMA support via BUSIF in device tree Enable DMA transfer to/from SSIU in gose/r8a7791 device tree. DMA [MEM] -> [SSIU] -> [SSI] DMA [MEM] <- [SSIU] <- [SSI] Based on similar work for the r8a7791/koelsch by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index a4b2dcb8e73d..81bfe9484bbc 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -407,11 +407,6 @@ dai0 { }; }; -&ssi0 { - no-busif; -}; - &ssi1 { - no-busif; shared-pin; }; From d2cde3b6103678a4f3d2079af744937dfc9c4104 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 2 Dec 2015 16:57:33 +0900 Subject: [PATCH 33/68] ARM: dts: gose: enable sound DMA support via SRC in device tree Enable DMA transfer to/from SRC in r8a7793/gose device tree. DMA DMApp [MEM] -> [SRC] -> [SSIU] -> [SSI] DMA DMApp [MEM] <- [SRC] <- [SSIU] <- [SSI] Current sound driver is supporting SSI/SRC random connection. So, this patch is tring SSI0 -> SRC2 SSI1 <- SRC3 Based on similar work for the r8a7791/koeslch by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 81bfe9484bbc..17c87fe0944f 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -401,8 +401,8 @@ &rcar_sound { rcar_sound,dai { dai0 { - playback = <&ssi0>; - capture = <&ssi1>; + playback = <&ssi0 &src2>; + capture = <&ssi1 &src3>; }; }; }; From ae79f66db7e75dfe696df7f392f4db4980117306 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 2 Dec 2015 16:59:44 +0900 Subject: [PATCH 34/68] ARM: dts: gose: enable sound DMA support via DVC in device tree Enable DMA transfer using DVC in r8a7793/gose device tree. DMA DMApp [MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI] DMA DMApp [MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI] Based on similar work for the r8a7791/koelsch by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 17c87fe0944f..2fa052036dbc 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -18,7 +18,24 @@ * This command is required when Playback/Capture * * amixer set "LINEOUT Mixer DACL" on + * amixer set "DVC Out" 100% + * amixer set "DVC In" 100% + * + * You can use Mute + * + * amixer set "DVC Out Mute" on + * amixer set "DVC In Mute" on + * + * You can use Volume Ramp + * + * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" + * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" + * amixer set "DVC Out Ramp" on + * aplay xxx.wav & + * amixer set "DVC Out" 80% // Volume Down + * amixer set "DVC Out" 100% // Volume Up */ + /dts-v1/; #include "r8a7793.dtsi" #include @@ -401,8 +418,8 @@ &rcar_sound { rcar_sound,dai { dai0 { - playback = <&ssi0 &src2>; - capture = <&ssi1 &src3>; + playback = <&ssi0 &src2 &dvc0>; + capture = <&ssi1 &src3 &dvc1>; }; }; }; From f418cbb69a2f5a481bd5f210bb5c8c5cc9322224 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 18 Jan 2016 13:41:57 +0900 Subject: [PATCH 35/68] ARM: dts: r8a7793: enable audio DMAC in device tree Enable audio DMAC (= rcar-dmac) in r8a7793 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- v4 * Use GIC_SPI in interrupts properties --- arch/arm/boot/dts/r8a7793.dtsi | 91 +++++++++++++++++++++++++++++----- 1 file changed, 79 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index ddbda9d2c177..6817f14314e2 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -1201,52 +1201,119 @@ rcar_sound: sound@ec500000 { status = "disabled"; rcar_sound,dvc { - dvc0: dvc@0 { }; - dvc1: dvc@1 { }; + dvc0: dvc@0 { + dmas = <&audma0 0xbc>; + dma-names = "tx"; + }; + dvc1: dvc@1 { + dmas = <&audma0 0xbe>; + dma-names = "tx"; + }; }; + rcar_sound,src { - src0: src@0 { }; - src1: src@1 { }; - src2: src@2 { }; - src3: src@3 { }; - src4: src@4 { }; - src5: src@5 { }; - src6: src@6 { }; - src7: src@7 { }; - src8: src@8 { }; - src9: src@9 { }; + src0: src@0 { + interrupts = ; + dmas = <&audma0 0x85>, <&audma1 0x9a>; + dma-names = "rx", "tx"; + }; + src1: src@1 { + interrupts = ; + dmas = <&audma0 0x87>, <&audma1 0x9c>; + dma-names = "rx", "tx"; + }; + src2: src@2 { + interrupts = ; + dmas = <&audma0 0x89>, <&audma1 0x9e>; + dma-names = "rx", "tx"; + }; + src3: src@3 { + interrupts = ; + dmas = <&audma0 0x8b>, <&audma1 0xa0>; + dma-names = "rx", "tx"; + }; + src4: src@4 { + interrupts = ; + dmas = <&audma0 0x8d>, <&audma1 0xb0>; + dma-names = "rx", "tx"; + }; + src5: src@5 { + interrupts = ; + dmas = <&audma0 0x8f>, <&audma1 0xb2>; + dma-names = "rx", "tx"; + }; + src6: src@6 { + interrupts = ; + dmas = <&audma0 0x91>, <&audma1 0xb4>; + dma-names = "rx", "tx"; + }; + src7: src@7 { + interrupts = ; + dmas = <&audma0 0x93>, <&audma1 0xb6>; + dma-names = "rx", "tx"; + }; + src8: src@8 { + interrupts = ; + dmas = <&audma0 0x95>, <&audma1 0xb8>; + dma-names = "rx", "tx"; + }; + src9: src@9 { + interrupts = ; + dmas = <&audma0 0x97>, <&audma1 0xba>; + dma-names = "rx", "tx"; + }; }; rcar_sound,ssi { ssi0: ssi@0 { interrupts = ; + dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi1: ssi@1 { interrupts = ; + dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi2: ssi@2 { interrupts = ; + dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi3: ssi@3 { interrupts = ; + dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi4: ssi@4 { interrupts = ; + dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi5: ssi@5 { interrupts = ; + dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi6: ssi@6 { interrupts = ; + dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi7: ssi@7 { interrupts = ; + dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi8: ssi@8 { interrupts = ; + dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; + dma-names = "rx", "tx", "rxu", "txu"; }; ssi9: ssi@9 { interrupts = ; + dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; + dma-names = "rx", "tx", "rxu", "txu"; }; }; }; From 16af4e9705b1dee1a5b2e5d82632b584399fdf6d Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 28 Jan 2016 10:29:35 +0900 Subject: [PATCH 36/68] ARM: dts: r7s72100: use GIC_* defines Use GIC_* defines for GIC interrupt cells in r7s72100 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r7s72100.dtsi | 161 ++++++++++++++++---------------- 1 file changed, 81 insertions(+), 80 deletions(-) diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index 4657d7fb5bce..a5938c72d5bd 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -10,6 +10,7 @@ */ #include +#include #include / { @@ -152,10 +153,10 @@ cpu@0 { scif0: serial@e8007000 { compatible = "renesas,scif-r7s72100", "renesas,scif"; reg = <0xe8007000 64>; - interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>, - <0 191 IRQ_TYPE_LEVEL_HIGH>, - <0 192 IRQ_TYPE_LEVEL_HIGH>, - <0 189 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R7S72100_CLK_SCIF0>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -165,10 +166,10 @@ scif0: serial@e8007000 { scif1: serial@e8007800 { compatible = "renesas,scif-r7s72100", "renesas,scif"; reg = <0xe8007800 64>; - interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>, - <0 195 IRQ_TYPE_LEVEL_HIGH>, - <0 196 IRQ_TYPE_LEVEL_HIGH>, - <0 193 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R7S72100_CLK_SCIF1>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -178,10 +179,10 @@ scif1: serial@e8007800 { scif2: serial@e8008000 { compatible = "renesas,scif-r7s72100", "renesas,scif"; reg = <0xe8008000 64>; - interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>, - <0 199 IRQ_TYPE_LEVEL_HIGH>, - <0 200 IRQ_TYPE_LEVEL_HIGH>, - <0 197 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R7S72100_CLK_SCIF2>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -191,10 +192,10 @@ scif2: serial@e8008000 { scif3: serial@e8008800 { compatible = "renesas,scif-r7s72100", "renesas,scif"; reg = <0xe8008800 64>; - interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>, - <0 203 IRQ_TYPE_LEVEL_HIGH>, - <0 204 IRQ_TYPE_LEVEL_HIGH>, - <0 201 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R7S72100_CLK_SCIF3>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -204,10 +205,10 @@ scif3: serial@e8008800 { scif4: serial@e8009000 { compatible = "renesas,scif-r7s72100", "renesas,scif"; reg = <0xe8009000 64>; - interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>, - <0 207 IRQ_TYPE_LEVEL_HIGH>, - <0 208 IRQ_TYPE_LEVEL_HIGH>, - <0 205 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R7S72100_CLK_SCIF4>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -217,10 +218,10 @@ scif4: serial@e8009000 { scif5: serial@e8009800 { compatible = "renesas,scif-r7s72100", "renesas,scif"; reg = <0xe8009800 64>; - interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>, - <0 211 IRQ_TYPE_LEVEL_HIGH>, - <0 212 IRQ_TYPE_LEVEL_HIGH>, - <0 209 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R7S72100_CLK_SCIF5>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -230,10 +231,10 @@ scif5: serial@e8009800 { scif6: serial@e800a000 { compatible = "renesas,scif-r7s72100", "renesas,scif"; reg = <0xe800a000 64>; - interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>, - <0 215 IRQ_TYPE_LEVEL_HIGH>, - <0 216 IRQ_TYPE_LEVEL_HIGH>, - <0 213 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R7S72100_CLK_SCIF6>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -243,10 +244,10 @@ scif6: serial@e800a000 { scif7: serial@e800a800 { compatible = "renesas,scif-r7s72100", "renesas,scif"; reg = <0xe800a800 64>; - interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>, - <0 219 IRQ_TYPE_LEVEL_HIGH>, - <0 220 IRQ_TYPE_LEVEL_HIGH>, - <0 217 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + ; clocks = <&mstp4_clks R7S72100_CLK_SCIF7>; clock-names = "sci_ick"; power-domains = <&cpg_clocks>; @@ -256,9 +257,9 @@ scif7: serial@e800a800 { spi0: spi@e800c800 { compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz"; reg = <0xe800c800 0x24>; - interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>, - <0 239 IRQ_TYPE_LEVEL_HIGH>, - <0 240 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI0>; power-domains = <&cpg_clocks>; @@ -271,9 +272,9 @@ spi0: spi@e800c800 { spi1: spi@e800d000 { compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz"; reg = <0xe800d000 0x24>; - interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>, - <0 242 IRQ_TYPE_LEVEL_HIGH>, - <0 243 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI1>; power-domains = <&cpg_clocks>; @@ -286,9 +287,9 @@ spi1: spi@e800d000 { spi2: spi@e800d800 { compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz"; reg = <0xe800d800 0x24>; - interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>, - <0 245 IRQ_TYPE_LEVEL_HIGH>, - <0 246 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI2>; power-domains = <&cpg_clocks>; @@ -301,9 +302,9 @@ spi2: spi@e800d800 { spi3: spi@e800e000 { compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz"; reg = <0xe800e000 0x24>; - interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>, - <0 248 IRQ_TYPE_LEVEL_HIGH>, - <0 249 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI3>; power-domains = <&cpg_clocks>; @@ -316,9 +317,9 @@ spi3: spi@e800e000 { spi4: spi@e800e800 { compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz"; reg = <0xe800e800 0x24>; - interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>, - <0 251 IRQ_TYPE_LEVEL_HIGH>, - <0 252 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + ; interrupt-names = "error", "rx", "tx"; clocks = <&mstp10_clks R7S72100_CLK_SPI4>; power-domains = <&cpg_clocks>; @@ -342,14 +343,14 @@ i2c0: i2c@fcfee000 { #size-cells = <0>; compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; reg = <0xfcfee000 0x44>; - interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>, - <0 158 IRQ_TYPE_EDGE_RISING>, - <0 159 IRQ_TYPE_EDGE_RISING>, - <0 160 IRQ_TYPE_LEVEL_HIGH>, - <0 161 IRQ_TYPE_LEVEL_HIGH>, - <0 162 IRQ_TYPE_LEVEL_HIGH>, - <0 163 IRQ_TYPE_LEVEL_HIGH>, - <0 164 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + ; clocks = <&mstp9_clks R7S72100_CLK_I2C0>; clock-frequency = <100000>; power-domains = <&cpg_clocks>; @@ -361,14 +362,14 @@ i2c1: i2c@fcfee400 { #size-cells = <0>; compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; reg = <0xfcfee400 0x44>; - interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>, - <0 166 IRQ_TYPE_EDGE_RISING>, - <0 167 IRQ_TYPE_EDGE_RISING>, - <0 168 IRQ_TYPE_LEVEL_HIGH>, - <0 169 IRQ_TYPE_LEVEL_HIGH>, - <0 170 IRQ_TYPE_LEVEL_HIGH>, - <0 171 IRQ_TYPE_LEVEL_HIGH>, - <0 172 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + ; clocks = <&mstp9_clks R7S72100_CLK_I2C1>; clock-frequency = <100000>; power-domains = <&cpg_clocks>; @@ -380,14 +381,14 @@ i2c2: i2c@fcfee800 { #size-cells = <0>; compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; reg = <0xfcfee800 0x44>; - interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>, - <0 174 IRQ_TYPE_EDGE_RISING>, - <0 175 IRQ_TYPE_EDGE_RISING>, - <0 176 IRQ_TYPE_LEVEL_HIGH>, - <0 177 IRQ_TYPE_LEVEL_HIGH>, - <0 178 IRQ_TYPE_LEVEL_HIGH>, - <0 179 IRQ_TYPE_LEVEL_HIGH>, - <0 180 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + ; clocks = <&mstp9_clks R7S72100_CLK_I2C2>; clock-frequency = <100000>; power-domains = <&cpg_clocks>; @@ -399,14 +400,14 @@ i2c3: i2c@fcfeec00 { #size-cells = <0>; compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; reg = <0xfcfeec00 0x44>; - interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>, - <0 182 IRQ_TYPE_EDGE_RISING>, - <0 183 IRQ_TYPE_EDGE_RISING>, - <0 184 IRQ_TYPE_LEVEL_HIGH>, - <0 185 IRQ_TYPE_LEVEL_HIGH>, - <0 186 IRQ_TYPE_LEVEL_HIGH>, - <0 187 IRQ_TYPE_LEVEL_HIGH>, - <0 188 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + , + , + , + , + , + , + ; clocks = <&mstp9_clks R7S72100_CLK_I2C3>; clock-frequency = <100000>; power-domains = <&cpg_clocks>; @@ -416,7 +417,7 @@ i2c3: i2c@fcfeec00 { mtu2: timer@fcff0000 { compatible = "renesas,mtu2-r7s72100", "renesas,mtu2"; reg = <0xfcff0000 0x400>; - interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; interrupt-names = "tgi0a"; clocks = <&mstp3_clks R7S72100_CLK_MTU2>; clock-names = "fck"; From 10bbad96d4bc135d0bb0ea64e996a8870d42d989 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 28 Jan 2016 10:29:44 +0900 Subject: [PATCH 37/68] ARM: dts: sh73a0: use GIC_* defines Use GIC_* defines for GIC interrupt cells in sh73a0 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/sh73a0.dtsi | 168 +++++++++++++++++----------------- 1 file changed, 84 insertions(+), 84 deletions(-) diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 3a6056f9f0d2..453280c41d27 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -58,7 +58,7 @@ gic: interrupt-controller@f0001000 { L2: cache-controller { compatible = "arm,pl310-cache"; reg = <0xf0100000 0x1000>; - interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; power-domains = <&pd_a3sm>; arm,data-latency = <3 3 3>; arm,tag-latency = <2 2 2>; @@ -70,8 +70,8 @@ L2: cache-controller { sbsc2: memory-controller@fb400000 { compatible = "renesas,sbsc-sh73a0"; reg = <0xfb400000 0x400>; - interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>, - <0 38 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; interrupt-names = "sec", "temp"; power-domains = <&pd_a4bc1>; }; @@ -79,22 +79,22 @@ sbsc2: memory-controller@fb400000 { sbsc1: memory-controller@fe400000 { compatible = "renesas,sbsc-sh73a0"; reg = <0xfe400000 0x400>; - interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>, - <0 36 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; interrupt-names = "sec", "temp"; power-domains = <&pd_a4bc0>; }; pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>, - <0 56 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; }; cmt1: timer@e6138000 { compatible = "renesas,cmt-48-sh73a0", "renesas,cmt-48"; reg = <0xe6138000 0x200>; - interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks SH73A0_CLK_CMT1>; clock-names = "fck"; power-domains = <&pd_c5>; @@ -113,14 +113,14 @@ irqpin0: interrupt-controller@e6900000 { <0xe6900020 1>, <0xe6900040 1>, <0xe6900060 1>; - interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH - 0 2 IRQ_TYPE_LEVEL_HIGH - 0 3 IRQ_TYPE_LEVEL_HIGH - 0 4 IRQ_TYPE_LEVEL_HIGH - 0 5 IRQ_TYPE_LEVEL_HIGH - 0 6 IRQ_TYPE_LEVEL_HIGH - 0 7 IRQ_TYPE_LEVEL_HIGH - 0 8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; power-domains = <&pd_a4s>; control-parent; @@ -135,14 +135,14 @@ irqpin1: interrupt-controller@e6900004 { <0xe6900024 1>, <0xe6900044 1>, <0xe6900064 1>; - interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH - 0 10 IRQ_TYPE_LEVEL_HIGH - 0 11 IRQ_TYPE_LEVEL_HIGH - 0 12 IRQ_TYPE_LEVEL_HIGH - 0 13 IRQ_TYPE_LEVEL_HIGH - 0 14 IRQ_TYPE_LEVEL_HIGH - 0 15 IRQ_TYPE_LEVEL_HIGH - 0 16 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; power-domains = <&pd_a4s>; control-parent; @@ -157,14 +157,14 @@ irqpin2: interrupt-controller@e6900008 { <0xe6900028 1>, <0xe6900048 1>, <0xe6900068 1>; - interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH - 0 18 IRQ_TYPE_LEVEL_HIGH - 0 19 IRQ_TYPE_LEVEL_HIGH - 0 20 IRQ_TYPE_LEVEL_HIGH - 0 21 IRQ_TYPE_LEVEL_HIGH - 0 22 IRQ_TYPE_LEVEL_HIGH - 0 23 IRQ_TYPE_LEVEL_HIGH - 0 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; power-domains = <&pd_a4s>; control-parent; @@ -179,14 +179,14 @@ irqpin3: interrupt-controller@e690000c { <0xe690002c 1>, <0xe690004c 1>, <0xe690006c 1>; - interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH - 0 26 IRQ_TYPE_LEVEL_HIGH - 0 27 IRQ_TYPE_LEVEL_HIGH - 0 28 IRQ_TYPE_LEVEL_HIGH - 0 29 IRQ_TYPE_LEVEL_HIGH - 0 30 IRQ_TYPE_LEVEL_HIGH - 0 31 IRQ_TYPE_LEVEL_HIGH - 0 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; power-domains = <&pd_a4s>; control-parent; @@ -197,10 +197,10 @@ i2c0: i2c@e6820000 { #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6820000 0x425>; - interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH - 0 168 IRQ_TYPE_LEVEL_HIGH - 0 169 IRQ_TYPE_LEVEL_HIGH - 0 170 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp1_clks SH73A0_CLK_IIC0>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -211,10 +211,10 @@ i2c1: i2c@e6822000 { #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6822000 0x425>; - interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH - 0 52 IRQ_TYPE_LEVEL_HIGH - 0 53 IRQ_TYPE_LEVEL_HIGH - 0 54 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks SH73A0_CLK_IIC1>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -225,10 +225,10 @@ i2c2: i2c@e6824000 { #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6824000 0x425>; - interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH - 0 172 IRQ_TYPE_LEVEL_HIGH - 0 173 IRQ_TYPE_LEVEL_HIGH - 0 174 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks SH73A0_CLK_IIC2>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -239,10 +239,10 @@ i2c3: i2c@e6826000 { #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6826000 0x425>; - interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH - 0 184 IRQ_TYPE_LEVEL_HIGH - 0 185 IRQ_TYPE_LEVEL_HIGH - 0 186 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp4_clks SH73A0_CLK_IIC3>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -253,10 +253,10 @@ i2c4: i2c@e6828000 { #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6828000 0x425>; - interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH - 0 188 IRQ_TYPE_LEVEL_HIGH - 0 189 IRQ_TYPE_LEVEL_HIGH - 0 190 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp4_clks SH73A0_CLK_IIC4>; power-domains = <&pd_c5>; status = "disabled"; @@ -265,8 +265,8 @@ i2c4: i2c@e6828000 { mmcif: mmc@e6bd0000 { compatible = "renesas,sh-mmcif"; reg = <0xe6bd0000 0x100>; - interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH - 0 141 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks SH73A0_CLK_MMCIF0>; power-domains = <&pd_a3sp>; reg-io-width = <4>; @@ -276,7 +276,7 @@ mmcif: mmc@e6bd0000 { msiof0: spi@e6e20000 { compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof"; reg = <0xe6e20000 0x0064>; - interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp0_clks SH73A0_CLK_MSIOF0>; power-domains = <&pd_a3sp>; #address-cells = <1>; @@ -287,7 +287,7 @@ msiof0: spi@e6e20000 { msiof1: spi@e6e10000 { compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof"; reg = <0xe6e10000 0x0064>; - interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_MSIOF1>; power-domains = <&pd_a3sp>; #address-cells = <1>; @@ -298,7 +298,7 @@ msiof1: spi@e6e10000 { msiof2: spi@e6e00000 { compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof"; reg = <0xe6e00000 0x0064>; - interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_MSIOF2>; power-domains = <&pd_a3sp>; #address-cells = <1>; @@ -309,7 +309,7 @@ msiof2: spi@e6e00000 { msiof3: spi@e6c90000 { compatible = "renesas,msiof-sh73a0", "renesas,sh-mobile-msiof"; reg = <0xe6c90000 0x0064>; - interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_MSIOF3>; power-domains = <&pd_a3sp>; #address-cells = <1>; @@ -320,9 +320,9 @@ msiof3: spi@e6c90000 { sdhi0: sd@ee100000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee100000 0x100>; - interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH - 0 84 IRQ_TYPE_LEVEL_HIGH - 0 85 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks SH73A0_CLK_SDHI0>; power-domains = <&pd_a3sp>; cap-sd-highspeed; @@ -333,8 +333,8 @@ sdhi0: sd@ee100000 { sdhi1: sd@ee120000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee120000 0x100>; - interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH - 0 89 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks SH73A0_CLK_SDHI1>; power-domains = <&pd_a3sp>; toshiba,mmc-wrprotect-disable; @@ -345,8 +345,8 @@ sdhi1: sd@ee120000 { sdhi2: sd@ee140000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee140000 0x100>; - interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH - 0 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks SH73A0_CLK_SDHI2>; power-domains = <&pd_a3sp>; toshiba,mmc-wrprotect-disable; @@ -357,7 +357,7 @@ sdhi2: sd@ee140000 { scifa0: serial@e6c40000 { compatible = "renesas,scifa-sh73a0", "renesas,scifa"; reg = <0xe6c40000 0x100>; - interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA0>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -367,7 +367,7 @@ scifa0: serial@e6c40000 { scifa1: serial@e6c50000 { compatible = "renesas,scifa-sh73a0", "renesas,scifa"; reg = <0xe6c50000 0x100>; - interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA1>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -377,7 +377,7 @@ scifa1: serial@e6c50000 { scifa2: serial@e6c60000 { compatible = "renesas,scifa-sh73a0", "renesas,scifa"; reg = <0xe6c60000 0x100>; - interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA2>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -387,7 +387,7 @@ scifa2: serial@e6c60000 { scifa3: serial@e6c70000 { compatible = "renesas,scifa-sh73a0", "renesas,scifa"; reg = <0xe6c70000 0x100>; - interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA3>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -397,7 +397,7 @@ scifa3: serial@e6c70000 { scifa4: serial@e6c80000 { compatible = "renesas,scifa-sh73a0", "renesas,scifa"; reg = <0xe6c80000 0x100>; - interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA4>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -407,7 +407,7 @@ scifa4: serial@e6c80000 { scifa5: serial@e6cb0000 { compatible = "renesas,scifa-sh73a0", "renesas,scifa"; reg = <0xe6cb0000 0x100>; - interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA5>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -417,7 +417,7 @@ scifa5: serial@e6cb0000 { scifa6: serial@e6cc0000 { compatible = "renesas,scifa-sh73a0", "renesas,scifa"; reg = <0xe6cc0000 0x100>; - interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp3_clks SH73A0_CLK_SCIFA6>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -427,7 +427,7 @@ scifa6: serial@e6cc0000 { scifa7: serial@e6cd0000 { compatible = "renesas,scifa-sh73a0", "renesas,scifa"; reg = <0xe6cd0000 0x100>; - interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA7>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -437,7 +437,7 @@ scifa7: serial@e6cd0000 { scifb: serial@e6c30000 { compatible = "renesas,scifb-sh73a0", "renesas,scifb"; reg = <0xe6c30000 0x100>; - interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFB>; clock-names = "sci_ick"; power-domains = <&pd_a3sp>; @@ -579,7 +579,7 @@ sh_fsi2: sound@ec230000 { #sound-dai-cells = <1>; compatible = "renesas,fsi2-sh73a0", "renesas,sh_fsi2"; reg = <0xec230000 0x400>; - interrupts = <0 146 0x4>; + interrupts = ; power-domains = <&pd_a4mp>; status = "disabled"; }; @@ -591,7 +591,7 @@ bsc: bus@fec10000 { #size-cells = <1>; ranges = <0 0 0x20000000>; reg = <0xfec10000 0x400>; - interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&zb_clk>; power-domains = <&pd_a4s>; }; From b14ce2321b9c63f807719358c64bbe7aa973731c Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Thu, 28 Jan 2016 10:29:54 +0900 Subject: [PATCH 38/68] ARM: dts: emev2: use GIC_* defines Use GIC_* defines for GIC interrupt cells in emev2 device tree. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/emev2.dtsi | 39 ++++++++++++++++++------------------ 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi index 57795da616cb..bcce6f50c93d 100644 --- a/arch/arm/boot/dts/emev2.dtsi +++ b/arch/arm/boot/dts/emev2.dtsi @@ -9,6 +9,7 @@ */ #include "skeleton.dtsi" +#include #include / { @@ -53,8 +54,8 @@ gic: interrupt-controller@e0020000 { pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, - <0 121 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; }; clocks@e0110000 { @@ -158,7 +159,7 @@ sti_sclk: sti_sclk { timer@e0180000 { compatible = "renesas,em-sti"; reg = <0xe0180000 0x54>; - interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&sti_sclk>; clock-names = "sclk"; }; @@ -166,7 +167,7 @@ timer@e0180000 { uart0: serial@e1020000 { compatible = "renesas,em-uart"; reg = <0xe1020000 0x38>; - interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&usia_u0_sclk>; clock-names = "sclk"; }; @@ -174,7 +175,7 @@ uart0: serial@e1020000 { uart1: serial@e1030000 { compatible = "renesas,em-uart"; reg = <0xe1030000 0x38>; - interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&usib_u1_sclk>; clock-names = "sclk"; }; @@ -182,7 +183,7 @@ uart1: serial@e1030000 { uart2: serial@e1040000 { compatible = "renesas,em-uart"; reg = <0xe1040000 0x38>; - interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&usib_u2_sclk>; clock-names = "sclk"; }; @@ -190,7 +191,7 @@ uart2: serial@e1040000 { uart3: serial@e1050000 { compatible = "renesas,em-uart"; reg = <0xe1050000 0x38>; - interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&usib_u3_sclk>; clock-names = "sclk"; }; @@ -203,8 +204,8 @@ pfc: pfc@e0140200 { gpio0: gpio@e0050000 { compatible = "renesas,em-gio"; reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; - interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>, - <0 68 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 0 32>; #gpio-cells = <2>; @@ -215,8 +216,8 @@ gpio0: gpio@e0050000 { gpio1: gpio@e0050080 { compatible = "renesas,em-gio"; reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>, - <0 70 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 32 32>; #gpio-cells = <2>; @@ -227,8 +228,8 @@ gpio1: gpio@e0050080 { gpio2: gpio@e0050100 { compatible = "renesas,em-gio"; reg = <0xe0050100 0x2c>, <0xe0050140 0x20>; - interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>, - <0 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 64 32>; #gpio-cells = <2>; @@ -239,8 +240,8 @@ gpio2: gpio@e0050100 { gpio3: gpio@e0050180 { compatible = "renesas,em-gio"; reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>; - interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>, - <0 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 96 32>; #gpio-cells = <2>; @@ -251,8 +252,8 @@ gpio3: gpio@e0050180 { gpio4: gpio@e0050200 { compatible = "renesas,em-gio"; reg = <0xe0050200 0x2c>, <0xe0050240 0x20>; - interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>, - <0 76 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; gpio-controller; gpio-ranges = <&pfc 0 128 31>; #gpio-cells = <2>; @@ -266,7 +267,7 @@ iic0: i2c@e0070000 { #size-cells = <0>; compatible = "renesas,iic-emev2"; reg = <0xe0070000 0x28>; - interrupts = <0 32 IRQ_TYPE_EDGE_RISING>; + interrupts = ; clocks = <&iic0_sclk>; clock-names = "sclk"; status = "disabled"; @@ -277,7 +278,7 @@ iic1: i2c@e10a0000 { #size-cells = <0>; compatible = "renesas,iic-emev2"; reg = <0xe10a0000 0x28>; - interrupts = <0 33 IRQ_TYPE_EDGE_RISING>; + interrupts = ; clocks = <&iic1_sclk>; clock-names = "sclk"; status = "disabled"; From 720e9096e3c205dd71f951a9ff295f988a45e207 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 10:32:02 +0100 Subject: [PATCH 39/68] ARM: dts: r8a7778: Add SCIF fallback compatibility strings Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index fc5e7243467a..8ea1792c5146 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -297,7 +297,8 @@ rcar_sound,ssi { }; scif0: serial@ffe40000 { - compatible = "renesas,scif-r8a7778", "renesas,scif"; + compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF0>; @@ -307,7 +308,8 @@ scif0: serial@ffe40000 { }; scif1: serial@ffe41000 { - compatible = "renesas,scif-r8a7778", "renesas,scif"; + compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF1>; @@ -317,7 +319,8 @@ scif1: serial@ffe41000 { }; scif2: serial@ffe42000 { - compatible = "renesas,scif-r8a7778", "renesas,scif"; + compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF2>; @@ -327,7 +330,8 @@ scif2: serial@ffe42000 { }; scif3: serial@ffe43000 { - compatible = "renesas,scif-r8a7778", "renesas,scif"; + compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF3>; @@ -337,7 +341,8 @@ scif3: serial@ffe43000 { }; scif4: serial@ffe44000 { - compatible = "renesas,scif-r8a7778", "renesas,scif"; + compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF4>; @@ -347,7 +352,8 @@ scif4: serial@ffe44000 { }; scif5: serial@ffe45000 { - compatible = "renesas,scif-r8a7778", "renesas,scif"; + compatible = "renesas,scif-r8a7778", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF5>; From b2ac44fa39569094131b2a998e60023a10794b17 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 10:32:03 +0100 Subject: [PATCH 40/68] ARM: dts: r8a7779: Add SCIF fallback compatibility strings Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 93f3fdf95e31..1671839f55a6 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -211,7 +211,8 @@ i2c3: i2c@ffc73000 { }; scif0: serial@ffe40000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; @@ -221,7 +222,8 @@ scif0: serial@ffe40000 { }; scif1: serial@ffe41000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF1>; @@ -231,7 +233,8 @@ scif1: serial@ffe41000 { }; scif2: serial@ffe42000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF2>; @@ -241,7 +244,8 @@ scif2: serial@ffe42000 { }; scif3: serial@ffe43000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF3>; @@ -251,7 +255,8 @@ scif3: serial@ffe43000 { }; scif4: serial@ffe44000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF4>; @@ -261,7 +266,8 @@ scif4: serial@ffe44000 { }; scif5: serial@ffe45000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF5>; From a20dc9f2e4e18ecdf1114b43d2320503f6033917 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 10:32:04 +0100 Subject: [PATCH 41/68] ARM: dts: r8a7790: Add SCIF fallback compatibility strings Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index cc7eccf0ada7..1d94dfd53141 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -585,7 +585,8 @@ sdhi3: sd@ee160000 { }; scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7790", "renesas,scifa"; + compatible = "renesas,scifa-r8a7790", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; @@ -597,7 +598,8 @@ scifa0: serial@e6c40000 { }; scifa1: serial@e6c50000 { - compatible = "renesas,scifa-r8a7790", "renesas,scifa"; + compatible = "renesas,scifa-r8a7790", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>; @@ -609,7 +611,8 @@ scifa1: serial@e6c50000 { }; scifa2: serial@e6c60000 { - compatible = "renesas,scifa-r8a7790", "renesas,scifa"; + compatible = "renesas,scifa-r8a7790", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c60000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>; @@ -621,7 +624,8 @@ scifa2: serial@e6c60000 { }; scifb0: serial@e6c20000 { - compatible = "renesas,scifb-r8a7790", "renesas,scifb"; + compatible = "renesas,scifb-r8a7790", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6c20000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; @@ -633,7 +637,8 @@ scifb0: serial@e6c20000 { }; scifb1: serial@e6c30000 { - compatible = "renesas,scifb-r8a7790", "renesas,scifb"; + compatible = "renesas,scifb-r8a7790", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6c30000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; @@ -645,7 +650,8 @@ scifb1: serial@e6c30000 { }; scifb2: serial@e6ce0000 { - compatible = "renesas,scifb-r8a7790", "renesas,scifb"; + compatible = "renesas,scifb-r8a7790", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6ce0000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; @@ -657,7 +663,8 @@ scifb2: serial@e6ce0000 { }; scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7790", "renesas,scif"; + compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_SCIF0>; @@ -669,7 +676,8 @@ scif0: serial@e6e60000 { }; scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7790", "renesas,scif"; + compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_SCIF1>; @@ -681,7 +689,8 @@ scif1: serial@e6e68000 { }; hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7790", "renesas,hscif"; + compatible = "renesas,hscif-r8a7790", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>; @@ -693,7 +702,8 @@ hscif0: serial@e62c0000 { }; hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7790", "renesas,hscif"; + compatible = "renesas,hscif-r8a7790", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>; From b5b52dd7d014eea55ba122ae8eaf142f6f902aae Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 10:32:05 +0100 Subject: [PATCH 42/68] ARM: dts: r8a7791: Add SCIF fallback compatibility strings Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 54 ++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 6b3b02c0c58a..e7537ba68b5e 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -564,7 +564,8 @@ sdhi2: sd@ee160000 { }; scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; + compatible = "renesas,scifa-r8a7791", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>; @@ -576,7 +577,8 @@ scifa0: serial@e6c40000 { }; scifa1: serial@e6c50000 { - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; + compatible = "renesas,scifa-r8a7791", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>; @@ -588,7 +590,8 @@ scifa1: serial@e6c50000 { }; scifa2: serial@e6c60000 { - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; + compatible = "renesas,scifa-r8a7791", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c60000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>; @@ -600,7 +603,8 @@ scifa2: serial@e6c60000 { }; scifa3: serial@e6c70000 { - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; + compatible = "renesas,scifa-r8a7791", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c70000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>; @@ -612,7 +616,8 @@ scifa3: serial@e6c70000 { }; scifa4: serial@e6c78000 { - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; + compatible = "renesas,scifa-r8a7791", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c78000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>; @@ -624,7 +629,8 @@ scifa4: serial@e6c78000 { }; scifa5: serial@e6c80000 { - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; + compatible = "renesas,scifa-r8a7791", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c80000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>; @@ -636,7 +642,8 @@ scifa5: serial@e6c80000 { }; scifb0: serial@e6c20000 { - compatible = "renesas,scifb-r8a7791", "renesas,scifb"; + compatible = "renesas,scifb-r8a7791", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6c20000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>; @@ -648,7 +655,8 @@ scifb0: serial@e6c20000 { }; scifb1: serial@e6c30000 { - compatible = "renesas,scifb-r8a7791", "renesas,scifb"; + compatible = "renesas,scifb-r8a7791", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6c30000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>; @@ -660,7 +668,8 @@ scifb1: serial@e6c30000 { }; scifb2: serial@e6ce0000 { - compatible = "renesas,scifb-r8a7791", "renesas,scifb"; + compatible = "renesas,scifb-r8a7791", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6ce0000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>; @@ -672,7 +681,8 @@ scifb2: serial@e6ce0000 { }; scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7791", "renesas,scif"; + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF0>; @@ -684,7 +694,8 @@ scif0: serial@e6e60000 { }; scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7791", "renesas,scif"; + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF1>; @@ -696,7 +707,8 @@ scif1: serial@e6e68000 { }; scif2: serial@e6e58000 { - compatible = "renesas,scif-r8a7791", "renesas,scif"; + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e58000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF2>; @@ -708,7 +720,8 @@ scif2: serial@e6e58000 { }; scif3: serial@e6ea8000 { - compatible = "renesas,scif-r8a7791", "renesas,scif"; + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ea8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF3>; @@ -720,7 +733,8 @@ scif3: serial@e6ea8000 { }; scif4: serial@e6ee0000 { - compatible = "renesas,scif-r8a7791", "renesas,scif"; + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ee0000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF4>; @@ -732,7 +746,8 @@ scif4: serial@e6ee0000 { }; scif5: serial@e6ee8000 { - compatible = "renesas,scif-r8a7791", "renesas,scif"; + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ee8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF5>; @@ -744,7 +759,8 @@ scif5: serial@e6ee8000 { }; hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7791", "renesas,hscif"; + compatible = "renesas,hscif-r8a7791", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>; @@ -756,7 +772,8 @@ hscif0: serial@e62c0000 { }; hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7791", "renesas,hscif"; + compatible = "renesas,hscif-r8a7791", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>; @@ -768,7 +785,8 @@ hscif1: serial@e62c8000 { }; hscif2: serial@e62d0000 { - compatible = "renesas,hscif-r8a7791", "renesas,hscif"; + compatible = "renesas,hscif-r8a7791", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>; From 3ffc90a3e97771e0bd5402a52962f3d91c2bb27a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 10:32:06 +0100 Subject: [PATCH 43/68] ARM: dts: r8a7793: Add SCIF fallback compatibility strings Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 54 ++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 6817f14314e2..b49f9271ceb3 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -479,7 +479,8 @@ pfc: pfc@e6060000 { }; scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7793", "renesas,scifa"; + compatible = "renesas,scifa-r8a7793", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>; @@ -491,7 +492,8 @@ scifa0: serial@e6c40000 { }; scifa1: serial@e6c50000 { - compatible = "renesas,scifa-r8a7793", "renesas,scifa"; + compatible = "renesas,scifa-r8a7793", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>; @@ -503,7 +505,8 @@ scifa1: serial@e6c50000 { }; scifa2: serial@e6c60000 { - compatible = "renesas,scifa-r8a7793", "renesas,scifa"; + compatible = "renesas,scifa-r8a7793", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c60000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>; @@ -515,7 +518,8 @@ scifa2: serial@e6c60000 { }; scifa3: serial@e6c70000 { - compatible = "renesas,scifa-r8a7793", "renesas,scifa"; + compatible = "renesas,scifa-r8a7793", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c70000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>; @@ -527,7 +531,8 @@ scifa3: serial@e6c70000 { }; scifa4: serial@e6c78000 { - compatible = "renesas,scifa-r8a7793", "renesas,scifa"; + compatible = "renesas,scifa-r8a7793", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c78000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>; @@ -539,7 +544,8 @@ scifa4: serial@e6c78000 { }; scifa5: serial@e6c80000 { - compatible = "renesas,scifa-r8a7793", "renesas,scifa"; + compatible = "renesas,scifa-r8a7793", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c80000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>; @@ -551,7 +557,8 @@ scifa5: serial@e6c80000 { }; scifb0: serial@e6c20000 { - compatible = "renesas,scifb-r8a7793", "renesas,scifb"; + compatible = "renesas,scifb-r8a7793", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6c20000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>; @@ -563,7 +570,8 @@ scifb0: serial@e6c20000 { }; scifb1: serial@e6c30000 { - compatible = "renesas,scifb-r8a7793", "renesas,scifb"; + compatible = "renesas,scifb-r8a7793", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6c30000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>; @@ -575,7 +583,8 @@ scifb1: serial@e6c30000 { }; scifb2: serial@e6ce0000 { - compatible = "renesas,scifb-r8a7793", "renesas,scifb"; + compatible = "renesas,scifb-r8a7793", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6ce0000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>; @@ -587,7 +596,8 @@ scifb2: serial@e6ce0000 { }; scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7793", "renesas,scif"; + compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF0>; @@ -599,7 +609,8 @@ scif0: serial@e6e60000 { }; scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7793", "renesas,scif"; + compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF1>; @@ -611,7 +622,8 @@ scif1: serial@e6e68000 { }; scif2: serial@e6e58000 { - compatible = "renesas,scif-r8a7793", "renesas,scif"; + compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e58000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF2>; @@ -623,7 +635,8 @@ scif2: serial@e6e58000 { }; scif3: serial@e6ea8000 { - compatible = "renesas,scif-r8a7793", "renesas,scif"; + compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ea8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF3>; @@ -635,7 +648,8 @@ scif3: serial@e6ea8000 { }; scif4: serial@e6ee0000 { - compatible = "renesas,scif-r8a7793", "renesas,scif"; + compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ee0000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF4>; @@ -647,7 +661,8 @@ scif4: serial@e6ee0000 { }; scif5: serial@e6ee8000 { - compatible = "renesas,scif-r8a7793", "renesas,scif"; + compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ee8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF5>; @@ -659,7 +674,8 @@ scif5: serial@e6ee8000 { }; hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7793", "renesas,hscif"; + compatible = "renesas,hscif-r8a7793", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>; @@ -671,7 +687,8 @@ hscif0: serial@e62c0000 { }; hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7793", "renesas,hscif"; + compatible = "renesas,hscif-r8a7793", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>; @@ -683,7 +700,8 @@ hscif1: serial@e62c8000 { }; hscif2: serial@e62d0000 { - compatible = "renesas,hscif-r8a7793", "renesas,hscif"; + compatible = "renesas,hscif-r8a7793", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>; From 06930a1f9d875e42e17e408dd26240f7fa4e49b9 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 10:32:07 +0100 Subject: [PATCH 44/68] ARM: dts: r8a7794: Add SCIF fallback compatibility strings Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 54 ++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 21be4bdc4001..a49bf303a02d 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -282,7 +282,8 @@ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH }; scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7794", "renesas,scifa"; + compatible = "renesas,scifa-r8a7794", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>; @@ -294,7 +295,8 @@ scifa0: serial@e6c40000 { }; scifa1: serial@e6c50000 { - compatible = "renesas,scifa-r8a7794", "renesas,scifa"; + compatible = "renesas,scifa-r8a7794", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA1>; @@ -306,7 +308,8 @@ scifa1: serial@e6c50000 { }; scifa2: serial@e6c60000 { - compatible = "renesas,scifa-r8a7794", "renesas,scifa"; + compatible = "renesas,scifa-r8a7794", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c60000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA2>; @@ -318,7 +321,8 @@ scifa2: serial@e6c60000 { }; scifa3: serial@e6c70000 { - compatible = "renesas,scifa-r8a7794", "renesas,scifa"; + compatible = "renesas,scifa-r8a7794", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c70000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA3>; @@ -330,7 +334,8 @@ scifa3: serial@e6c70000 { }; scifa4: serial@e6c78000 { - compatible = "renesas,scifa-r8a7794", "renesas,scifa"; + compatible = "renesas,scifa-r8a7794", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c78000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA4>; @@ -342,7 +347,8 @@ scifa4: serial@e6c78000 { }; scifa5: serial@e6c80000 { - compatible = "renesas,scifa-r8a7794", "renesas,scifa"; + compatible = "renesas,scifa-r8a7794", + "renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6c80000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA5>; @@ -354,7 +360,8 @@ scifa5: serial@e6c80000 { }; scifb0: serial@e6c20000 { - compatible = "renesas,scifb-r8a7794", "renesas,scifb"; + compatible = "renesas,scifb-r8a7794", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6c20000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>; @@ -366,7 +373,8 @@ scifb0: serial@e6c20000 { }; scifb1: serial@e6c30000 { - compatible = "renesas,scifb-r8a7794", "renesas,scifb"; + compatible = "renesas,scifb-r8a7794", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6c30000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>; @@ -378,7 +386,8 @@ scifb1: serial@e6c30000 { }; scifb2: serial@e6ce0000 { - compatible = "renesas,scifb-r8a7794", "renesas,scifb"; + compatible = "renesas,scifb-r8a7794", + "renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe6ce0000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>; @@ -390,7 +399,8 @@ scifb2: serial@e6ce0000 { }; scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7794", "renesas,scif"; + compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF0>; @@ -402,7 +412,8 @@ scif0: serial@e6e60000 { }; scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7794", "renesas,scif"; + compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF1>; @@ -414,7 +425,8 @@ scif1: serial@e6e68000 { }; scif2: serial@e6e58000 { - compatible = "renesas,scif-r8a7794", "renesas,scif"; + compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6e58000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF2>; @@ -426,7 +438,8 @@ scif2: serial@e6e58000 { }; scif3: serial@e6ea8000 { - compatible = "renesas,scif-r8a7794", "renesas,scif"; + compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ea8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF3>; @@ -438,7 +451,8 @@ scif3: serial@e6ea8000 { }; scif4: serial@e6ee0000 { - compatible = "renesas,scif-r8a7794", "renesas,scif"; + compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ee0000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF4>; @@ -450,7 +464,8 @@ scif4: serial@e6ee0000 { }; scif5: serial@e6ee8000 { - compatible = "renesas,scif-r8a7794", "renesas,scif"; + compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", + "renesas,scif"; reg = <0 0xe6ee8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF5>; @@ -462,7 +477,8 @@ scif5: serial@e6ee8000 { }; hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7794", "renesas,hscif"; + compatible = "renesas,hscif-r8a7794", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>; @@ -474,7 +490,8 @@ hscif0: serial@e62c0000 { }; hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7794", "renesas,hscif"; + compatible = "renesas,hscif-r8a7794", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>; @@ -486,7 +503,8 @@ hscif1: serial@e62c8000 { }; hscif2: serial@e62d0000 { - compatible = "renesas,hscif-r8a7794", "renesas,hscif"; + compatible = "renesas,hscif-r8a7794", + "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>; From 46ae0e376b0dfe827ed7b675ff24a98d5f525c8a Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:31 +0100 Subject: [PATCH 45/68] ARM: dts: sh73a0: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 453280c41d27..bf825ca4f6f7 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -359,7 +359,7 @@ scifa0: serial@e6c40000 { reg = <0xe6c40000 0x100>; interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -369,7 +369,7 @@ scifa1: serial@e6c50000 { reg = <0xe6c50000 0x100>; interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -379,7 +379,7 @@ scifa2: serial@e6c60000 { reg = <0xe6c60000 0x100>; interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA2>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -389,7 +389,7 @@ scifa3: serial@e6c70000 { reg = <0xe6c70000 0x100>; interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA3>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -399,7 +399,7 @@ scifa4: serial@e6c80000 { reg = <0xe6c80000 0x100>; interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA4>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -409,7 +409,7 @@ scifa5: serial@e6cb0000 { reg = <0xe6cb0000 0x100>; interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA5>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -419,7 +419,7 @@ scifa6: serial@e6cc0000 { reg = <0xe6cc0000 0x100>; interrupts = ; clocks = <&mstp3_clks SH73A0_CLK_SCIFA6>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -429,7 +429,7 @@ scifa7: serial@e6cd0000 { reg = <0xe6cd0000 0x100>; interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFA7>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -439,7 +439,7 @@ scifb: serial@e6c30000 { reg = <0xe6c30000 0x100>; interrupts = ; clocks = <&mstp2_clks SH73A0_CLK_SCIFB>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; From 92489120be987cb83a23d3c6ea013501f438c41e Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:32 +0100 Subject: [PATCH 46/68] ARM: dts: r7s72100: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r7s72100.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index a5938c72d5bd..89e46ebef1bc 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -158,7 +158,7 @@ scif0: serial@e8007000 { , ; clocks = <&mstp4_clks R7S72100_CLK_SCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -171,7 +171,7 @@ scif1: serial@e8007800 { , ; clocks = <&mstp4_clks R7S72100_CLK_SCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -184,7 +184,7 @@ scif2: serial@e8008000 { , ; clocks = <&mstp4_clks R7S72100_CLK_SCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -197,7 +197,7 @@ scif3: serial@e8008800 { , ; clocks = <&mstp4_clks R7S72100_CLK_SCIF3>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -210,7 +210,7 @@ scif4: serial@e8009000 { , ; clocks = <&mstp4_clks R7S72100_CLK_SCIF4>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -223,7 +223,7 @@ scif5: serial@e8009800 { , ; clocks = <&mstp4_clks R7S72100_CLK_SCIF5>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -236,7 +236,7 @@ scif6: serial@e800a000 { , ; clocks = <&mstp4_clks R7S72100_CLK_SCIF6>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -249,7 +249,7 @@ scif7: serial@e800a800 { , ; clocks = <&mstp4_clks R7S72100_CLK_SCIF7>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; From d4be2f1bfdf7f2f6b3551d783edf676e9af00815 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:33 +0100 Subject: [PATCH 47/68] ARM: dts: r8a73a4: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 64f3efcd7ba5..138414a7d170 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -335,7 +335,7 @@ scifb0: serial@e6c20000 { reg = <0 0xe6c20000 0 0x100>; interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFB0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -345,7 +345,7 @@ scifb1: serial@e6c30000 { reg = <0 0xe6c30000 0 0x100>; interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFB1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -355,7 +355,7 @@ scifa0: serial@e6c40000 { reg = <0 0xe6c40000 0 0x100>; interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFA0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -365,7 +365,7 @@ scifa1: serial@e6c50000 { reg = <0 0xe6c50000 0 0x100>; interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFA1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -375,7 +375,7 @@ scifb2: serial@e6ce0000 { reg = <0 0xe6ce0000 0 0x100>; interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFB2>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -385,7 +385,7 @@ scifb3: serial@e6cf0000 { reg = <0 0xe6cf0000 0 0x100>; interrupts = ; clocks = <&mstp2_clks R8A73A4_CLK_SCIFB3>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_c4>; status = "disabled"; }; From 0995b9a8d618b7e2a57eeb191bdb7f11dd18ba3e Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:34 +0100 Subject: [PATCH 48/68] ARM: dts: r8a7740: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 36bcb39cca03..995fbda74b7a 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -214,7 +214,7 @@ scifa0: serial@e6c40000 { reg = <0xe6c40000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -224,7 +224,7 @@ scifa1: serial@e6c50000 { reg = <0xe6c50000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -234,7 +234,7 @@ scifa2: serial@e6c60000 { reg = <0xe6c60000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA2>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -244,7 +244,7 @@ scifa3: serial@e6c70000 { reg = <0xe6c70000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -254,7 +254,7 @@ scifa4: serial@e6c80000 { reg = <0xe6c80000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -264,7 +264,7 @@ scifa5: serial@e6cb0000 { reg = <0xe6cb0000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -274,7 +274,7 @@ scifa6: serial@e6cc0000 { reg = <0xe6cc0000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -284,7 +284,7 @@ scifa7: serial@e6cd0000 { reg = <0xe6cd0000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -294,7 +294,7 @@ scifb: serial@e6c30000 { reg = <0xe6c30000 0x100>; interrupts = ; clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&pd_a3sp>; status = "disabled"; }; From 258b3c31897cefca8430b5d1de4ccbab0049efbc Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:35 +0100 Subject: [PATCH 49/68] ARM: dts: r8a7778: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index 8ea1792c5146..50784e2b632d 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -302,7 +302,7 @@ scif0: serial@ffe40000 { reg = <0xffe40000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -313,7 +313,7 @@ scif1: serial@ffe41000 { reg = <0xffe41000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -324,7 +324,7 @@ scif2: serial@ffe42000 { reg = <0xffe42000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -335,7 +335,7 @@ scif3: serial@ffe43000 { reg = <0xffe43000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF3>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -346,7 +346,7 @@ scif4: serial@ffe44000 { reg = <0xffe44000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF4>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -357,7 +357,7 @@ scif5: serial@ffe45000 { reg = <0xffe45000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7778_CLK_SCIF5>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; From b406f38d4b4d06f617d4e2a826abadda7327b652 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:36 +0100 Subject: [PATCH 50/68] ARM: dts: r8a7779: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 1671839f55a6..8fddfae13865 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -216,7 +216,7 @@ scif0: serial@ffe40000 { reg = <0xffe40000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -227,7 +227,7 @@ scif1: serial@ffe41000 { reg = <0xffe41000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -238,7 +238,7 @@ scif2: serial@ffe42000 { reg = <0xffe42000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -249,7 +249,7 @@ scif3: serial@ffe43000 { reg = <0xffe43000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF3>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -260,7 +260,7 @@ scif4: serial@ffe44000 { reg = <0xffe44000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF4>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -271,7 +271,7 @@ scif5: serial@ffe45000 { reg = <0xffe45000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF5>; - clock-names = "sci_ick"; + clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; From 6c6e12a1f90d9b1cc5ae7428f43aeee33049c2ee Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:37 +0100 Subject: [PATCH 51/68] ARM: dts: r8a7790: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 1d94dfd53141..c5672745a1e5 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -590,7 +590,7 @@ scifa0: serial@e6c40000 { reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -603,7 +603,7 @@ scifa1: serial@e6c50000 { reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -616,7 +616,7 @@ scifa2: serial@e6c60000 { reg = <0 0xe6c60000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -629,7 +629,7 @@ scifb0: serial@e6c20000 { reg = <0 0xe6c20000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -642,7 +642,7 @@ scifb1: serial@e6c30000 { reg = <0 0xe6c30000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -655,7 +655,7 @@ scifb2: serial@e6ce0000 { reg = <0 0xe6ce0000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -668,7 +668,7 @@ scif0: serial@e6e60000 { reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_SCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -681,7 +681,7 @@ scif1: serial@e6e68000 { reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_SCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -694,7 +694,7 @@ hscif0: serial@e62c0000 { reg = <0 0xe62c0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -707,7 +707,7 @@ hscif1: serial@e62c8000 { reg = <0 0xe62c8000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; From bb7ca1952e120aba212538563c3ecd476a6a22f5 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:38 +0100 Subject: [PATCH 52/68] ARM: dts: r8a7791: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 36 +++++++++++++++++----------------- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index e7537ba68b5e..194e9464b748 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -569,7 +569,7 @@ scifa0: serial@e6c40000 { reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -582,7 +582,7 @@ scifa1: serial@e6c50000 { reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -595,7 +595,7 @@ scifa2: serial@e6c60000 { reg = <0 0xe6c60000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -608,7 +608,7 @@ scifa3: serial@e6c70000 { reg = <0 0xe6c70000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -621,7 +621,7 @@ scifa4: serial@e6c78000 { reg = <0 0xe6c78000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1f>, <&dmac0 0x20>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -634,7 +634,7 @@ scifa5: serial@e6c80000 { reg = <0 0xe6c80000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x23>, <&dmac0 0x24>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -647,7 +647,7 @@ scifb0: serial@e6c20000 { reg = <0 0xe6c20000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -660,7 +660,7 @@ scifb1: serial@e6c30000 { reg = <0 0xe6c30000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -673,7 +673,7 @@ scifb2: serial@e6ce0000 { reg = <0 0xe6ce0000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -686,7 +686,7 @@ scif0: serial@e6e60000 { reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -699,7 +699,7 @@ scif1: serial@e6e68000 { reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -712,7 +712,7 @@ scif2: serial@e6e58000 { reg = <0 0xe6e58000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -725,7 +725,7 @@ scif3: serial@e6ea8000 { reg = <0 0xe6ea8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF3>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -738,7 +738,7 @@ scif4: serial@e6ee0000 { reg = <0 0xe6ee0000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF4>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -751,7 +751,7 @@ scif5: serial@e6ee8000 { reg = <0 0xe6ee8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_SCIF5>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -764,7 +764,7 @@ hscif0: serial@e62c0000 { reg = <0 0xe62c0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -777,7 +777,7 @@ hscif1: serial@e62c8000 { reg = <0 0xe62c8000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -790,7 +790,7 @@ hscif2: serial@e62d0000 { reg = <0 0xe62d0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; From 48f27c190c475d2b83d0d1c464f0ced6c5b17838 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:39 +0100 Subject: [PATCH 53/68] ARM: dts: r8a7793: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 36 +++++++++++++++++----------------- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index b49f9271ceb3..07af584915c6 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -484,7 +484,7 @@ scifa0: serial@e6c40000 { reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -497,7 +497,7 @@ scifa1: serial@e6c50000 { reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -510,7 +510,7 @@ scifa2: serial@e6c60000 { reg = <0 0xe6c60000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFA2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -523,7 +523,7 @@ scifa3: serial@e6c70000 { reg = <0 0xe6c70000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA3>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -536,7 +536,7 @@ scifa4: serial@e6c78000 { reg = <0 0xe6c78000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA4>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1f>, <&dmac0 0x20>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -549,7 +549,7 @@ scifa5: serial@e6c80000 { reg = <0 0xe6c80000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7793_CLK_SCIFA5>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x23>, <&dmac0 0x24>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -562,7 +562,7 @@ scifb0: serial@e6c20000 { reg = <0 0xe6c20000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -575,7 +575,7 @@ scifb1: serial@e6c30000 { reg = <0 0xe6c30000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -588,7 +588,7 @@ scifb2: serial@e6ce0000 { reg = <0 0xe6ce0000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7793_CLK_SCIFB2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -601,7 +601,7 @@ scif0: serial@e6e60000 { reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -614,7 +614,7 @@ scif1: serial@e6e68000 { reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -627,7 +627,7 @@ scif2: serial@e6e58000 { reg = <0 0xe6e58000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -640,7 +640,7 @@ scif3: serial@e6ea8000 { reg = <0 0xe6ea8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF3>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -653,7 +653,7 @@ scif4: serial@e6ee0000 { reg = <0 0xe6ee0000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF4>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -666,7 +666,7 @@ scif5: serial@e6ee8000 { reg = <0 0xe6ee8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_SCIF5>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -679,7 +679,7 @@ hscif0: serial@e62c0000 { reg = <0 0xe62c0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -692,7 +692,7 @@ hscif1: serial@e62c8000 { reg = <0 0xe62c8000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -705,7 +705,7 @@ hscif2: serial@e62d0000 { reg = <0 0xe62d0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; From 1b463bd51042927e041775dc1ca5af63e7e5592b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 29 Jan 2016 10:47:40 +0100 Subject: [PATCH 54/68] ARM: dts: r8a7794: Rename the serial port clock to fck The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 36 +++++++++++++++++----------------- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index a49bf303a02d..b03a77b3d22f 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -287,7 +287,7 @@ scifa0: serial@e6c40000 { reg = <0 0xe6c40000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -300,7 +300,7 @@ scifa1: serial@e6c50000 { reg = <0 0xe6c50000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -313,7 +313,7 @@ scifa2: serial@e6c60000 { reg = <0 0xe6c60000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFA2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -326,7 +326,7 @@ scifa3: serial@e6c70000 { reg = <0 0xe6c70000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA3>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -339,7 +339,7 @@ scifa4: serial@e6c78000 { reg = <0 0xe6c78000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA4>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1f>, <&dmac0 0x20>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -352,7 +352,7 @@ scifa5: serial@e6c80000 { reg = <0 0xe6c80000 0 64>; interrupts = ; clocks = <&mstp11_clks R8A7794_CLK_SCIFA5>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x23>, <&dmac0 0x24>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -365,7 +365,7 @@ scifb0: serial@e6c20000 { reg = <0 0xe6c20000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -378,7 +378,7 @@ scifb1: serial@e6c30000 { reg = <0 0xe6c30000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -391,7 +391,7 @@ scifb2: serial@e6ce0000 { reg = <0 0xe6ce0000 0 64>; interrupts = ; clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -404,7 +404,7 @@ scif0: serial@e6e60000 { reg = <0 0xe6e60000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -417,7 +417,7 @@ scif1: serial@e6e68000 { reg = <0 0xe6e68000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -430,7 +430,7 @@ scif2: serial@e6e58000 { reg = <0 0xe6e58000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -443,7 +443,7 @@ scif3: serial@e6ea8000 { reg = <0 0xe6ea8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF3>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -456,7 +456,7 @@ scif4: serial@e6ee0000 { reg = <0 0xe6ee0000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF4>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -469,7 +469,7 @@ scif5: serial@e6ee8000 { reg = <0 0xe6ee8000 0 64>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_SCIF5>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -482,7 +482,7 @@ hscif0: serial@e62c0000 { reg = <0 0xe62c0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -495,7 +495,7 @@ hscif1: serial@e62c8000 { reg = <0 0xe62c8000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -508,7 +508,7 @@ hscif2: serial@e62d0000 { reg = <0 0xe62d0000 0 96>; interrupts = ; clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>; - clock-names = "sci_ick"; + clock-names = "fck"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; From 5fb544da5f9a77ef723b685181d4e763f6a1b2eb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:04:37 +0100 Subject: [PATCH 55/68] ARM: dts: r8a7778: Add BRG support for SCIF Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (S1 and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF device nodes. This increases the range and accuracy of supported baud rates on SCIF. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778.dtsi | 39 +++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index 50784e2b632d..f83a348fc07a 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -301,8 +301,9 @@ scif0: serial@ffe40000 { "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7778_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7778_CLK_SCIF0>, + <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -312,8 +313,9 @@ scif1: serial@ffe41000 { "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7778_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7778_CLK_SCIF1>, + <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -323,8 +325,9 @@ scif2: serial@ffe42000 { "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7778_CLK_SCIF2>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7778_CLK_SCIF2>, + <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -334,8 +337,9 @@ scif3: serial@ffe43000 { "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7778_CLK_SCIF3>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7778_CLK_SCIF3>, + <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -345,8 +349,9 @@ scif4: serial@ffe44000 { "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7778_CLK_SCIF4>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7778_CLK_SCIF4>, + <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -356,8 +361,9 @@ scif5: serial@ffe45000 { "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7778_CLK_SCIF5>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7778_CLK_SCIF5>, + <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -444,6 +450,15 @@ extal_clk: extal_clk { clock-output-names = "extal"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@ffc80000 { compatible = "renesas,r8a7778-cpg-clocks"; From f2be5f00d5eef701871cb1bc2b573dd5a75f66d3 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:04:38 +0100 Subject: [PATCH 56/68] ARM: dts: r8a7779: Add BRG support for SCIF Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (S1 and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF device nodes. This increases the range and accuracy of supported baud rates on SCIF. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 39 +++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 8fddfae13865..a0cc08e6295b 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -215,8 +215,9 @@ scif0: serial@ffe40000 { "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>, + <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -226,8 +227,9 @@ scif1: serial@ffe41000 { "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7779_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7779_CLK_SCIF1>, + <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -237,8 +239,9 @@ scif2: serial@ffe42000 { "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7779_CLK_SCIF2>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7779_CLK_SCIF2>, + <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -248,8 +251,9 @@ scif3: serial@ffe43000 { "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7779_CLK_SCIF3>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7779_CLK_SCIF3>, + <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -259,8 +263,9 @@ scif4: serial@ffe44000 { "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7779_CLK_SCIF4>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7779_CLK_SCIF4>, + <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -270,8 +275,9 @@ scif5: serial@ffe45000 { "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = ; - clocks = <&mstp0_clks R8A7779_CLK_SCIF5>; - clock-names = "fck"; + clocks = <&mstp0_clks R8A7779_CLK_SCIF5>, + <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -447,6 +453,15 @@ extal_clk: extal_clk { clock-output-names = "extal"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: clocks@ffc80000 { compatible = "renesas,r8a7779-cpg-clocks"; From 42af65e88df70a32c3c1afa0e6d35022b379c6ae Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:04:39 +0100 Subject: [PATCH 57/68] ARM: dts: r8a7790: Add BRG support for (H)SCIF Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index c5672745a1e5..c9583fa6cae7 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -667,8 +667,9 @@ scif0: serial@e6e60000 { "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7790_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -680,8 +681,9 @@ scif1: serial@e6e68000 { "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7790_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -693,8 +695,9 @@ hscif0: serial@e62c0000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -706,8 +709,9 @@ hscif1: serial@e62c8000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -996,6 +1000,15 @@ audio_clk_c: audio_clk_c { clock-output-names = "audio_clk_c"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* External USB clock - can be overridden by the board */ usb_extal_clk: usb_extal_clk { compatible = "fixed-clock"; From 394730a1337c578da7a5dc26671187c10ce3a9cd Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:04:40 +0100 Subject: [PATCH 58/68] ARM: dts: r8a7791: Add BRG support for (H)SCIF Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 54 ++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 194e9464b748..14aa62539ff2 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -685,8 +685,9 @@ scif0: serial@e6e60000 { "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_SCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -698,8 +699,9 @@ scif1: serial@e6e68000 { "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_SCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -711,8 +713,9 @@ scif2: serial@e6e58000 { "renesas,scif"; reg = <0 0xe6e58000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_SCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_SCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -724,8 +727,9 @@ scif3: serial@e6ea8000 { "renesas,scif"; reg = <0 0xe6ea8000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_SCIF3>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_SCIF3>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -737,8 +741,9 @@ scif4: serial@e6ee0000 { "renesas,scif"; reg = <0 0xe6ee0000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_SCIF4>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_SCIF4>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -750,8 +755,9 @@ scif5: serial@e6ee8000 { "renesas,scif"; reg = <0 0xe6ee8000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_SCIF5>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_SCIF5>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -763,8 +769,9 @@ hscif0: serial@e62c0000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -776,8 +783,9 @@ hscif1: serial@e62c8000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -789,8 +797,9 @@ hscif2: serial@e62d0000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -1049,6 +1058,15 @@ pcie_bus_clk: pcie_bus_clk { status = "disabled"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* External USB clock - can be overridden by the board */ usb_extal_clk: usb_extal_clk { compatible = "fixed-clock"; From 166d8ca693a9a1f4f3285ba03d9aebe7f679753f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:04:41 +0100 Subject: [PATCH 59/68] ARM: dts: r8a7793: Add BRG support for SCIF Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 54 ++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 07af584915c6..45dba1c79a43 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -600,8 +600,9 @@ scif0: serial@e6e60000 { "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_SCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -613,8 +614,9 @@ scif1: serial@e6e68000 { "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_SCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -626,8 +628,9 @@ scif2: serial@e6e58000 { "renesas,scif"; reg = <0 0xe6e58000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_SCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_SCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -639,8 +642,9 @@ scif3: serial@e6ea8000 { "renesas,scif"; reg = <0 0xe6ea8000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_SCIF3>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_SCIF3>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -652,8 +656,9 @@ scif4: serial@e6ee0000 { "renesas,scif"; reg = <0 0xe6ee0000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_SCIF4>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_SCIF4>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -665,8 +670,9 @@ scif5: serial@e6ee8000 { "renesas,scif"; reg = <0 0xe6ee8000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_SCIF5>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_SCIF5>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -678,8 +684,9 @@ hscif0: serial@e62c0000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -691,8 +698,9 @@ hscif1: serial@e62c8000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -704,8 +712,9 @@ hscif2: serial@e62d0000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -805,6 +814,15 @@ audio_clk_c: audio_clk_c { clock-output-names = "audio_clk_c"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7793-cpg-clocks", From a864446f9662be8aba43e2969c9f1264e22aa500 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:04:42 +0100 Subject: [PATCH 60/68] ARM: dts: r8a7794: Add BRG support for (H)SCIF Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 54 ++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index b03a77b3d22f..7d4c5597af5b 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -403,8 +403,9 @@ scif0: serial@e6e60000 { "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -416,8 +417,9 @@ scif1: serial@e6e68000 { "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -429,8 +431,9 @@ scif2: serial@e6e58000 { "renesas,scif"; reg = <0 0xe6e58000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_SCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -442,8 +445,9 @@ scif3: serial@e6ea8000 { "renesas,scif"; reg = <0 0xe6ea8000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_SCIF3>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF3>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -455,8 +459,9 @@ scif4: serial@e6ee0000 { "renesas,scif"; reg = <0 0xe6ee0000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_SCIF4>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF4>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -468,8 +473,9 @@ scif5: serial@e6ee8000 { "renesas,scif"; reg = <0 0xe6ee8000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_SCIF5>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_SCIF5>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -481,8 +487,9 @@ hscif0: serial@e62c0000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -494,8 +501,9 @@ hscif1: serial@e62c8000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -507,8 +515,9 @@ hscif2: serial@e62d0000 { "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62d0000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7794_CLK_HSCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -815,6 +824,15 @@ extal_clk: extal_clk { clock-output-names = "extal"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7794-cpg-clocks", From 8a758a9493d8cac4afde82918590a11bbb24c85c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:18 +0100 Subject: [PATCH 61/68] ARM: dts: alt: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 773f304d1142..ca9bc4fff287 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -103,6 +103,9 @@ &extal_clk { }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + du_pins: du { renesas,groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0"; renesas,function = "du"; @@ -113,6 +116,11 @@ scif2_pins: serial2 { renesas,function = "scif2"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + ether_pins: ether { renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,function = "eth"; @@ -205,6 +213,11 @@ &scif2 { status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + &qspi { pinctrl-0 = <&qspi_pins>; pinctrl-names = "default"; From 33ef9688ae45d19bf11c75a7c403a4f20804720d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:19 +0100 Subject: [PATCH 62/68] ARM: dts: bockw: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778-bockw.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index a52b359e2ae2..21e3b9dda2da 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -126,11 +126,19 @@ &tmu0 { }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif0_pins: serial0 { renesas,groups = "scif0_data_a", "scif0_ctrl"; renesas,function = "scif0"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + mmc_pins: mmc { renesas,groups = "mmc_data8", "mmc_ctrl"; renesas,function = "mmc"; @@ -217,3 +225,8 @@ &scif0 { status = "okay"; }; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; From 81a81ba9412c2c29309abd8752bcf771c22335a1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:20 +0100 Subject: [PATCH 63/68] ARM: dts: gose: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 2fa052036dbc..cfe142c2ba38 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -236,6 +236,9 @@ &extal_clk { }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + i2c2_pins: i2c2 { renesas,groups = "i2c2"; renesas,function = "i2c2"; @@ -256,6 +259,11 @@ scif1_pins: serial1 { renesas,function = "scif1"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + ether_pins: ether { renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,function = "eth"; @@ -316,6 +324,11 @@ &scif1 { status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + &qspi { pinctrl-0 = <&qspi_pins>; pinctrl-names = "default"; From 338f7ebf46e184746e63bcb93b3e5dbee95564a3 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:21 +0100 Subject: [PATCH 64/68] ARM: dts: koelsch: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates: - SCIF: - Supports now 50, 75, 110, 1152000, 1500000, 2000000, and 4000000 bps, - Perfect match for standard 50-460800, and 9216000 bps. - More accurate 576000 bps. - HSCIF: - Supports now 50, 75, 110, 134, 150, and 200 bps, - Perfect match for standard 50-460800, and 9216000 bps. - More accurate 576000, 1152000, 3000000, 3500000, and 4000000 bps. Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 45256f3cc835..0ad71b81d3a2 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -320,6 +320,9 @@ &extal_clk { }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + i2c2_pins: i2c2 { renesas,groups = "i2c2"; renesas,function = "i2c2"; @@ -340,6 +343,11 @@ scif1_pins: serial1 { renesas,function = "scif1"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + ether_pins: ether { renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,function = "eth"; @@ -440,6 +448,11 @@ &scif1 { status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; From 1781460c9accb106b0887985754b63be1b4c63f8 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:22 +0100 Subject: [PATCH 65/68] ARM: dts: lager: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 052dcee4790d..cdc0414f5f07 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -291,6 +291,9 @@ &extal_clk { }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + du_pins: du { renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0"; renesas,function = "du"; @@ -301,6 +304,11 @@ scif0_pins: serial0 { renesas,function = "scif0"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + ether_pins: ether { renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,function = "eth"; @@ -485,6 +493,11 @@ &scifa1 { status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + &msiof1 { pinctrl-0 = <&msiof1_pins>; pinctrl-names = "default"; From e50b5ac88d3e1c4cf6f74797be6f13bc9109b037 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:23 +0100 Subject: [PATCH 66/68] ARM: dts: marzen: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779-marzen.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index fe396c8d58db..e111d35d02ae 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -165,6 +165,9 @@ &tmu0 { }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + du_pins: du { du0 { renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0"; @@ -176,6 +179,11 @@ du1 { }; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk_b"; + renesas,function = "scif_clk"; + }; + ethernet_pins: ethernet { intc { renesas,groups = "intc_irq1_b"; @@ -222,6 +230,11 @@ &scif4 { status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; From 19417bd9c5112f58ea63e97ba72edabd5e1cc0fe Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:24 +0100 Subject: [PATCH 67/68] ARM: dts: porter: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-porter.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index 5015eaa0ae50..ed1f6f884e2b 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -143,11 +143,19 @@ &extal_clk { }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif0_pins: serial0 { renesas,groups = "scif0_data_d"; renesas,function = "scif0"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + ether_pins: ether { renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,function = "eth"; @@ -221,6 +229,11 @@ &scif0 { status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + ðer { pinctrl-0 = <ðer_pins &phy1_pins>; pinctrl-names = "default"; From c3373b09ba0391bcd9e992b0a2ce52d48d33e47b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:25 +0100 Subject: [PATCH 68/68] ARM: dts: silk: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-silk.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts index 98b8bcca84da..66f077a3ca41 100644 --- a/arch/arm/boot/dts/r8a7794-silk.dts +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -126,11 +126,19 @@ &extal_clk { }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif2_pins: serial2 { renesas,groups = "scif2_data"; renesas,function = "scif2"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + ether_pins: ether { renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,function = "eth"; @@ -184,6 +192,11 @@ &scif2 { status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + ðer { pinctrl-0 = <ðer_pins &phy1_pins>; pinctrl-names = "default";