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enable hdmi audio output

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This commit is contained in:
kfx 2010-12-20 20:47:31 +08:00
parent 7390b0be39
commit fbd7972e39
7 changed files with 95 additions and 12 deletions
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8
drivers/video/hdmi/chips/anx7150.c
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@ -35,10 +35,10 @@ int anx7150_i2c_write_p1_reg(struct i2c_client *client, char reg, char *val)
static int rk29_hdmi_enter(struct anx7150_dev_s *dev)
{
if(dev->rk29_output_status == RK29_OUTPUT_STATUS_LCD) {
printk("%s, resolution = %d\n", __func__, dev->resolution_real);
if(hdmi_switch_fb(dev->resolution_real, 1) < 0)
printk("%s, resolution = %d\n", __func__, dev->resolution_set);
if(hdmi_switch_fb(dev->resolution_set, 1) < 0)
return -1;
dev->hdmi->resolution = dev->resolution_real;
dev->hdmi->resolution = dev->resolution_set;
dev->rk29_output_status = RK29_OUTPUT_STATUS_HDMI;
}
return 0;
@ -47,7 +47,7 @@ static int rk29_hdmi_exit(struct anx7150_dev_s *dev)
{
if(dev->rk29_output_status == RK29_OUTPUT_STATUS_HDMI) {
printk("%s\n", __func__);
if(hdmi_switch_fb(dev->resolution_real, 0) < 0)
if(hdmi_switch_fb(dev->resolution_set, 0) < 0)
return -1;
dev->rk29_output_status = RK29_OUTPUT_STATUS_LCD;
}

2
drivers/video/hdmi/chips/anx7150.h
View File

@ -39,7 +39,7 @@
#define HDMI_I2S_Fs_48000 2
/* I2S default sample rate */
#define HDMI_I2S_DEFAULT_Fs HDMI_I2S_Fs_48000
#define HDMI_I2S_DEFAULT_Fs HDMI_I2S_Fs_44100
/* ANX7150 state machine */
enum{

40
drivers/video/hdmi/chips/anx7150_hw.c
View File

@ -38,7 +38,13 @@ struct ANX7150_video_timingtype ANX7150_video_timingtype_table =
0xe0/*ACT_LINE_LOW*/, 0x01/*ACT_LINE_HIGH*/, 0x03/*VSYNC_WIDTH*/, 0x0f/*V_BP_LINE*/,
0x04/*V_FP_LINE*/, 0x13/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/,
ANX7150_Interlace, ANX7150_Neg_Hsync_pol, ANX7150_Neg_Vsync_pol}, //update
//576p-50hz
//1080p-60hz
{0x98/*H_RES_LOW*/, 0x08/*H_RES_HIGH*/, 0x80/*ACT_PIX_LOW*/, 0x07/*ACT_PIX_HIGH*/,
0x2c/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x94/*H_BP_LOW*/, 0x00/*H_BP_HIGH*/,
0x38/*ACT_LINE_LOW*/, 0x04/*ACT_LINE_HIGH*/, 0x05/*VSYNC_WIDTH*/, 0x24/*V_BP_LINE*/,
0x04/*V_FP_LINE*/, 0x58/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/,
ANX7150_Interlace, ANX7150_Pos_Hsync_pol, ANX7150_Pos_Vsync_pol},
//576p-50hz
{0x60/*H_RES_LOW*/,0x03 /*H_RES_HIGH*/,0xd0 /*ACT_PIX_LOW*/, 0x02/*ACT_PIX_HIGH*/,
0x40/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x44/*H_BP_LOW*/,0x00 /*H_BP_HIGH*/,
0x40/*ACT_LINE_LOW*/, 0x02/*ACT_LINE_HIGH*/, 0x05/*VSYNC_WIDTH*/, 0x27/*V_BP_LINE*/,
@ -62,6 +68,13 @@ struct ANX7150_video_timingtype ANX7150_video_timingtype_table =
0x40/*ACT_LINE_LOW*/,0x02 /*ACT_LINE_HIGH*/, 0x03/*VSYNC_WIDTH*/, 0x13/*V_BP_LINE*/,
0x02/*V_FP_LINE*/, 0x0c/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/,
ANX7150_Interlace, ANX7150_Neg_Hsync_pol, ANX7150_Neg_Vsync_pol},
//1080p-50hz
{0x50/*H_RES_LOW*/, 0x0a/*H_RES_HIGH*/, 0x80/*ACT_PIX_LOW*/, 0x07/*ACT_PIX_HIGH*/,
0x2c/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x94/*H_BP_LOW*/, 0x00/*H_BP_HIGH*/,
0x38/*ACT_LINE_LOW*/, 0x04/*ACT_LINE_HIGH*/, 0x05/*VSYNC_WIDTH*/, 0x24/*V_BP_LINE*/,
0x04/*V_FP_LINE*/, 0x10/*H_FP_LOW*/, 0x02/*H_FP_HIGH*/,
ANX7150_Interlace, ANX7150_Pos_Hsync_pol, ANX7150_Pos_Vsync_pol},
};
//#endif
int anx7150_mass_read_need_delay = 0;
@ -1827,7 +1840,9 @@ int ANX7150_Parse_EDID(struct i2c_client *client, struct anx7150_dev_s *dev)
hdmi_dbg(&client->dev,"ANX7150_edid_result.ycbcr444_supported = 0x%.2x\n",(u32)ANX7150_edid_result.ycbcr444_supported);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_1080i_60Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_1080i_60Hz);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_1080i_50Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_1080i_50Hz);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_720p_60Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_720p_60Hz);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_1080p_60Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_1080p_60Hz);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_1080p_50Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_1080p_50Hz);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_720p_60Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_720p_60Hz);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_720p_50Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_720p_50Hz);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_640x480p_60Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_640x480p_60Hz);
hdmi_dbg(&client->dev,"ANX7150_edid_result.supported_720x480p_60Hz = 0x%.2x\n",(u32)ANX7150_edid_result.supported_720x480p_60Hz);
@ -1888,6 +1903,12 @@ int ANX7150_Get_Optimal_resolution(int resolution_set)
find_resolution = 1;
}
break;
case HDMI_1920x1080p_50Hz:
if(ANX7150_edid_result.supported_1080p_50Hz){
resolution_real = HDMI_1920x1080p_50Hz;
find_resolution = 1;
}
break;
default:
break;
}
@ -1900,6 +1921,8 @@ int ANX7150_Get_Optimal_resolution(int resolution_set)
resolution_real = HDMI_1280x720p_60Hz;
else if(ANX7150_edid_result.supported_576p_50Hz)
resolution_real = HDMI_720x576p_50Hz;
else if(ANX7150_edid_result.supported_1080p_50Hz)
resolution_real = HDMI_1920x1080p_50Hz;
else
resolution_real = HDMI_1280x720p_50Hz;
}
@ -2034,6 +2057,7 @@ static int anx7150_blue_screen_format_config(struct i2c_client *client)
static void ANX7150_Get_Video_Timing(void)
{
u8 i;
//#ifdef ITU656
for (i = 0; i < 18; i++)
{
@ -2762,7 +2786,7 @@ int ANX7150_Config_Video(struct i2c_client *client)
rc = anx7150_i2c_read_p0_reg(client, ANX7150_VID_CTRL_REG, &c);
c |= (ANX7150_VID_CTRL_IN_EN);
rc = anx7150_i2c_write_p0_reg(client, ANX7150_VID_CTRL_REG, &c);
msleep(200);
//D("Video configure OK!\n");
rc = anx7150_i2c_read_p0_reg(client, ANX7150_VID_STATUS_REG, &c);
if (!(c & ANX7150_VID_STATUS_VID_STABLE))
@ -3063,6 +3087,7 @@ u8 ANX7150_Config_Audio(struct i2c_client *client)
{
//disable super audio output
hdmi_dbg(&client->dev, "ANX7150: disable super audio output.\n");
c = 0x00;
rc = anx7150_i2c_write_p0_reg(client, ANX7150_ONEu8_AUD_CTRL_REG, &c);
}
@ -3143,11 +3168,11 @@ u8 ANX7150_Config_Audio(struct i2c_client *client)
rc = anx7150_i2c_write_p1_reg(client, ANX7150_ACR_N2_SW_REG, &c);
c = 0x00;
rc = anx7150_i2c_write_p1_reg(client, ANX7150_ACR_N3_SW_REG, &c);
rc = anx7150_i2c_read_p0_reg(client, ANX7150_HDMI_AUDCTRL0_REG, &c);
c = (c & 0xf8) | FREQ_MCLK;
rc = anx7150_i2c_write_p0_reg(client, ANX7150_HDMI_AUDCTRL0_REG, &c);
// set the relation of MCLK and Fs xy 070117
rc = anx7150_i2c_read_p0_reg(client, ANX7150_HDMI_AUDCTRL0_REG, &c);
c = (c & 0xf8) | FREQ_MCLK;
rc = anx7150_i2c_write_p0_reg(client, ANX7150_HDMI_AUDCTRL0_REG, &c);
hdmi_dbg(&client->dev, "Audio MCLK input mode is: %.2x\n",(u32)FREQ_MCLK);
//Enable control of ACR
@ -4170,6 +4195,9 @@ void HDMI_Set_Video_Format(u8 video_format) //CPU set the lowpower mode
case HDMI_720x576p_50Hz:
g_video_format = ANX7150_V720x576p_50Hz_4x3;
break;
case HDMI_1920x1080p_50Hz:
g_video_format = ANX7150_V1920x1080p_50Hz;
break;
default:
g_video_format = ANX7150_V1280x720p_50Hz;
break;

2
drivers/video/hdmi/chips/anx7150_hw.h
View File

@ -56,6 +56,7 @@ struct ANX7150_video_timingtype{ //CEA-861C format
u8 ANX7150_1280x720p_60Hz[18];//format 4
u8 ANX7150_1920x1080i_60Hz[18];//format 5
u8 ANX7150_720x480i_60Hz[18];//format 6 & 7
u8 ANX7150_1920x1080p_60Hz[18];
//u8 ANX7150_720x240p_60Hz[18];//format 8 & 9
//u8 ANX7150_2880x480i_60Hz[18];//format 10 & 11
//u8 ANX7150_2880x240p_60Hz[18];//format 12 & 13
@ -65,6 +66,7 @@ struct ANX7150_video_timingtype{ //CEA-861C format
u8 ANX7150_1280x720p_50Hz[18];//format 19
u8 ANX7150_1920x1080i_50Hz[18];//format 20*/
u8 ANX7150_720x576i_50Hz[18];//format 21 & 22
u8 ANX7150_1920x1080p_50Hz[18];
/* u8 ANX7150_720x288p_50Hz[18];//formats 23 & 24
u8 ANX7150_2880x576i_50Hz[18];//formats 25 & 26
u8 ANX7150_2880x288p_50Hz[18];//formats 27 & 28

52
drivers/video/hdmi/hdmi-fb.c
View File

@ -45,6 +45,18 @@
#define V_VD3 576
#define V_FP3 5
/* 1080p@50Hz Timing */
#define OUT_CLK4 148500000
#define H_PW4 44
#define H_BP4 148
#define H_VD4 1920
#define H_FP4 528
#define V_PW4 5
#define V_BP4 35
#define V_VD4 1080
#define V_FP4 5
extern int FB_Switch_Screen( struct rk29fb_screen *screen, u32 enable );
static int anx7150_init(void)
@ -61,6 +73,7 @@ static void hdmi_set_info(struct rk29fb_screen *screen)
{
struct rk29fb_screen *screen2 = screen + 1;
struct rk29fb_screen *screen3 = screen + 2;
struct rk29fb_screen *screen4 = screen + 3;
/* ****************** 720p@60Hz ******************* */
/* screen type & face */
@ -167,12 +180,46 @@ static void hdmi_set_info(struct rk29fb_screen *screen)
/* Operation function*/
screen3->init = anx7150_init;
screen3->standby = anx7150_standby;
/* ****************** 1080p@50Hz ******************* */
/* screen type & face */
screen4->type = OUT_TYPE;
screen4->face = OUT_FACE;
/* Screen size */
screen4->x_res = H_VD4;
screen4->y_res = V_VD4;
/* Timing */
screen4->pixclock = OUT_CLK4;
screen4->left_margin = H_BP4;
screen4->right_margin = H_FP4;
screen4->hsync_len = H_PW4;
screen4->upper_margin = V_BP4;
screen4->lower_margin = V_FP4;
screen4->vsync_len = V_PW4;
/* Pin polarity */
screen4->pin_hsync = 0;
screen4->pin_vsync = 0;
screen4->pin_den = 0;
screen4->pin_dclk = DCLK_POL;
/* Swap rule */
screen4->swap_rb = SWAP_RB;
screen4->swap_rg = 0;
screen4->swap_gb = 0;
screen4->swap_delta = 0;
screen4->swap_dumy = 0;
/* Operation function*/
screen4->init = anx7150_init;
screen4->standby = anx7150_standby;
}
int hdmi_switch_fb(int resolution, int type)
{
int rc = 0;
struct rk29fb_screen hdmi_info[3];
struct rk29fb_screen hdmi_info[4];
hdmi_set_info(&hdmi_info[0]);
@ -187,6 +234,9 @@ int hdmi_switch_fb(int resolution, int type)
case HDMI_720x576p_50Hz:
rc = FB_Switch_Screen(&hdmi_info[2], type);
break;
case HDMI_1920x1080p_50Hz:
rc = FB_Switch_Screen(&hdmi_info[3], type);
break;
default:
rc = FB_Switch_Screen(&hdmi_info[1], type);
break;

1
drivers/video/hdmi/hdmi-sysfs.c
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@ -16,6 +16,7 @@ static ssize_t hdmi_show_state_attrs(struct device *dev,
"0 -- 1280x720p_50Hz\n"
"1 -- 1280x720p_60Hz\n"
"2 -- 720x576p_50Hz\n"
"3 -- 1920x1080p_50Hz\n"
"--------------------------\n"
"auto_switch=%d\n"
"hdcp_on=%d\n"

2
include/linux/hdmi.h
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@ -30,6 +30,8 @@ typedef int BOOL;
#define HDMI_1280x720p_50Hz 0
#define HDMI_1280x720p_60Hz 1
#define HDMI_720x576p_50Hz 2
#define HDMI_1920x1080p_50Hz 3
#define HDMI_MAX_ID 32