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KVM: arm64: Validate the host-provided vgic model in pKVM
EL2 copies vgic_model from the host's struct kvm unchecked, and the nVHE
world switch dispatches on it with no cpucap guard. A host writing
KVM_DEV_TYPE_ARM_VGIC_V5 makes EL2 access GICv5 CPU interface registers
that are UNDEFINED without FEAT_GCIE, and panics the hypervisor on any
GICv3 machine.
Accept only GICv3, the one model pKVM supports, and force anything else
to 0, as for a VM with no in-kernel irqchip. EL2 reads the model only to
pick the GICv5 world switch and to emulate GICv3 CPU interface accesses,
and the host's own copy is left alone.
Fixes: 9b8e3d4ca0 ("KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore")
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
Link: https://patch.msgid.link/20261012161524.4016464-4-fuad.tabba@linux.dev
Signed-off-by: Marc Zyngier <maz@kernel.org>
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@ -340,13 +340,19 @@ static void pkvm_init_features_from_host(struct pkvm_hyp_vm *hyp_vm, const struc
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{
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struct kvm *kvm = &hyp_vm->kvm;
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unsigned long host_arch_flags = READ_ONCE(host_kvm->arch.flags);
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u32 vgic_model = READ_ONCE(host_kvm->arch.vgic.vgic_model);
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DECLARE_BITMAP(allowed_features, KVM_VCPU_MAX_FEATURES);
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/* CTR_EL0 is always under host control, even for protected VMs. */
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hyp_vm->kvm.arch.ctr_el0 = host_kvm->arch.ctr_el0;
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/* Preserve the vgic model so that GICv3 emulation works */
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hyp_vm->kvm.arch.vgic.vgic_model = host_kvm->arch.vgic.vgic_model;
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/*
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* pKVM runs only GICv3. Anything else becomes 0, the model of a VM
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* with no in-kernel irqchip, which keeps EL2 off the GICv5 registers.
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*/
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if (vgic_model != KVM_DEV_TYPE_ARM_VGIC_V3)
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vgic_model = 0;
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hyp_vm->kvm.arch.vgic.vgic_model = vgic_model;
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/* No restrictions for non-protected VMs. */
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if (!kvm_vm_is_protected(kvm)) {
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